/linux-5.10/drivers/gpu/drm/vc4/ ! |
D | vc4_kms.c | 31 struct drm_color_ctm *ctm; member 155 struct drm_color_ctm *ctm = ctm_state->ctm; in vc4_ctm_commit() local 159 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[0]), in vc4_ctm_commit() 161 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[3]), in vc4_ctm_commit() 163 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[6]), in vc4_ctm_commit() 166 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[1]), in vc4_ctm_commit() 168 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[4]), in vc4_ctm_commit() 170 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[7]), in vc4_ctm_commit() 173 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[2]), in vc4_ctm_commit() 175 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[5]), in vc4_ctm_commit() [all …]
|
/linux-5.10/drivers/gpu/drm/amd/display/amdgpu_dm/ ! |
D | amdgpu_dm_color.c | 44 * interface exposes CRTC degamma, CRTC CTM and CRTC regamma while our hardware 47 * Plane CTM -> Plane degamma -> Plane CTM -> Plane regamma -> Plane CTM 68 * Plane DGM Bypass -> Plane CTM Bypass -> Plane RGM Bypass -> ... 69 * CRTC DGM Bypass -> CRTC CTM Bypass -> CRTC RGM Bypass 158 * Converts a DRM CTM to a DC CSC float matrix. 161 static void __drm_ctm_to_dc_matrix(const struct drm_color_ctm *ctm, in __drm_ctm_to_dc_matrix() argument 182 /* gamut_remap_matrix[i] = ctm[i - floor(i/4)] */ in __drm_ctm_to_dc_matrix() 183 val = ctm->matrix[i - (i / 4)]; in __drm_ctm_to_dc_matrix() 292 * of the HW blocks as long as the CRTC CTM always comes before the 297 * The CRTC CTM will be placed in the gamut remap block if it is non-linear. [all …]
|
/linux-5.10/Documentation/trace/coresight/ ! |
D | coresight-ect.rst | 4 CoreSight Embedded Cross Trigger (CTI & CTM). 15 devices and interconnects them via the Cross Trigger Matrix (CTM) to other 24 0000000 : CTI :<=========>*CTM*<====>: CTI :---+ 33 become active. The active channel is propagated to other CTIs via the CTM, 53 All the CTI devices are associated with a CTM. On many systems there will be a 54 single effective CTM (one CTM, or multiple CTMs all interconnected), but it is 55 possible that systems can have nets of CTIs+CTM that are not interconnected by 56 a CTM to each other. On these systems a CTM index is declared to associate 57 CTI devices that are interconnected via a given CTM. 82 * ``ctmid`` : associated CTM - only relevant if system has multiple CTI+CTM [all …]
|
D | coresight.rst | 55 ******************** Cross Trigger Matrix (CTM) ******************* 84 all trace data are carried out-of-band on the ATB bus. The CTM provides 318 via the CTM. See (:doc:`coresight-ect`) [#fourth]_ for further details. 579 The CTI & CTM Modules 584 channels on the CTM (Cross Trigger Matrix).
|
/linux-5.10/Documentation/devicetree/bindings/arm/ ! |
D | coresight-cti.yaml | 13 a star topology via the Cross Trigger Matrix (CTM), which is not programmable. 25 CTIs are interconnected in a star topology via the CTM, using a number of 102 arm,cti-ctm-id: 105 Defines the CTM this CTI is connected to, in large systems with multiple 106 separate CTI/CTM nets. Typically multi-socket systems where the CTM is 262 arm,cti-ctm-id = <1>;
|
/linux-5.10/drivers/gpu/drm/arm/ ! |
D | malidp_crtc.c | 196 * Check if there is a new CTM and if it contains valid input. Valid here means 206 struct drm_color_ctm *ctm; in malidp_crtc_atomic_check_ctm() local 212 if (!state->ctm) in malidp_crtc_atomic_check_ctm() 215 if (crtc->state->ctm && (crtc->state->ctm->base.id == in malidp_crtc_atomic_check_ctm() 216 state->ctm->base.id)) in malidp_crtc_atomic_check_ctm() 220 * The size of the ctm is checked in in malidp_crtc_atomic_check_ctm() 223 ctm = (struct drm_color_ctm *)state->ctm->data; in malidp_crtc_atomic_check_ctm() 224 for (i = 0; i < ARRAY_SIZE(ctm->matrix); ++i) { in malidp_crtc_atomic_check_ctm() 226 s64 val = ctm->matrix[i]; in malidp_crtc_atomic_check_ctm()
|
D | malidp_drv.c | 97 if (!crtc->state->ctm) { in malidp_atomic_commit_update_coloradj() 104 if (!old_state->ctm || (crtc->state->ctm->base.id != in malidp_atomic_commit_update_coloradj() 105 old_state->ctm->base.id)) in malidp_atomic_commit_update_coloradj()
|
/linux-5.10/drivers/hwtracing/coresight/ ! |
D | coresight-cti.h | 100 * @ctm_id: which CTM this device is connected to (by default it is 101 * assumed there is a single CTM per SoC, ID 0). 120 * @nr_ctm_channels: number of available CTM channels - from ID register. 135 * @ctigate: gate channel output from CTI to CTM. 168 * @ctidev: Extra information needed by the CTI/CTM framework.
|
D | coresight-cti-platform.c | 34 #define CTI_DT_CTM_ID "arm,cti-ctm-id" 443 /* get any CTM ID - defaults to 0 */ in cti_plat_get_hw_data()
|
D | Kconfig | 148 This driver provides support for CoreSight CTI and CTM components.
|
D | coresight-cti-core.c | 33 * the same CTM, in general this is the case but does not always have to be. 36 /* net of CTI devices connected via CTM */ 211 /* DEVID[19:16] - number of CTM channels */
|
/linux-5.10/drivers/gpu/drm/arm/display/komeda/ ! |
D | komeda_color_mgmt.c | 123 struct drm_color_ctm *ctm; in drm_ctm_to_coeffs() local 129 ctm = ctm_blob->data; in drm_ctm_to_coeffs() 132 coeffs[i] = drm_color_ctm_s31_32_to_qm_n(ctm->matrix[i], 3, 12); in drm_ctm_to_coeffs()
|
/linux-5.10/Documentation/ABI/testing/ ! |
D | sysfs-bus-coresight-devices-cti | 17 Description: (Read) Display the associated CTM ID 141 Description: (Write) Attach a CTI input trigger to a CTM channel. 147 Description: (Write) Detach a CTI input trigger from a CTM channel. 153 Description: (Write) Attach a CTI output trigger to a CTM channel. 159 Description: (Write) Detach a CTI output trigger from a CTM channel.
|
/linux-5.10/drivers/gpu/drm/tidss/ ! |
D | tidss_dispc.c | 2390 static void dispc_k2g_cpr_from_ctm(const struct drm_color_ctm *ctm, in dispc_k2g_cpr_from_ctm() argument 2396 cpr->m[CSC_RR] = dispc_S31_32_to_s2_8(ctm->matrix[0]); in dispc_k2g_cpr_from_ctm() 2397 cpr->m[CSC_RG] = dispc_S31_32_to_s2_8(ctm->matrix[1]); in dispc_k2g_cpr_from_ctm() 2398 cpr->m[CSC_RB] = dispc_S31_32_to_s2_8(ctm->matrix[2]); in dispc_k2g_cpr_from_ctm() 2399 cpr->m[CSC_GR] = dispc_S31_32_to_s2_8(ctm->matrix[3]); in dispc_k2g_cpr_from_ctm() 2400 cpr->m[CSC_GG] = dispc_S31_32_to_s2_8(ctm->matrix[4]); in dispc_k2g_cpr_from_ctm() 2401 cpr->m[CSC_GB] = dispc_S31_32_to_s2_8(ctm->matrix[5]); in dispc_k2g_cpr_from_ctm() 2402 cpr->m[CSC_BR] = dispc_S31_32_to_s2_8(ctm->matrix[6]); in dispc_k2g_cpr_from_ctm() 2403 cpr->m[CSC_BG] = dispc_S31_32_to_s2_8(ctm->matrix[7]); in dispc_k2g_cpr_from_ctm() 2404 cpr->m[CSC_BB] = dispc_S31_32_to_s2_8(ctm->matrix[8]); in dispc_k2g_cpr_from_ctm() [all …]
|
/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/ ! |
D | dpu_crtc.c | 424 struct drm_color_ctm *ctm; in _dpu_crtc_get_pcc_coeff() local 428 ctm = (struct drm_color_ctm *)state->ctm->data; in _dpu_crtc_get_pcc_coeff() 430 if (!ctm) in _dpu_crtc_get_pcc_coeff() 433 cfg->r.r = CONVERT_S3_15(ctm->matrix[0]); in _dpu_crtc_get_pcc_coeff() 434 cfg->g.r = CONVERT_S3_15(ctm->matrix[1]); in _dpu_crtc_get_pcc_coeff() 435 cfg->b.r = CONVERT_S3_15(ctm->matrix[2]); in _dpu_crtc_get_pcc_coeff() 437 cfg->r.g = CONVERT_S3_15(ctm->matrix[3]); in _dpu_crtc_get_pcc_coeff() 438 cfg->g.g = CONVERT_S3_15(ctm->matrix[4]); in _dpu_crtc_get_pcc_coeff() 439 cfg->b.g = CONVERT_S3_15(ctm->matrix[5]); in _dpu_crtc_get_pcc_coeff() 441 cfg->r.b = CONVERT_S3_15(ctm->matrix[6]); in _dpu_crtc_get_pcc_coeff() [all …]
|
/linux-5.10/drivers/gpu/drm/i915/display/ ! |
D | intel_color.c | 61 * Extract the CSC coefficient from a CTM coefficient (in U32.32 fixed point 66 * of the CTM coefficient and we write the value from bit 3. We also round the 121 !crtc_state->hw.ctm && in crtc_state_is_legacy_gamma() 234 const struct drm_color_ctm *ctm = crtc_state->hw.ctm->data; in ilk_csc_convert_ctm() local 240 input = ctm_mult_by_limited(temp, ctm->matrix); in ilk_csc_convert_ctm() 242 input = ctm->matrix; in ilk_csc_convert_ctm() 289 if (crtc_state->hw.ctm) { in ilk_load_csc_matrix() 329 if (crtc_state->hw.ctm) { in icl_load_csc_matrix() 355 const struct drm_color_ctm *ctm = blob->data; in chv_load_cgm_csc() local 361 u64 abs_coeff = ((1ULL << 63) - 1) & ctm->matrix[i]; in chv_load_cgm_csc() [all …]
|
D | intel_atomic.c | 240 if (crtc_state->hw.ctm) in intel_crtc_duplicate_state() 241 drm_property_blob_get(crtc_state->hw.ctm); in intel_crtc_duplicate_state() 265 drm_property_blob_put(crtc_state->hw.ctm); in intel_crtc_put_color_blobs() 279 drm_property_replace_blob(&crtc_state->hw.ctm, in intel_crtc_copy_color_blobs() 280 crtc_state->uapi.ctm); in intel_crtc_copy_color_blobs()
|
/linux-5.10/drivers/gpu/drm/mediatek/ ! |
D | mtk_drm_ddp_comp.c | 237 struct drm_property_blob *blob = state->ctm; in mtk_ccorr_ctm_set() 238 struct drm_color_ctm *ctm; in mtk_ccorr_ctm_set() local 247 ctm = (struct drm_color_ctm *)blob->data; in mtk_ccorr_ctm_set() 248 input = ctm->matrix; in mtk_ccorr_ctm_set()
|
/linux-5.10/drivers/gpu/drm/nouveau/dispnv50/ ! |
D | base907c.c | 142 const struct drm_color_ctm *ctm) in base907c_csc() argument 154 *val = csc_drm_to_base(ctm->matrix[j * 3 + i]); in base907c_csc()
|
D | wndw.c | 421 if (wndw->func->csc && asyh->state.ctm) { in nv50_wndw_atomic_check_lut() 422 const struct drm_color_ctm *ctm = asyh->state.ctm->data; in nv50_wndw_atomic_check_lut() local 423 wndw->func->csc(wndw, asyw, ctm); in nv50_wndw_atomic_check_lut()
|
/linux-5.10/drivers/gpu/drm/ ! |
D | drm_color_mgmt.c | 60 * “CTM”: 61 * Blob property to set the current transformation matrix (CTM) apply to 69 * matrix through &drm_crtc_state.ctm.
|
D | drm_atomic_state_helper.c | 140 if (state->ctm) in __drm_atomic_helper_crtc_duplicate_state() 141 drm_property_blob_get(state->ctm); in __drm_atomic_helper_crtc_duplicate_state() 214 drm_property_blob_put(state->ctm); in __drm_atomic_helper_crtc_destroy_state()
|
/linux-5.10/Documentation/gpu/ ! |
D | kms-properties.csv | 20 …ty is set to Limited 16:235 and CTM is set, the hardware will be programmed with the result of the…
|
/linux-5.10/include/drm/ ! |
D | drm_crtc.h | 168 * (@gamma_lut, @degamma_lut or @ctm). Used by the atomic helpers and 269 * color conversion matrix @ctm. See drm_crtc_enable_color_mgmt(). The 275 * @ctm: 280 struct drm_property_blob *ctm; member 286 * matrix @ctm. See drm_crtc_enable_color_mgmt(). The blob (if not
|
/linux-5.10/Documentation/networking/device_drivers/ethernet/netronome/ ! |
D | nfp.rst | 216 * A CTM buffer could not be allocated.
|