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/linux-5.10/drivers/gpu/drm/msm/disp/mdp5/
Dmdp5_ctl.c10 * CTL - MDP Control Pool Manager
20 * In certain use cases (high-resolution dual pipe), one single CTL can be
32 /* CTL status bitmask */
44 /* when do CTL registers need to be flushed? (mask of trigger bits) */
49 /* True if the current CTL has FLUSH bits pending for single FLUSH. */
52 struct mdp5_ctl *pair; /* Paired CTL to be flushed together */
58 /* number of CTL / Layer Mixers in this hw config: */
83 void ctl_write(struct mdp5_ctl *ctl, u32 reg, u32 data) in ctl_write() argument
85 struct mdp5_kms *mdp5_kms = get_kms(ctl->ctlm); in ctl_write()
87 (void)ctl->reg_offset; /* TODO use this instead of mdp5_write */ in ctl_write()
[all …]
Dmdp5_ctl.h12 * CTL Manager prototypes:
13 * mdp5_ctlm_init() returns a ctlm (CTL Manager) handler,
23 * CTL prototypes:
24 * mdp5_ctl_request(ctlm, ...) returns a ctl (CTL resource) handler,
25 * which is then used to call the other mdp5_ctl_*(ctl, ...) functions.
29 int mdp5_ctl_get_ctl_id(struct mdp5_ctl *ctl);
33 int mdp5_ctl_set_pipeline(struct mdp5_ctl *ctl, struct mdp5_pipeline *p);
34 int mdp5_ctl_set_encoder_state(struct mdp5_ctl *ctl, struct mdp5_pipeline *p,
37 int mdp5_ctl_set_cursor(struct mdp5_ctl *ctl, struct mdp5_pipeline *pipeline,
51 * CTL registers need to be flushed after calling this function
[all …]
/linux-5.10/sound/pci/ice1712/
Dwm8766.c147 memcpy(wm->ctl, snd_wm8766_default_ctl, sizeof(wm->ctl)); in snd_wm8766_init()
188 uinfo->count = (wm->ctl[n].flags & WM8766_FLAG_STEREO) ? 2 : 1; in snd_wm8766_volume_info()
189 uinfo->value.integer.min = wm->ctl[n].min; in snd_wm8766_volume_info()
190 uinfo->value.integer.max = wm->ctl[n].max; in snd_wm8766_volume_info()
201 return snd_ctl_enum_info(uinfo, 1, wm->ctl[n].max, in snd_wm8766_enum_info()
202 wm->ctl[n].enum_names); in snd_wm8766_enum_info()
212 if (wm->ctl[n].get) in snd_wm8766_ctl_get()
213 wm->ctl[n].get(wm, &val1, &val2); in snd_wm8766_ctl_get()
215 val1 = wm->regs[wm->ctl[n].reg1] & wm->ctl[n].mask1; in snd_wm8766_ctl_get()
216 val1 >>= __ffs(wm->ctl[n].mask1); in snd_wm8766_ctl_get()
[all …]
Dwm8776.c76 if (wm->ctl[i].flags & flags_off) in snd_wm8776_update_agc_ctl()
77 snd_wm8776_activate_ctl(wm, wm->ctl[i].name, false); in snd_wm8776_update_agc_ctl()
78 else if (wm->ctl[i].flags & flags_on) in snd_wm8776_update_agc_ctl()
79 snd_wm8776_activate_ctl(wm, wm->ctl[i].name, true); in snd_wm8776_update_agc_ctl()
424 memcpy(wm->ctl, snd_wm8776_default_ctl, sizeof(wm->ctl)); in snd_wm8776_init()
462 uinfo->count = (wm->ctl[n].flags & WM8776_FLAG_STEREO) ? 2 : 1; in snd_wm8776_volume_info()
463 uinfo->value.integer.min = wm->ctl[n].min; in snd_wm8776_volume_info()
464 uinfo->value.integer.max = wm->ctl[n].max; in snd_wm8776_volume_info()
475 return snd_ctl_enum_info(uinfo, 1, wm->ctl[n].max, in snd_wm8776_enum_info()
476 wm->ctl[n].enum_names); in snd_wm8776_enum_info()
[all …]
/linux-5.10/drivers/thunderbolt/
Dctl.c16 #include "ctl.h"
41 #define tb_ctl_WARN(ctl, format, arg...) \ argument
42 dev_WARN(&(ctl)->nhi->pdev->dev, format, ## arg)
44 #define tb_ctl_err(ctl, format, arg...) \ argument
45 dev_err(&(ctl)->nhi->pdev->dev, format, ## arg)
47 #define tb_ctl_warn(ctl, format, arg...) \ argument
48 dev_warn(&(ctl)->nhi->pdev->dev, format, ## arg)
50 #define tb_ctl_info(ctl, format, arg...) \ argument
51 dev_info(&(ctl)->nhi->pdev->dev, format, ## arg)
53 #define tb_ctl_dbg(ctl, format, arg...) \ argument
[all …]
Dctl.h25 void tb_ctl_start(struct tb_ctl *ctl);
26 void tb_ctl_stop(struct tb_ctl *ctl);
27 void tb_ctl_free(struct tb_ctl *ctl);
48 struct tb_ctl *ctl; member
56 * @ctl: Pointer to the control channel structure. Only set when the
79 struct tb_ctl *ctl; member
104 int tb_cfg_request(struct tb_ctl *ctl, struct tb_cfg_request *req,
107 struct tb_cfg_result tb_cfg_request_sync(struct tb_ctl *ctl,
126 int tb_cfg_ack_plug(struct tb_ctl *ctl, u64 route, u32 port, bool unplug);
127 struct tb_cfg_result tb_cfg_reset(struct tb_ctl *ctl, u64 route,
[all …]
/linux-5.10/drivers/hwmon/
Daxi-fan-control.c54 const struct axi_fan_control_data *ctl) in axi_iowrite() argument
56 iowrite32(val, ctl->base + reg); in axi_iowrite()
60 const struct axi_fan_control_data *ctl) in axi_ioread() argument
62 return ioread32(ctl->base + reg); in axi_ioread()
65 static long axi_fan_control_get_pwm_duty(const struct axi_fan_control_data *ctl) in axi_fan_control_get_pwm_duty() argument
67 u32 pwm_width = axi_ioread(ADI_REG_PWM_WIDTH, ctl); in axi_fan_control_get_pwm_duty()
68 u32 pwm_period = axi_ioread(ADI_REG_PWM_PERIOD, ctl); in axi_fan_control_get_pwm_duty()
77 struct axi_fan_control_data *ctl) in axi_fan_control_set_pwm_duty() argument
79 u32 pwm_period = axi_ioread(ADI_REG_PWM_PERIOD, ctl); in axi_fan_control_set_pwm_duty()
85 axi_iowrite(new_width, ADI_REG_PWM_WIDTH, ctl); in axi_fan_control_set_pwm_duty()
[all …]
/linux-5.10/drivers/irqchip/
Dirq-meson-gpio.c47 static void meson8_gpio_irq_sel_pin(struct meson_gpio_irq_controller *ctl,
49 static void meson_gpio_irq_init_dummy(struct meson_gpio_irq_controller *ctl);
50 static void meson_a1_gpio_irq_sel_pin(struct meson_gpio_irq_controller *ctl,
53 static void meson_a1_gpio_irq_init(struct meson_gpio_irq_controller *ctl);
56 void (*gpio_irq_sel_pin)(struct meson_gpio_irq_controller *ctl,
58 void (*gpio_irq_init)(struct meson_gpio_irq_controller *ctl);
144 static void meson_gpio_irq_update_bits(struct meson_gpio_irq_controller *ctl, in meson_gpio_irq_update_bits() argument
150 spin_lock_irqsave(&ctl->lock, flags); in meson_gpio_irq_update_bits()
152 tmp = readl_relaxed(ctl->base + reg); in meson_gpio_irq_update_bits()
155 writel_relaxed(tmp, ctl->base + reg); in meson_gpio_irq_update_bits()
[all …]
/linux-5.10/sound/pci/ctxfi/
Dcthw20k1.c82 u16 ctl:1; member
95 unsigned int ctl; member
178 struct src_rsc_ctrl_blk *ctl = blk; in src_set_state() local
180 set_field(&ctl->ctl, SRCCTL_STATE, state); in src_set_state()
181 ctl->dirty.bf.ctl = 1; in src_set_state()
187 struct src_rsc_ctrl_blk *ctl = blk; in src_set_bm() local
189 set_field(&ctl->ctl, SRCCTL_BM, bm); in src_set_bm()
190 ctl->dirty.bf.ctl = 1; in src_set_bm()
196 struct src_rsc_ctrl_blk *ctl = blk; in src_set_rsr() local
198 set_field(&ctl->ctl, SRCCTL_RSR, rsr); in src_set_rsr()
[all …]
Dcthw20k2.c82 u16 ctl:1; member
95 unsigned int ctl; member
178 struct src_rsc_ctrl_blk *ctl = blk; in src_set_state() local
180 set_field(&ctl->ctl, SRCCTL_STATE, state); in src_set_state()
181 ctl->dirty.bf.ctl = 1; in src_set_state()
187 struct src_rsc_ctrl_blk *ctl = blk; in src_set_bm() local
189 set_field(&ctl->ctl, SRCCTL_BM, bm); in src_set_bm()
190 ctl->dirty.bf.ctl = 1; in src_set_bm()
196 struct src_rsc_ctrl_blk *ctl = blk; in src_set_rsr() local
198 set_field(&ctl->ctl, SRCCTL_RSR, rsr); in src_set_rsr()
[all …]
/linux-5.10/fs/btrfs/
Dfree-space-cache.c36 static int count_bitmap_extents(struct btrfs_free_space_ctl *ctl,
38 static int link_free_space(struct btrfs_free_space_ctl *ctl,
40 static void unlink_free_space(struct btrfs_free_space_ctl *ctl,
637 static void merge_space_tree(struct btrfs_free_space_ctl *ctl) in merge_space_tree() argument
643 spin_lock(&ctl->tree_lock); in merge_space_tree()
644 for (n = rb_first(&ctl->free_space_offset); n; n = rb_next(n)) { in merge_space_tree()
651 unlink_free_space(ctl, prev); in merge_space_tree()
652 unlink_free_space(ctl, e); in merge_space_tree()
655 link_free_space(ctl, prev); in merge_space_tree()
657 spin_unlock(&ctl->tree_lock); in merge_space_tree()
[all …]
Dinode-map.c33 struct btrfs_free_space_ctl *ctl = root->free_ino_ctl; in caching_kthread() local
109 __btrfs_add_free_space(fs_info, ctl, last + 1, in caching_kthread()
120 __btrfs_add_free_space(fs_info, ctl, last + 1, in caching_kthread()
142 struct btrfs_free_space_ctl *ctl = root->free_ino_ctl; in start_caching() local
177 __btrfs_add_free_space(fs_info, ctl, objectid, in start_caching()
254 struct btrfs_free_space_ctl *ctl = root->free_ino_ctl; in btrfs_unpin_free_ino() local
284 __btrfs_add_free_space(root->fs_info, ctl, in btrfs_unpin_free_ino()
297 static void recalculate_thresholds(struct btrfs_free_space_ctl *ctl) in recalculate_thresholds() argument
304 n = rb_last(&ctl->free_space_offset); in recalculate_thresholds()
306 ctl->extents_thresh = INIT_THRESHOLD; in recalculate_thresholds()
[all …]
/linux-5.10/sound/soc/codecs/
Dcs35l35.h21 #define CS35L35_PWRCTL1 0x06 /* Power Ctl 1 */
22 #define CS35L35_PWRCTL2 0x07 /* Power Ctl 2 */
23 #define CS35L35_PWRCTL3 0x08 /* Power Ctl 3 */
24 #define CS35L35_CLK_CTL1 0x0A /* Clocking Ctl 1 */
25 #define CS35L35_CLK_CTL2 0x0B /* Clocking Ctl 2 */
26 #define CS35L35_CLK_CTL3 0x0C /* Clocking Ctl 3 */
30 #define CS35L35_MAG_COMP_CTL 0x13 /* Magnitude Comp CTL */
31 #define CS35L35_AMP_INP_DRV_CTL 0x14 /* Amp Input Drive Ctl */
32 #define CS35L35_AMP_DIG_VOL_CTL 0x15 /* Amplifier Dig Volume Ctl */
35 #define CS35L35_PROTECT_CTL 0x18 /* Amp Gain - Prot Ctl Param */
[all …]
Dcs35l34.h19 #define CS35L34_PWRCTL1 0x06 /* Power Ctl 1 */
20 #define CS35L34_PWRCTL2 0x07 /* Power Ctl 2 */
21 #define CS35L34_PWRCTL3 0x08 /* Power Ctl 3 */
22 #define CS35L34_ADSP_CLK_CTL 0x0A /* (ADSP) Clock Ctl */
23 #define CS35L34_MCLK_CTL 0x0B /* Master Clocking Ctl */
24 #define CS35L34_AMP_INP_DRV_CTL 0x14 /* Amp Input Drive Ctl */
25 #define CS35L34_AMP_DIG_VOL_CTL 0x15 /* Amplifier Dig Volume Ctl */
27 #define CS35L34_AMP_ANLG_GAIN_CTL 0x17 /* Amplifier Analog Gain Ctl */
28 #define CS35L34_PROTECT_CTL 0x18 /* Amp Gain - Prot Ctl Param */
29 #define CS35L34_AMP_KEEP_ALIVE_CTL 0x1A /* Amplifier Keep Alive Ctl */
[all …]
/linux-5.10/drivers/net/wireless/ath/ath9k/
Dar9003_eeprom.c30 /* Local defines to distinguish between extension and control CTL's */
39 #define CTL(_tpower, _flag) ((_tpower) | ((_flag) << 6)) macro
284 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
285 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
286 { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
288 { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0) } },
289 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
290 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
292 { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0) } },
293 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
[all …]
/linux-5.10/Documentation/admin-guide/media/
Dimx.rst248 media-ctl -V "'ipu1_csi0_mux':2[fmt:UYVY2X8/1280x960]"
249 media-ctl -V "'ipu1_csi0':0[crop:(0,0)/640x480]"
250 media-ctl -V "'ipu1_csi0':0[compose:(0,0)/320x240]"
266 media-ctl -V "'ipu1_csi0':0[fmt:UYVY2X8/640x480@1/60]"
267 media-ctl -V "'ipu1_csi0':2[fmt:UYVY2X8/640x480@1/30]"
442 media-ctl -l "'ov5642 1-0042':0 -> 'ipu1_csi0_mux':1[1]"
443 media-ctl -l "'ipu1_csi0_mux':2 -> 'ipu1_csi0':0[1]"
444 media-ctl -l "'ipu1_csi0':2 -> 'ipu1_csi0 capture':0[1]"
446 media-ctl -l "'ov5640 1-0040':0 -> 'imx6-mipi-csi2':0[1]"
447 media-ctl -l "'imx6-mipi-csi2':2 -> 'ipu1_csi1':0[1]"
[all …]
/linux-5.10/sound/pci/oxygen/
Doxygen_mixer.c16 static int dac_volume_info(struct snd_kcontrol *ctl, in dac_volume_info() argument
19 struct oxygen *chip = ctl->private_data; in dac_volume_info()
28 static int dac_volume_get(struct snd_kcontrol *ctl, in dac_volume_get() argument
31 struct oxygen *chip = ctl->private_data; in dac_volume_get()
41 static int dac_volume_put(struct snd_kcontrol *ctl, in dac_volume_put() argument
44 struct oxygen *chip = ctl->private_data; in dac_volume_put()
61 static int dac_mute_get(struct snd_kcontrol *ctl, in dac_mute_get() argument
64 struct oxygen *chip = ctl->private_data; in dac_mute_get()
72 static int dac_mute_put(struct snd_kcontrol *ctl, in dac_mute_put() argument
75 struct oxygen *chip = ctl->private_data; in dac_mute_put()
[all …]
Dxonar_wm87x6.c499 static int wm8776_bit_switch_get(struct snd_kcontrol *ctl, in wm8776_bit_switch_get() argument
502 struct oxygen *chip = ctl->private_data; in wm8776_bit_switch_get()
504 u16 bit = ctl->private_value & 0xffff; in wm8776_bit_switch_get()
505 unsigned int reg_index = (ctl->private_value >> 16) & 0xff; in wm8776_bit_switch_get()
506 bool invert = (ctl->private_value >> 24) & 1; in wm8776_bit_switch_get()
513 static int wm8776_bit_switch_put(struct snd_kcontrol *ctl, in wm8776_bit_switch_put() argument
516 struct oxygen *chip = ctl->private_data; in wm8776_bit_switch_put()
518 u16 bit = ctl->private_value & 0xffff; in wm8776_bit_switch_put()
520 unsigned int reg_index = (ctl->private_value >> 16) & 0xff; in wm8776_bit_switch_put()
521 bool invert = (ctl->private_value >> 24) & 1; in wm8776_bit_switch_put()
[all …]
Dxonar_dg_mixer.c47 static int output_select_info(struct snd_kcontrol *ctl, in output_select_info() argument
59 static int output_select_get(struct snd_kcontrol *ctl, in output_select_get() argument
62 struct oxygen *chip = ctl->private_data; in output_select_get()
71 static int output_select_put(struct snd_kcontrol *ctl, in output_select_put() argument
74 struct oxygen *chip = ctl->private_data; in output_select_put()
94 static int hp_stereo_volume_info(struct snd_kcontrol *ctl, in hp_stereo_volume_info() argument
104 static int hp_stereo_volume_get(struct snd_kcontrol *ctl, in hp_stereo_volume_get() argument
107 struct oxygen *chip = ctl->private_data; in hp_stereo_volume_get()
120 static int hp_stereo_volume_put(struct snd_kcontrol *ctl, in hp_stereo_volume_put() argument
123 struct oxygen *chip = ctl->private_data; in hp_stereo_volume_put()
[all …]
/linux-5.10/drivers/crypto/caam/
Ddebugfs.c40 debugfs_create_file("qi_congested", 0444, ctrlpriv->ctl, in caam_debugfs_qi_init()
56 ctrlpriv->ctl = debugfs_create_dir("ctl", root); in caam_debugfs_init()
58 debugfs_create_file("rq_dequeued", 0444, ctrlpriv->ctl, in caam_debugfs_init()
60 debugfs_create_file("ob_rq_encrypted", 0444, ctrlpriv->ctl, in caam_debugfs_init()
62 debugfs_create_file("ib_rq_decrypted", 0444, ctrlpriv->ctl, in caam_debugfs_init()
64 debugfs_create_file("ob_bytes_encrypted", 0444, ctrlpriv->ctl, in caam_debugfs_init()
66 debugfs_create_file("ob_bytes_protected", 0444, ctrlpriv->ctl, in caam_debugfs_init()
68 debugfs_create_file("ib_bytes_decrypted", 0444, ctrlpriv->ctl, in caam_debugfs_init()
70 debugfs_create_file("ib_bytes_validated", 0444, ctrlpriv->ctl, in caam_debugfs_init()
74 debugfs_create_file("fault_addr", 0444, ctrlpriv->ctl, in caam_debugfs_init()
[all …]
/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_ctl.h58 * @ctx : ctl path ctx pointer
66 * @ctx : ctl path ctx pointer
73 * @ctx : ctl path ctx pointer
80 * @ctx : ctl path ctx pointer
87 * @ctx : ctl path ctx pointer
96 * @ctx : ctl path ctx pointer
104 * @ctx : ctl path ctx pointer
110 * @ctx : ctl path ctx pointer
111 * @Return: value of the ctl flush register.
126 * wait_reset_status - checks ctl reset status
[all …]
/linux-5.10/drivers/misc/habanalabs/include/gaudi/
Dgaudi_packets.h62 __le32 ctl; member
67 __le32 ctl; member
72 __le32 ctl; member
77 __le32 ctl; member
83 __le32 ctl; member
128 __le32 ctl; member
133 __le32 ctl; member
163 __le32 ctl; member
180 __le32 ctl; member
187 __le32 ctl; member
[all …]
/linux-5.10/sound/soc/kirkwood/
Dkirkwood-i2s.c219 static unsigned kirkwood_i2s_play_mute(unsigned ctl) in kirkwood_i2s_play_mute() argument
221 if (!(ctl & KIRKWOOD_PLAYCTL_I2S_EN)) in kirkwood_i2s_play_mute()
222 ctl |= KIRKWOOD_PLAYCTL_I2S_MUTE; in kirkwood_i2s_play_mute()
223 if (!(ctl & KIRKWOOD_PLAYCTL_SPDIF_EN)) in kirkwood_i2s_play_mute()
224 ctl |= KIRKWOOD_PLAYCTL_SPDIF_MUTE; in kirkwood_i2s_play_mute()
225 return ctl; in kirkwood_i2s_play_mute()
233 uint32_t ctl, value; in kirkwood_i2s_play_trigger() local
235 ctl = readl(priv->io + KIRKWOOD_PLAYCTL); in kirkwood_i2s_play_trigger()
236 if ((ctl & KIRKWOOD_PLAYCTL_ENABLE_MASK) == 0) { in kirkwood_i2s_play_trigger()
244 value = ctl; in kirkwood_i2s_play_trigger()
[all …]
/linux-5.10/drivers/mmc/host/
Dsdhci-milbeaut.c89 u32 ctl; in sdhci_milbeaut_reset() local
118 ctl = sdhci_readl(host, F_SDH30_ESD_CONTROL); in sdhci_milbeaut_reset()
119 ctl |= F_SDH30_CMD_DAT_DELAY; in sdhci_milbeaut_reset()
120 sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL); in sdhci_milbeaut_reset()
179 u32 ctl; in sdhci_milbeaut_vendor_init() local
181 ctl = sdhci_readl(host, F_SDH30_IO_CONTROL2); in sdhci_milbeaut_vendor_init()
182 ctl |= F_SDH30_CRES_O_DN; in sdhci_milbeaut_vendor_init()
183 sdhci_writel(host, ctl, F_SDH30_IO_CONTROL2); in sdhci_milbeaut_vendor_init()
184 ctl &= ~F_SDH30_MSEL_O_1_8; in sdhci_milbeaut_vendor_init()
185 sdhci_writel(host, ctl, F_SDH30_IO_CONTROL2); in sdhci_milbeaut_vendor_init()
[all …]
/linux-5.10/drivers/net/ethernet/chelsio/cxgb/
Dmv88e1xxx.c50 u32 ctl; in mv88e1xxx_reset() local
56 (void) simple_mdio_read(cphy, MII_BMCR, &ctl); in mv88e1xxx_reset()
57 ctl &= BMCR_RESET; in mv88e1xxx_reset()
58 if (ctl) in mv88e1xxx_reset()
60 } while (ctl && --time_out); in mv88e1xxx_reset()
62 return ctl ? -1 : 0; in mv88e1xxx_reset()
127 u32 ctl; in mv88e1xxx_set_speed_duplex() local
129 (void) simple_mdio_read(phy, MII_BMCR, &ctl); in mv88e1xxx_set_speed_duplex()
131 ctl &= ~(BMCR_SPEED100 | BMCR_SPEED1000 | BMCR_ANENABLE); in mv88e1xxx_set_speed_duplex()
133 ctl |= BMCR_SPEED100; in mv88e1xxx_set_speed_duplex()
[all …]

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