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/linux/drivers/media/platform/amlogic/c3/mipi-csi2/
H A Dc3-mipi-csi2.c1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
14 #include <media/v4l2-async.h>
15 #include <media/v4l2-common.h>
16 #include <media/v4l2-device.h>
17 #include <media/v4l2-fwnode.h>
18 #include <media/v4l2-mc.h>
19 #include <media/v4l2-subdev.h>
21 /* C3 CSI-2 submodule definition */
38 #define MIPI_CSI2_SUBDEV_NAME "c3-mipi-csi2"
40 /* C3 CSI-2 APHY register */
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/linux/drivers/media/pci/intel/ivsc/
H A Dmei_csi.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Intel Visual Sensing Controller CSI Linux driver
8 * To set ownership of CSI-2 link and to configure CSI-2 link, there
29 #include <media/ipu-bridge.h>
30 #include <media/ipu6-pci-table.h>
31 #include <media/v4l2-async.h>
32 #include <media/v4l2-ctrls.h>
33 #include <media/v4l2-fwnode.h>
34 #include <media/v4l2-subdev.h>
36 #define MEI_CSI_ENTITY_NAME "Intel IVSC CSI"
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/linux/Documentation/admin-guide/media/
H A Dimx7.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
14 - CMOS Sensor Interface (CSI)
15 - Video Multiplexer
16 - MIPI CSI-2 Receiver
18 .. code-block:: none
20 MIPI Camera Input ---> MIPI CSI-2 --- > |\
24 | U | ------> CSI ---> Capture
27 Parallel Camera Input ----------------> | /
34 --------
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H A Dimx.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
20 - Video De-Interlacing or Combining Block (VDIC)
26 re-ordering (for example UYVY to YUYV) within the same colorspace, and
27 packed <--> planar conversion. The IDMAC can also perform a simple
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H A Draspberrypi-rp1-cfe.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Raspberry Pi PiSP Camera Front End (rp1-cfe)
10 The PiSP Camera Front End (CFE) is a module which combines a CSI-2 receiver with
14 received from the CSI-2 to the memory. One of those streams can also be routed
16 (e.g. non-scaled and downscaled versions) of the received frames to memory and
21 <https://datasheets.raspberrypi.com/camera/raspberry-pi-image-signal-processor-specification.pdf>`_,
25 The rp1-cfe driver
28 The Raspberry Pi PiSP Camera Front End (rp1-cfe) driver is located under
29 drivers/media/platform/raspberrypi/rp1-cfe. It uses the `V4L2 API` to register
31 subdevices for the CSI-2 received and the FE that connects the video devices in
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/linux/drivers/media/platform/nxp/
H A Dimx7-media-csi.c1 // SPDX-License-Identifier: GPL-2.0
3 * V4L2 Capture CSI Subdev for Freescale i.MX6UL/L / i.MX7 SOC
13 #include <linux/dma-mapping.h>
33 #include <media/media-device.h>
34 #include <media/media-entity.h>
35 #include <media/v4l2-async.h>
36 #include <media/v4l2-common.h>
37 #include <media/v4l2-dev.h>
38 #include <media/v4l2-device.h>
39 #include <media/v4l2-fh.h>
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
8 tristate "NXP CSI Bridge driver"
17 Driver for the NXP Camera Sensor Interface (CSI) Bridge. This device
21 tristate "NXP i.MX8MQ MIPI CSI-2 receiver"
28 Video4Linux2 driver for the MIPI CSI-2 receiver found on the i.MX8MQ
32 tristate "NXP MIPI CSI-2 CSIS receiver found on i.MX7 and i.MX8 models"
39 Video4Linux2 sub-device driver for the MIPI CSI-2 CSIS receiver
42 source "drivers/media/platform/nxp/imx8-isi/Kconfig"
53 The i.MX Pixel Pipeline is a memory-to-memory engine for scaling,
57 tristate "NXP MX2 eMMa-PrP support"
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/linux/drivers/gpu/ipu-v3/
H A Dipu-csi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2012-2014 Mentor Graphics Inc.
4 * Copyright (C) 2005-2009 Freescale Semiconductor, Inc.
15 #include <uapi/linux/v4l2-mediabus.h>
17 #include <linux/clk-provider.h>
20 #include "ipu-prv.h"
32 /* CSI Register Offsets */
55 /* CSI Register Fields */
60 #define CSI_SENS_CONF_DATA_FMT_YUV422_UYVY 2L
69 #define CSI_SENS_CONF_DATA_POL_SHIFT 2
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/linux/Documentation/devicetree/bindings/media/xilinx/
H A Dxlnx,csi2rxss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx MIPI CSI-2 Receiver Subsystem
10 - Vishal Sagar <vishal.sagar@amd.com>
13 The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2
16 The subsystem consists of a MIPI D-PHY in slave mode which captures the
17 data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the
20 For more details, please refer to PG232 Xilinx MIPI CSI-2 Receiver Subsystem.
21 Please note that this bindings includes only the MIPI CSI-2 Rx controller
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/linux/drivers/staging/media/tegra-video/
H A Dtegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * VI and CSI SoC specific data, operations and registers accessors.
17 #include "csi.h"
40 /* Tegra210 VI CSI registers */
64 /* Tegra210 CSI Pixel Parser registers: Starts from 0x838, offset 0x0 */
86 #define CSI_PP_SINGLE_SHOT_ENABLE (0x1 << 2)
92 /* Tegra210 CSI PHY registers */
117 #define PG_MODE_OFFSET 2
150 writel_relaxed(val, chan->vi->iomem + addr); in tegra_vi_write()
155 return readl_relaxed(chan->vi->iomem + addr); in tegra_vi_read()
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H A Dcsi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 #include <media/media-entity.h>
10 #include <media/v4l2-async.h>
11 #include <media/v4l2-subdev.h>
14 * Each CSI brick supports max of 4 lanes that can be used as either
15 * one x4 port using both CILA and CILB partitions of a CSI brick or can
19 #define CSI_PORTS_PER_BRICK 2
22 /* Maximum 2 CSI x4 ports can be ganged up for streaming */
23 #define GANG_PORTS_MAX 2
25 /* each CSI channel can have one sink and one source pads */
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/linux/Documentation/driver-api/media/drivers/
H A Dipu6.rst1 .. SPDX-License-Identifier: GPL-2.0
34 ------------------------
51 ---------
61 -------------------------------------
76 -----------------
80 Buttress with a copy of the SoC time, this counter maintains the up-to-date time
90 32-bit virtual address space. The IPU6 has MMU address translation hardware to
94 IPU6 driver. The IPU6 driver sets the level-1 page table base address to MMU
106 component includes 3 entries - manifest, metadata and module data. Manifest and
109 directory. The IPU6 driver (``ipu6-cpd.c`` in particular) parses and validates
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/linux/drivers/media/platform/renesas/rcar-vin/
H A Drcar-vin.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Driver for Renesas R-Car VIN
7 * Copyright (C) 2011-2013 Renesas Solutions Corp.
17 #include <media/v4l2-async.h>
18 #include <media/v4l2-ctrls.h>
19 #include <media/v4l2-dev.h>
20 #include <media/v4l2-device.h>
21 #include <media/v4l2-fwnode.h>
22 #include <media/videobuf2-v4l2.h>
65 * struct rvin_video_format - Data format stored in memory
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/linux/Documentation/devicetree/bindings/misc/
H A Difm-csi.txt4 - compatible: "ifm,o2d-csi"
5 - reg: specifies sensor chip select number and associated address range
6 - interrupts: external interrupt line number and interrupt sense mode
8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable"
10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor
12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25)
13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16)
14 - ifm,csi-wait-cycles: sensor bus wait cycles
17 - ifm,csi-byte-swap: if this property is present, the byte swapping on
22 csi@3,0 {
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/linux/Documentation/devicetree/bindings/media/
H A Dti,omap3isp.txt4 The DT definitions can be found in include/dt-bindings/media/omap3-isp.h.
9 compatible : must contain "ti,omap3-isp"
14 CSI PHYs and receivers registers.
17 syscon : the phandle and register offset to the Complex I/O or CSI-PHY
19 ti,phy-type : 0 -- OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. 3430)
20 1 -- OMAP3ISP_PHY_TYPE_CSIPHY (e.g. 3630)
21 #clock-cells : Must be 1 --- the ISP provides two external clocks,
24 clock bindings in ../clock/clock-bindings.txt.
27 ---------------------
30 video-interfaces.txt in the same directory.
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H A Dnxp,imx7-csi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx7-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: i.MX7 and i.MX8 CSI bridge (CMOS Sensor Interface)
10 - Rui Miguel Silva <rmfrfs@gmail.com>
13 This is device node for the CMOS Sensor Interface (CSI) which enables the
19 - enum:
20 - fsl,imx8mq-csi
21 - fsl,imx7-csi
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H A Dst,stm32mp25-csi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/st,stm32mp25-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 CSI controller
10 The STM32 CSI controller, coupled with a D-PHY allows connecting a CSI-2
14 - Alain Volmat <alain.volmat@foss.st.com>
19 - st,stm32mp25-csi
30 clock-names:
32 - const: pclk
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H A Drenesas,rzg2l-csi2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/renesas,rzg2l-csi2.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas RZ/G2L (and alike SoC's) MIPI CSI-2 receiver
11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
14 The CSI-2 receiver device provides MIPI CSI-2 capabilities for the Renesas RZ/G2L
15 (and alike SoCs). MIPI CSI-2 is part of the CRU block which is used in conjunction
21 - items:
22 - enum:
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H A Dallwinner,sun6i-a31-csi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A31 CMOS Sensor Interface (CSI)
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - allwinner,sun6i-a31-csi
17 - allwinner,sun8i-a83t-csi
18 - allwinner,sun8i-h3-csi
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H A Dfsl,imx6-mipi-csi2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/fsl,imx6-mipi-csi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MIPI CSI-2 Receiver core in the i.MX SoC
10 This is the device node for the MIPI CSI-2 Receiver core in the i.MX
11 SoC. This is a Synopsys Designware MIPI CSI-2 host controller core
12 combined with a D-PHY core mixed into the same register block. In
13 addition this device consists of an i.MX-specific "CSI2IPU gasket"
16 controller's 32-bit output image bus onto four 16-bit parallel busses
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/linux/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,imx8mm-disp-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MM DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MM DISP blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the display and MIPI CSI
20 - const: fsl,imx8mm-disp-blk-ctrl
21 - const: syscon
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/linux/Documentation/userspace-api/media/v4l/
H A Dmetafmt-generic.rst1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
8 Generic line-based metadata formats
14 These generic line-based metadata formats define the memory layout of the data
17 .. _v4l2-meta-fmt-generic-8:
20 -----------------------
22 The V4L2_META_FMT_GENERIC_8 format is a plain 8-bit metadata format. This format
23 is used on CSI-2 for 8 bits per :term:`Data Unit`.
26 packed into one 16-bit Data Unit. Otherwise the 16 bits per pixel dataformat is
27 :ref:`V4L2_META_FMT_GENERIC_CSI2_16 <v4l2-meta-fmt-generic-csi2-16>`.
34 .. flat-table:: Sample 4x2 Metadata Frame
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/linux/drivers/acpi/
H A Dmipi-disco-img.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Support MIPI DisCo for Imaging by parsing ACPI _CRS CSI-2 records defined in
8 * Section 6.4.3.8.2.4 "Camera Serial Interface (CSI-2) Connection Resource
12 * The implementation looks for the information in the ACPI namespace (CSI-2
14 * Documentation/firmware-guide/acpi/dsd/graph.rst to represent the CSI-2
16 * extracted from the _CRS CSI-2 resource descriptors and the MIPI DisCo
18 * with CSI-2 connections.
31 #include <media/v4l2-fwnode.h>
41 /* Connection data extracted from one _CRS CSI-2 resource descriptor. */
49 /* Data extracted from _CRS CSI-2 resource descriptors for one device. */
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/linux/drivers/media/platform/sunxi/sun4i-csi/
H A Dsun4i_dma.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright (C) 2016-2019 Bootlin
14 #include <media/videobuf2-dma-contig.h>
15 #include <media/videobuf2-v4l2.h>
36 static void sun4i_csi_capture_start(struct sun4i_csi *csi) in sun4i_csi_capture_start() argument
38 writel(CSI_CPT_CTRL_VIDEO_START, csi->regs + CSI_CPT_CTRL_REG); in sun4i_csi_capture_start()
41 static void sun4i_csi_capture_stop(struct sun4i_csi *csi) in sun4i_csi_capture_stop() argument
43 writel(0, csi->regs + CSI_CPT_CTRL_REG); in sun4i_csi_capture_stop()
52 struct sun4i_csi *csi = vb2_get_drv_priv(vq); in sun4i_csi_queue_setup() local
53 unsigned int num_planes = csi->fmt.num_planes; in sun4i_csi_queue_setup()
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/linux/Documentation/devicetree/bindings/phy/
H A Dmediatek,mt8365-csi-rx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/mediatek,mt8365-csi-rx.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Mediatek Sensor Interface MIPI CSI CD-PHY
11 - Julien Stephan <jstephan@baylibre.com>
12 - Andy Hsieh <andy.hsieh@mediatek.com>
15 The SENINF CD-PHY is a set of CD-PHY connected to the SENINF CSI-2
17 Depending on the SoC model, each PHYs can be either CD-PHY or D-PHY only
23 - mediatek,mt8365-csi-rx
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