Searched full:cpha (Results 1 – 11 of 11) sorted by relevance
| /linux-3.3/Documentation/blackfin/ |
| D | bfin-spi-notes.txt | 3 With the Blackfin on-chip SPI peripheral, there is some logic tied to the CPHA
4 bit whether the Slave Select Line is controlled by hardware (CPHA=0) or
5 controlled by software (CPHA=1). However, the Linux SPI bus driver assumes that
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| /linux-3.3/Documentation/devicetree/bindings/spi/ |
| D | spi-bus.txt | 32 - spi-cpha - (optional) Empty property indicating device requires
33 shifted clock phase (CPHA) mode
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| /linux-3.3/Documentation/spi/ |
| D | spi-summary | 104 - CPHA indicates the clock phase used to sample data; CPHA=0 says
105 sample on the leading edge, CPHA=1 means the trailing edge.
107 Since the signal needs to stablize before it's sampled, CPHA=0
112 but their timing diagrams will make the CPOL and CPHA modes clear.
114 In the SPI mode number, CPOL is the high order bit and CPHA is the
117 trailing clock edge (CPHA=1), that's SPI mode 1.
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| D | spidev_test.c | 80 " -H --cpha clock phase\n" in print_usage()
97 { "cpha", 0, 0, 'H' }, in parse_opts()
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| /linux-3.3/drivers/of/ |
| D | of_spi.c | 64 if (of_find_property(nc, "spi-cpha", NULL)) in of_register_spi_devices()
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| /linux-3.3/drivers/spi/ |
| D | spi-sh-msiof.c | 170 u32 cpol, u32 cpha, in sh_msiof_spi_set_pin_regs() argument
177 * CPOL CPHA TSCKIZ RSCKIZ TEDG REDG in sh_msiof_spi_set_pin_regs()
191 edge = cpol ^ !cpha; in sh_msiof_spi_set_pin_regs()
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| D | spi-ppc4xx.c | 51 * Note: This is the inverse of CPHA.
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| D | spi-bfin5xx.c | 1063 dev_warn(&spi->dev, "Warning: SPI CPHA not set:" in bfin_spi_setup()
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| /linux-3.3/arch/arm/mach-s3c2412/ |
| D | mach-jive.c | 427 .mode = SPI_MODE_3, /* CPOL=1, CPHA=1 */
435 .mode = SPI_MODE_0, /* CPOL=0, CPHA=0 */
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| /linux-3.3/arch/blackfin/mach-bf548/include/mach/ |
| D | anomaly.h | 189 /* Slave-Mode SPI0 MISO Failure With CPHA = 0 */
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| /linux-3.3/drivers/net/ethernet/ |
| D | jme.h | 89 __u8 mode; /* CPOL, CPHA, and Duplex mode of SPI */
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