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/linux-6.8/drivers/s390/cio/
Dcmf.c27 #include <asm/cmb.h>
219 if (!cdev->private->cmb) in set_schib_wait()
287 cmb_data = cdev->private->cmb; in cmf_copy_block()
305 if (!cdev->private->cmb) in cmf_cmb_copy_wait()
355 cmb_data = cdev->private->cmb; in cmf_generic_reset()
370 * struct cmb_area - container for global cmb data
378 struct cmb *mem;
390 /* ****** old style CMB handling ********/
405 * struct cmb - basic channel measurement block
418 * The cmb area made up from these blocks must be a contiguous array and may
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Dio_sch.h175 void *cmb; /* measurement information */ member
177 u64 cmb_start_time; /* clock value of cmb reset */
178 void *cmb_wait; /* deferred cmb enable/disable */
Ddevice.c32 #include <asm/cmb.h>
/linux-6.8/Documentation/driver-api/pci/
Dp2pdma.rst49 in that it exposes any CMB (Controller Memory Buffer) as a P2P memory
51 to be used directly (client) and it can also make use of the CMB as
56 to the P2P memory (CMB) and then to the NVMe device (and vice versa).
62 then the NVMe Target could use the RNIC's memory instead of the CMB
63 in cases where the NVMe cards in use do not have CMB support.
/linux-6.8/drivers/net/ethernet/atheros/atlx/
Datl1.h201 /* CMB/SMB Control Register */
208 /* CMB DMA Write Threshold Register */
215 /* RX/TX count-down timer to trigger CMB-write. 2us resolution. */
222 /* Number of packet received since last CMB write */
225 /* Number of packet transmitted since last CMB write */
376 * CMB to host memory. Software should clear
377 * this bit when CMB info is processed. */
581 * message blocks (cmb, smb) described below
633 /* coalescing message block (cmb) */
635 struct coals_msg_block *cmb; member
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Datl1.c1084 /* init CMB */ in atl1_setup_ring_resources()
1085 adapter->cmb.dma = rrd_ring->dma + rrd_ring->size; in atl1_setup_ring_resources()
1086 offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0; in atl1_setup_ring_resources()
1087 adapter->cmb.dma += offset; in atl1_setup_ring_resources()
1088 adapter->cmb.cmb = (struct coals_msg_block *) in atl1_setup_ring_resources()
1092 adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block); in atl1_setup_ring_resources()
1096 ((u8 *) adapter->cmb.cmb + in atl1_setup_ring_resources()
1234 adapter->cmb.dma = 0; in atl1_free_ring_resources()
1235 adapter->cmb.cmb = NULL; in atl1_free_ring_resources()
1480 iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL), in atl1_configure()
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Datl2.c597 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */ in atl2_intr()
/linux-6.8/arch/s390/include/asm/
Dcmb.h5 #include <uapi/asm/cmb.h>
/linux-6.8/drivers/net/ethernet/pensando/ionic/
Dionic_ethtool.c536 netdev_info(lif->netdev, "CMB rings are not supported on this device\n"); in ionic_validate_cmb_config()
543 "CMB rings for tx-push are not supported on this device\n"); in ionic_validate_cmb_config()
554 "CMB rings for rx-push are not supported on this device\n"); in ionic_validate_cmb_config()
565 "Not enough CMB pages for number of queues and size of descriptor rings, need %d have %d", in ionic_validate_cmb_config()
579 netdev_info(lif->netdev, "Please stop device to toggle CMB for tx/rx-push\n"); in ionic_cmb_rings_toggle()
601 netdev_info(lif->netdev, "Enabling CMB %s %s rings - %d pages\n", in ionic_cmb_rings_toggle()
604 netdev_info(lif->netdev, "Disabling CMB rings\n"); in ionic_cmb_rings_toggle()
Dionic_lif.c30 * 2 = ... with CMB rings
34 * 3 = ... with CMB rings
629 /* on-chip CMB q descriptors */ in ionic_qcq_alloc()
637 "Cannot allocate queue order %d from cmb: err %d\n", in ionic_qcq_alloc()
644 netdev_err(lif->netdev, "Cannot map queue from cmb\n"); in ionic_qcq_alloc()
2701 /* When changing CMB queue parameters, we're using limited in ionic_cmb_reconfig()
2722 "CMB reconfig failed, restoring values: %d\n", err); in ionic_cmb_reconfig()
2729 "CMB restore failed: %d\n", err); in ionic_cmb_reconfig()
2737 "CMB reconfig failed: %d\n", err); in ionic_cmb_reconfig()
2791 /* Are we changing q params while CMB is on */ in ionic_reconfigure_queues()
Dionic_dev.c150 dev_warn(dev, "No memory for CMB, disabling\n"); in ionic_dev_setup()
Dionic_if.h375 * @IONIC_QIDENT_F_CMB: Queue is in cmb bar
687 #define IONIC_QINIT_F_CMB 0x10 /* Enable cmb-based queue */
/linux-6.8/drivers/net/ethernet/atheros/atl1e/
Datl1e_hw.h213 #define IDLE_STATUS_CMB 0x80 /* 1: CMB state machine is in non-IDLE state. 0: CMB is …
495 /* CMB/SMB Control Register */
609 /* Tpd CMB DMA Address */
Datl1e.h405 u32 *cmb; member
Datl1e_main.c850 /* Init CMB dma address */ in atl1e_setup_ring_resources()
852 tx_ring->cmb = adapter->ring_vir_addr + offset; in atl1e_setup_ring_resources()
/linux-6.8/Documentation/devicetree/bindings/arm/
Dqcom,coresight-tpdm.yaml13 Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete
Dqcom,coresight-tpda.yaml15 task for free-flowing data from TPDM (i.e. CMB and DSB data set flows).
/linux-6.8/Documentation/driver-api/
Ds390-drivers.rst97 .. kernel-doc:: arch/s390/include/uapi/asm/cmb.h
/linux-6.8/drivers/nvme/host/
Dconstants.c97 [NVME_SC_CMD_NOT_SUP_CMB_QUEUE] = "Command Not Supported for Queue in CMB",
Dpci.c1852 * Tell the controller about the host side address mapping the CMB, in nvme_map_cmb()
1853 * and enable CMB decoding for the NVMe 1.4+ scheme: in nvme_map_cmb()
1862 * Controllers may support a CMB size larger than their BAR, in nvme_map_cmb()
1863 * for example, due to being behind a bridge. Reduce the CMB to in nvme_map_cmb()
1871 "failed to register the CMB\n"); in nvme_map_cmb()
2075 static DEVICE_ATTR_RO(cmb);
/linux-6.8/drivers/hwtracing/coresight/
Dcoresight-tpdm.c274 * Continuous Multi-Bit(CMB), Multi-lane CMB(MCMB) and Discrete Single
/linux-6.8/drivers/staging/media/starfive/camss/
Dstf-isp.h244 #define CMB(n) ((n) << 0) macro
Dstf-isp-hw-ops.c295 stf_isp_reg_write(stfcamss, ISP_REG_CS_THRESHOLD, CMD(0x1f) | CMB(0x1)); in stf_isp_config_sat()
/linux-6.8/drivers/s390/block/
Ddasd_ioctl.c23 #include <asm/cmb.h>