Searched full:clk_top_venc_lt_sel (Results 1 – 6 of 6) sorted by relevance
179 <&topckgen CLK_TOP_VENC_LT_SEL>,189 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>,
70 <&topckgen CLK_TOP_VENC_LT_SEL>;
494 <&topckgen CLK_TOP_VENC_LT_SEL>;1420 <&topckgen CLK_TOP_VENC_LT_SEL>,1430 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>,1533 clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;1535 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
115 #define CLK_TOP_VENC_LT_SEL 105 macro
192 <&topckgen CLK_TOP_VENC_LT_SEL>;
570 MUX_GATE(CLK_TOP_VENC_LT_SEL, "venclt_sel", venc_lt_parents,