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/linux-5.10/drivers/i2c/busses/
Di2c-qcom-cci.c108 struct cci;
116 struct cci *cci; member
127 struct cci { struct
139 struct cci *cci = dev; in cci_isr() argument
143 val = readl(cci->base + CCI_IRQ_STATUS_0); in cci_isr()
144 writel(val, cci->base + CCI_IRQ_CLEAR_0); in cci_isr()
145 writel(0x1, cci->base + CCI_IRQ_GLOBAL_CLEAR_CMD); in cci_isr()
148 complete(&cci->master[0].irq_complete); in cci_isr()
149 if (cci->master[1].master) in cci_isr()
150 complete(&cci->master[1].irq_complete); in cci_isr()
[all …]
/linux-5.10/Documentation/devicetree/bindings/arm/
Dcci.txt2 ARM CCI cache coherent interconnect binding description
6 cache coherent interconnect (CCI) that is capable of monitoring bus
14 * CCI interconnect node
16 Description: Describes a CCI cache coherent Interconnect component
18 Node name must be "cci".
20 through the CCI interconnect is the same as the one seen from the
22 Every CCI node has to define the following properties:
28 "arm,cci-400"
29 "arm,cci-500"
30 "arm,cci-550"
[all …]
/linux-5.10/drivers/bus/
Darm-cci.c2 * CCI cache coherent interconnect driver
17 #include <linux/arm-cci.h>
49 {.compatible = "arm,cci-400", .data = CCI400_PORTS_DATA },
52 { .compatible = "arm,cci-500", },
53 { .compatible = "arm,cci-550", },
59 OF_DEV_AUXDATA("arm,cci-400-pmu", 0, NULL, &cci_ctrl_base),
60 OF_DEV_AUXDATA("arm,cci-400-pmu,r0", 0, NULL, &cci_ctrl_base),
61 OF_DEV_AUXDATA("arm,cci-400-pmu,r1", 0, NULL, &cci_ctrl_base),
62 OF_DEV_AUXDATA("arm,cci-500-pmu,r0", 0, NULL, &cci_ctrl_base),
63 OF_DEV_AUXDATA("arm,cci-550-pmu,r0", 0, NULL, &cci_ctrl_base),
[all …]
/linux-5.10/Documentation/devicetree/bindings/i2c/
Di2c-qcom-cci.txt1 Qualcomm Camera Control Interface (CCI) I2C controller
9 "qcom,msm8916-cci"
10 "qcom,msm8996-cci"
11 "qcom,sdm845-cci"
16 Definition: base address CCI I2C controller and length of memory
22 Definition: specifies the CCI I2C interrupt. The format of the
35 Definition: a list of clock names, must include "cci" clock.
38 Usage: required for "qcom,msm8996-cci"
44 The CCI provides I2C masters for one (msm8916) or two i2c busses (msm8996 and
52 Definition: Index of the CCI bus/master
[all …]
/linux-5.10/drivers/perf/
DKconfig10 tristate "ARM CCI PMU driver"
14 Support for PMU events monitoring on the ARM CCI (Cache Coherent
17 If compiled as a module, it will be called arm-cci.
20 bool "support CCI-400"
25 CCI-400 provides 4 independent event counters counting events related
29 bool "support CCI-500/CCI-550"
33 CCI-500/CCI-550 both provide 8 independent event counters, which can
35 internal events to the CCI.
Darm-cci.c2 // CCI Cache Coherent Interconnect PMU driver
6 #include <linux/arm-cci.h>
19 #define DRIVER_NAME "ARM-CCI PMU"
165 * Instead of an event id to monitor CCI cycles, a dedicated counter is
166 * provided. Use 0xff to represent CCI cycles and hope that no future revisions
177 * CCI PMU event id is an 8-bit value made of two parts - bits 7:5 for one of 8
638 * Program the CCI PMU counters which have PERF_HES_ARCH set
752 * For all counters on the CCI-PMU, disable any 'enabled' counters,
791 * by the cci
837 dev_err(&pmu_device->dev, "no irqs for CCI PMUs defined\n"); in pmu_request_irq()
[all …]
/linux-5.10/drivers/usb/typec/ucsi/
Dtrace.c36 const char *ucsi_cci_str(u32 cci) in ucsi_cci_str() argument
38 if (UCSI_CCI_CONNECTOR(cci)) { in ucsi_cci_str()
39 if (cci & UCSI_CCI_ACK_COMPLETE) in ucsi_cci_str()
41 if (cci & UCSI_CCI_COMMAND_COMPLETE) in ucsi_cci_str()
45 if (cci & UCSI_CCI_ACK_COMPLETE) in ucsi_cci_str()
47 if (cci & UCSI_CCI_COMMAND_COMPLETE) in ucsi_cci_str()
Ducsi_acpi.c99 u32 cci; in ucsi_acpi_notify() local
102 ret = ucsi_acpi_read(ua->ucsi, UCSI_CCI, &cci, sizeof(cci)); in ucsi_acpi_notify()
107 cci & (UCSI_CCI_ACK_COMPLETE | UCSI_CCI_COMMAND_COMPLETE)) in ucsi_acpi_notify()
109 else if (UCSI_CCI_CONNECTOR(cci)) in ucsi_acpi_notify()
110 ucsi_connector_change(ua->ucsi, UCSI_CCI_CONNECTOR(cci)); in ucsi_acpi_notify()
Ducsi.c120 u32 cci; in ucsi_exec_command() local
127 ret = ucsi->ops->read(ucsi, UCSI_CCI, &cci, sizeof(cci)); in ucsi_exec_command()
131 if (cci & UCSI_CCI_BUSY) in ucsi_exec_command()
134 if (!(cci & UCSI_CCI_COMMAND_COMPLETE)) in ucsi_exec_command()
137 if (cci & UCSI_CCI_NOT_SUPPORTED) in ucsi_exec_command()
140 if (cci & UCSI_CCI_ERROR) { in ucsi_exec_command()
146 return UCSI_CCI_LENGTH(cci); in ucsi_exec_command()
743 u32 cci; in ucsi_reset_ppm() local
761 ret = ucsi->ops->read(ucsi, UCSI_CCI, &cci, sizeof(cci)); in ucsi_reset_ppm()
766 if (cci & ~UCSI_CCI_RESET_COMPLETE) { in ucsi_reset_ppm()
[all …]
/linux-5.10/arch/arm/boot/dts/
Dexynos5420-cpus.dtsi31 cci-control-port = <&cci_control1>;
43 cci-control-port = <&cci_control1>;
55 cci-control-port = <&cci_control1>;
67 cci-control-port = <&cci_control1>;
79 cci-control-port = <&cci_control0>;
91 cci-control-port = <&cci_control0>;
103 cci-control-port = <&cci_control0>;
115 cci-control-port = <&cci_control0>;
Dexynos5422-cpus.dtsi30 cci-control-port = <&cci_control0>;
43 cci-control-port = <&cci_control0>;
56 cci-control-port = <&cci_control0>;
69 cci-control-port = <&cci_control0>;
82 cci-control-port = <&cci_control1>;
95 cci-control-port = <&cci_control1>;
108 cci-control-port = <&cci_control1>;
121 cci-control-port = <&cci_control1>;
Dexynos5260.dtsi41 cci-control-port = <&cci_control1>;
48 cci-control-port = <&cci_control1>;
55 cci-control-port = <&cci_control0>;
62 cci-control-port = <&cci_control0>;
69 cci-control-port = <&cci_control0>;
76 cci-control-port = <&cci_control0>;
200 cci: cci@10f00000 { label
201 compatible = "arm,cci-400";
208 compatible = "arm,cci-400-ctrl-if";
214 compatible = "arm,cci-400-ctrl-if";
Dmt7629.dtsi32 cci-control-port = <&cci_control2>;
40 cci-control-port = <&cci_control2>;
175 cci: cci@10390000 { label
176 compatible = "arm,cci-400";
183 compatible = "arm,cci-400-ctrl-if";
189 compatible = "arm,cci-400-ctrl-if";
195 compatible = "arm,cci-400-ctrl-if";
201 compatible = "arm,cci-400-pmu,r1";
Dvexpress-v2p-ca15_a7.dts42 cci-control-port = <&cci_control1>;
52 cci-control-port = <&cci_control1>;
62 cci-control-port = <&cci_control2>;
72 cci-control-port = <&cci_control2>;
82 cci-control-port = <&cci_control2>;
161 cci@2c090000 {
162 compatible = "arm,cci-400";
169 compatible = "arm,cci-400-ctrl-if";
175 compatible = "arm,cci-400-ctrl-if";
181 compatible = "arm,cci-400-pmu,r0";
Dsun9i-a80.dtsi70 cci-control-port = <&cci_control0>;
79 cci-control-port = <&cci_control0>;
88 cci-control-port = <&cci_control0>;
97 cci-control-port = <&cci_control0>;
106 cci-control-port = <&cci_control1>;
115 cci-control-port = <&cci_control1>;
124 cci-control-port = <&cci_control1>;
133 cci-control-port = <&cci_control1>;
551 cci: cci@1c90000 { label
552 compatible = "arm,cci-400";
[all …]
Dsun8i-a83t.dtsi69 cci-control-port = <&cci_control0>;
80 cci-control-port = <&cci_control0>;
91 cci-control-port = <&cci_control0>;
102 cci-control-port = <&cci_control0>;
113 cci-control-port = <&cci_control1>;
124 cci-control-port = <&cci_control1>;
135 cci-control-port = <&cci_control1>;
146 cci-control-port = <&cci_control1>;
405 cci@1790000 {
406 compatible = "arm,cci-400";
[all …]
/linux-5.10/arch/ia64/kernel/
Dtopology.c121 pal_cache_config_info_t cci; member
184 return sprintf(buf, "%u\n", 1 << this_leaf->cci.pcci_line_size); in show_coherency_line_size()
190 return sprintf(buf, "%u\n", this_leaf->cci.pcci_assoc); in show_ways_of_associativity()
197 cache_mattrib[this_leaf->cci.pcci_cache_attr]); in show_attributes()
202 return sprintf(buf, "%uK\n", this_leaf->cci.pcci_cache_size / 1024); in show_size()
207 unsigned number_of_sets = this_leaf->cci.pcci_cache_size; in show_number_of_sets()
208 number_of_sets /= this_leaf->cci.pcci_assoc; in show_number_of_sets()
209 number_of_sets /= 1 << this_leaf->cci.pcci_line_size; in show_number_of_sets()
226 int type = this_leaf->type + this_leaf->cci.pcci_unified; in show_type()
307 pal_cache_config_info_t cci; in cpu_cache_sysfs_init() local
[all …]
Dpalinfo.c215 pal_cache_config_info_t cci; in cache_info() local
230 if ((status=ia64_pal_cache_config_info(i,j, &cci)) != 0) in cache_info()
237 cache_types[j+cci.pcci_unified], i+1, in cache_info()
238 cci.pcci_cache_size); in cache_info()
240 if (cci.pcci_unified) in cache_info()
243 seq_printf(m, "%s\n", cache_mattrib[cci.pcci_cache_attr]); in cache_info()
249 cci.pcci_assoc, in cache_info()
250 1<<cci.pcci_line_size, in cache_info()
251 1<<cci.pcci_stride); in cache_info()
256 cci.pcci_st_latency); in cache_info()
[all …]
Dsetup.c877 pal_cache_config_info_t cci; in get_cache_info() local
894 status = ia64_pal_cache_config_info(l, 2, &cci); in get_cache_info()
901 cci.pcci_stride = I_CACHE_STRIDE_SHIFT; in get_cache_info()
904 cci.pcci_unified = 1; in get_cache_info()
906 if (cci.pcci_stride < ia64_cache_stride_shift) in get_cache_info()
907 ia64_cache_stride_shift = cci.pcci_stride; in get_cache_info()
909 line_size = 1 << cci.pcci_line_size; in get_cache_info()
914 if (!cci.pcci_unified) { in get_cache_info()
916 status = ia64_pal_cache_config_info(l, 1, &cci); in get_cache_info()
922 cci.pcci_stride = I_CACHE_STRIDE_SHIFT; in get_cache_info()
[all …]
/linux-5.10/arch/arm/mach-vexpress/
Dplatsmp.c31 * is to detect if the kernel can take over CCI ports in vexpress_smp_init_ops()
32 * control. Loop over possible CPUs and check if CCI in vexpress_smp_init_ops()
43 cci_node = of_parse_phandle(cpu_node, "cci-control-port", 0); in vexpress_smp_init_ops()
/linux-5.10/include/linux/
Darm-cci.h3 * CCI cache coherent interconnect support
14 #include <asm/arm-cci.h>
/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt7622.dtsi82 cci-control-port = <&cci_control2>;
96 cci-control-port = <&cci_control2>;
340 cci: cci@10390000 { label
341 compatible = "arm,cci-400";
348 compatible = "arm,cci-400-ctrl-if";
354 compatible = "arm,cci-400-ctrl-if";
360 compatible = "arm,cci-400-ctrl-if";
366 compatible = "arm,cci-400-pmu,r1";
/linux-5.10/arch/arm64/include/asm/
Darm-cci.h3 * arch/arm64/include/asm/arm-cci.h
/linux-5.10/drivers/ata/
Dahci_ceva.c148 /* Set AXI cache control register if CCi is enabled */ in ahci_ceva_setup()
269 * Check if CCI is enabled for SATA. The DEV_DMA_COHERENT is returned in ceva_ahci_probe()
270 * if CCI is enabled, so check for DEV_DMA_COHERENT. in ceva_ahci_probe()
/linux-5.10/arch/arm/include/asm/
Darm-cci.h3 * arch/arm/include/asm/arm-cci.h

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