Searched full:apb3 (Results 1 – 10 of 10) sorted by relevance
20 sensor core functionality (APB3-bus based) and exposes an additional41 APB3-------------------------------------------------+61 - description: APB3 interface clock
47 - description: APB3 interface clock
17 Clock is a division of the APB3 clock.
58 /* APB3 */
213 #define NPCM7XX_CLK_S_APB3 "apb3"
526 /* * APB3 peripheral */ in register_core_and_bus_clocks()
230 LPC1XX_CGU_BASE_CLK(APB3, base_common_src_ids, 0),
642 /* Enable APB3 fail on error */ in meson_dw_hdmi_init()
183 * sub-block registers space via the APB3 bus. In addition the wrapper provides
1228 /* The PCS registers are accessed using mmio. The underlying APB3 in xgbe_read_mmd_regs_v1()1256 /* The PCS registers are accessed using mmio. The underlying APB3 in xgbe_write_mmd_regs_v1()