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/linux-5.10/sound/soc/tegra/
Dtegra30_ahub.c3 * tegra30_ahub.c - Tegra30 AHUB driver
21 #define DRV_NAME "tegra30-ahub"
23 static struct tegra30_ahub *ahub; variable
27 regmap_write(ahub->regmap_apbif, reg, val); in tegra30_apbif_write()
34 regmap_read(ahub->regmap_apbif, reg, &val); in tegra30_apbif_read()
40 regmap_write(ahub->regmap_ahub, reg, val); in tegra30_audio_write()
45 regcache_cache_only(ahub->regmap_apbif, true); in tegra30_ahub_runtime_suspend()
46 regcache_cache_only(ahub->regmap_ahub, true); in tegra30_ahub_runtime_suspend()
48 clk_disable_unprepare(ahub->clk_apbif); in tegra30_ahub_runtime_suspend()
49 clk_disable_unprepare(ahub->clk_d_audio); in tegra30_ahub_runtime_suspend()
[all …]
Dtegra210_ahub.c3 // tegra210_ahub.c - Tegra210 AHUB driver
21 struct tegra_ahub *ahub = snd_soc_component_get_drvdata(cmpnt); in tegra_ahub_get_value_enum() local
29 for (i = 0; i < ahub->soc_data->reg_count; i++) { in tegra_ahub_get_value_enum()
34 reg_val &= ahub->soc_data->mask[i]; in tegra_ahub_get_value_enum()
58 struct tegra_ahub *ahub = snd_soc_component_get_drvdata(cmpnt); in tegra_ahub_put_value_enum() local
81 for (i = 0; i < ahub->soc_data->reg_count; i++) { in tegra_ahub_put_value_enum()
84 update[i].mask = ahub->soc_data->mask[i]; in tegra_ahub_put_value_enum()
561 { .compatible = "nvidia,tegra210-ahub", .data = &soc_data_tegra210 },
562 { .compatible = "nvidia,tegra186-ahub", .data = &soc_data_tegra186 },
569 struct tegra_ahub *ahub = dev_get_drvdata(dev); in tegra_ahub_runtime_suspend() local
[all …]
DKconfig49 tristate "Tegra30 AHUB module"
52 Say Y or M if you want to add support for the Tegra30 AHUB module.
66 tristate "Tegra210 AHUB module"
69 Config to enable Audio Hub (AHUB) module, which comprises of a
72 AHUB.
73 Say Y or M if you want to add support for Tegra210 AHUB module.
114 Audio Hub (AHUB). Each ADMA channel that sends/receives data to/
115 from AHUB must interface through an ADMAIF channel. ADMA channel
116 sending data to AHUB pairs with an ADMAIF Tx channel, where as
117 ADMA channel receiving data from AHUB pairs with an ADMAIF Rx
DMakefile9 snd-soc-tegra30-ahub-objs := tegra30_ahub.o
11 snd-soc-tegra210-ahub-objs := tegra210_ahub.o
23 obj-$(CONFIG_SND_SOC_TEGRA30_AHUB) += snd-soc-tegra30-ahub.o
26 obj-$(CONFIG_SND_SOC_TEGRA210_AHUB) += snd-soc-tegra210-ahub.o
Dtegra30_ahub.h3 * tegra30_ahub.h - Definitions for Tegra30 AHUB driver
11 /* Fields in *_CIF_RX/TX_CTRL; used by AHUB FIFOs, and all other audio modules */
403 * AHUB: Audio Hub; a cross-bar switch between the audio devices: DMA FIFOs,
405 * XBAR: The core cross-bar component of the AHUB.
503 * - More units connected to the AHUB, so that tegra30_ahub_[rt]xcif
505 * the AHUB routing registers.
Dtegra210_ahub.h3 * tegra210_ahub.h - TEGRA210 AHUB
Dtegra30_i2s.c422 "nvidia,ahub-cif-ids", cif_ids, in tegra30_i2s_platform_probe()
Dtegra210_i2s.c69 * Other I/O modules in AHUB can use i2s bclk as reference in tegra210_i2s_set_clock_rate()
/linux-5.10/Documentation/devicetree/bindings/sound/
Dnvidia,tegra210-ahub.yaml4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml#
7 title: Tegra210 AHUB Device Tree Bindings
10 The Audio Hub (AHUB) comprises a collection of hardware accelerators
22 pattern: "^ahub@[0-9a-f]*$"
27 - nvidia,tegra210-ahub
28 - nvidia,tegra186-ahub
30 - const: nvidia,tegra194-ahub
31 - const: nvidia,tegra186-ahub
40 const: ahub
77 ahub@702d0800 {
[all …]
Dnvidia,tegra30-ahub.txt1 NVIDIA Tegra30 AHUB (Audio Hub)
4 - compatible : For Tegra30, must contain "nvidia,tegra30-ahub". For Tegra114,
5 must contain "nvidia,tegra114-ahub". For Tegra124, must contain
6 "nvidia,tegra124-ahub". Otherwise, must contain "nvidia,<chip>-ahub",
9 the AHUB's register blocks.
10 - Tegra30 requires 2 entries, for the APBIF and AHUB/AUDIO register blocks.
12 - interrupts : Should contain AHUB interrupt
58 AHUB client modules need to specify the IDs of their CIFs (Client InterFaces).
59 For RX CIFs, the numbers indicate the register number within AHUB routing
61 For TX CIFs, the numbers indicate the bit position within the AHUB routing
[all …]
Dnvidia,tegra30-i2s.txt15 - nvidia,ahub-cif-ids : The list of AHUB CIF IDs for this port, rx (playback)
16 first, tx (capture) second. See nvidia,tegra30-ahub.txt for values.
23 nvidia,ahub-cif-ids = <4 4>;
Dnvidia,tegra210-admaif.yaml10 ADMAIF is the interface between ADMA and AHUB. Each ADMA channel
11 that sends/receives data to/from AHUB must interface through an
12 ADMAIF channel. ADMA channel sending data to AHUB pairs with ADMAIF
13 Tx channel and ADMA channel receiving data from AHUB pairs with
Dnvidia,tegra210-i2s.yaml42 modules in AHUB. The Tegra I2S driver sets this clock rate as
/linux-5.10/arch/arm/boot/dts/
Dtegra114.dtsi548 ahub@70080000 {
549 compatible = "nvidia,tegra114-ahub";
594 nvidia,ahub-cif-ids = <4 4>;
604 nvidia,ahub-cif-ids = <5 5>;
614 nvidia,ahub-cif-ids = <6 6>;
624 nvidia,ahub-cif-ids = <7 7>;
634 nvidia,ahub-cif-ids = <8 8>;
Dtegra30.dtsi786 ahub@70080000 {
787 compatible = "nvidia,tegra30-ahub";
821 nvidia,ahub-cif-ids = <4 4>;
831 nvidia,ahub-cif-ids = <5 5>;
841 nvidia,ahub-cif-ids = <6 6>;
851 nvidia,ahub-cif-ids = <7 7>;
861 nvidia,ahub-cif-ids = <8 8>;
Dtegra124.dtsi943 ahub@70300000 {
944 compatible = "nvidia,tegra124-ahub";
998 nvidia,ahub-cif-ids = <4 4>;
1008 nvidia,ahub-cif-ids = <5 5>;
1018 nvidia,ahub-cif-ids = <6 6>;
1028 nvidia,ahub-cif-ids = <7 7>;
1038 nvidia,ahub-cif-ids = <8 8>;
Dtegra30-cardhu.dtsi381 ahub@70080000 {
Dtegra124-nyan.dtsi535 ahub@70300000 {
Dtegra30-colibri.dtsi930 ahub@70080000 {
/linux-5.10/arch/arm64/boot/dts/nvidia/
Dtegra132.dtsi989 ahub@70300000 {
990 compatible = "nvidia,tegra124-ahub";
1044 nvidia,ahub-cif-ids = <4 4>;
1055 nvidia,ahub-cif-ids = <5 5>;
1066 nvidia,ahub-cif-ids = <6 6>;
1077 nvidia,ahub-cif-ids = <7 7>;
1088 nvidia,ahub-cif-ids = <8 8>;
Dtegra186.dtsi144 tegra_ahub: ahub@2900800 {
145 compatible = "nvidia,tegra186-ahub";
148 clock-names = "ahub";
Dtegra210.dtsi1391 tegra_ahub: ahub@702d0800 {
1392 compatible = "nvidia,tegra210-ahub";
1395 clock-names = "ahub";
Dtegra194.dtsi144 tegra_ahub: ahub@2900800 {
145 compatible = "nvidia,tegra194-ahub",
146 "nvidia,tegra186-ahub";
149 clock-names = "ahub";
/linux-5.10/drivers/dma/
Dtegra210-adma.c78 * @ch_req_tx_shift: Register offset for AHUB transmit channel select.
79 * @ch_req_rx_shift: Register offset for AHUB receive channel select.
754 dev_err(dev, "ahub clk_enable failed: %d\n", ret); in tegra_adma_runtime_resume()
848 dev_err(&pdev->dev, "Error: Missing ahub controller clock\n"); in tegra_adma_probe()
/linux-5.10/drivers/clk/tegra/
Dclk-tegra30.c603 { .con_id = "apbif", .dev_id = "tegra30-ahub", .dt_id = TEGRA30_CLK_APBIF },
622 { .con_id = "d_audio", .dev_id = "tegra30-ahub", .dt_id = TEGRA30_CLK_D_AUDIO },

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