/linux-6.8/Documentation/devicetree/bindings/ata/ |
D | ahci-platform.yaml | 4 $id: http://devicetree.org/schemas/ata/ahci-platform.yaml# 7 title: AHCI SATA Controller 26 - brcm,iproc-ahci 27 - cavium,octeon-7130-ahci 28 - hisilicon,hisi-ahci 29 - ibm,476gtr-ahci 30 - marvell,armada-3700-ahci 31 - marvell,armada-8k-ahci 32 - marvell,berlin2q-ahci 33 - socionext,uniphier-pro4-ahci [all …]
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D | brcm,sata-brcm.yaml | 7 title: Broadcom SATA3 AHCI Controller 17 - $ref: ahci-common.yaml# 24 - brcm,bcm7216-ahci 25 - brcm,bcm7445-ahci 26 - brcm,bcm7425-ahci 27 - brcm,bcm63138-ahci 28 - const: brcm,sata3-ahci 30 - const: brcm,bcm-nsp-ahci 37 - const: ahci 48 - brcm,bcm7216-ahci [all …]
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D | ahci-common.yaml | 4 $id: http://devicetree.org/schemas/ata/ahci-common.yaml# 7 title: Common Properties for Serial ATA AHCI controllers 14 This document defines device tree properties for a common AHCI SATA 19 defines a set of common properties for the AHCI-compatible devices. 29 Generic AHCI registers space conforming to the Serial ATA AHCI 35 const: ahci 39 Generic AHCI state change interrupt. Can be implemented either as a 45 ahci-supply: 46 description: Power regulator for AHCI controller 77 $ref: '#/$defs/ahci-port' [all …]
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D | rockchip,dwc-ahci.yaml | 4 $id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml# 7 title: Synopsys DWC AHCI SATA controller for Rockchip devices 14 implementation of the AHCI SATA controller found in Rockchip 22 - rockchip,rk3568-dwc-ahci 23 - rockchip,rk3588-dwc-ahci 31 - rockchip,rk3568-dwc-ahci 32 - rockchip,rk3588-dwc-ahci 33 - const: snps,dwc-ahci 39 $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port 59 - $ref: snps,dwc-ahci-common.yaml# [all …]
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D | snps,dwc-ahci.yaml | 4 $id: http://devicetree.org/schemas/ata/snps,dwc-ahci.yaml# 7 title: Synopsys DWC AHCI SATA controller 14 implementation of the AHCI SATA controller. 20 - snps,dwc-ahci 21 - snps,spear-ahci 26 - $ref: snps,dwc-ahci-common.yaml# 31 - description: Synopsys AHCI SATA-compatible devices 32 const: snps,dwc-ahci 33 - description: SPEAr1340 AHCI SATA device 34 const: snps,spear-ahci [all …]
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D | allwinner,sun8i-r40-ahci.yaml | 4 $id: http://devicetree.org/schemas/ata/allwinner,sun8i-r40-ahci.yaml# 7 title: Allwinner R40 AHCI SATA Controller 15 const: allwinner,sun8i-r40-ahci 22 - description: AHCI Bus Clock 23 - description: AHCI Module Clock 32 const: ahci 34 ahci-supply: 35 description: Regulator for the AHCI controller 56 ahci: sata@1c18000 { 57 compatible = "allwinner,sun8i-r40-ahci"; [all …]
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D | nvidia,tegra-ahci.yaml | 4 $id: http://devicetree.org/schemas/ata/nvidia,tegra-ahci.yaml# 7 title: Tegra AHCI SATA Controller 16 - nvidia,tegra124-ahci 17 - nvidia,tegra132-ahci 18 - nvidia,tegra210-ahci 19 - nvidia,tegra186-ahci 24 - description: AHCI registers 102 - nvidia,tegra124-ahci 103 - nvidia,tegra132-ahci 124 - nvidia,tegra210-ahci [all …]
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D | snps,dwc-ahci-common.yaml | 4 $id: http://devicetree.org/schemas/ata/snps,dwc-ahci-common.yaml# 7 title: Synopsys DWC AHCI SATA controller properties 14 AHCI controller properties. 19 - $ref: ahci-common.yaml# 30 Basic DWC AHCI SATA clock sources like application AXI/AHB BIU clock, 61 normally supported by the DWC AHCI SATA controller. 83 $ref: '#/$defs/dwc-ahci-port' 88 dwc-ahci-port: 89 $ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port
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D | allwinner,sun4i-a10-ahci.yaml | 4 $id: http://devicetree.org/schemas/ata/allwinner,sun4i-a10-ahci.yaml# 7 title: Allwinner A10 AHCI SATA Controller 15 const: allwinner,sun4i-a10-ahci 22 - description: AHCI Bus Clock 23 - description: AHCI Module Clock 41 ahci: sata@1c18000 { 42 compatible = "allwinner,sun4i-a10-ahci";
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D | baikal,bt1-ahci.yaml | 4 $id: http://devicetree.org/schemas/ata/baikal,bt1-ahci.yaml# 7 title: Baikal-T1 SoC AHCI SATA controller 13 AHCI SATA controller embedded into the Baikal-T1 SoC is based on the 14 DWC AHCI SATA v4.10a IP-core. 17 - $ref: snps,dwc-ahci-common.yaml# 21 const: baikal,bt1-ahci 50 $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port 86 compatible = "baikal,bt1-ahci";
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D | ahci-mtk.txt | 4 - compatible : Must be "mediatek,<chip>-ahci", "mediatek,mtk-ahci". 5 When using "mediatek,mtk-ahci" compatible strings, you 7 - "mediatek,mt7622-ahci" 16 - ports-implemented : See ./ahci-platform.txt for details. 31 compatible = "mediatek,mt7622-ahci", 32 "mediatek,mtk-ahci";
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D | imx-sata.yaml | 7 title: Freescale i.MX AHCI SATA Controller 13 The Freescale i.MX SATA controller mostly conforms to the AHCI interface 19 - fsl,imx53-ahci 20 - fsl,imx6q-ahci 21 - fsl,imx6qp-ahci 76 compatible = "fsl,imx6q-ahci";
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D | qcom-sata.txt | 1 * Qualcomm AHCI SATA Controller 7 - compatible : compatible list, must contain "generic-ahci" 14 Required properties for "qcom,ipq806x-ahci" compatible: 31 compatible = "qcom,ipq806x-ahci", "generic-ahci";
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D | ahci-fsl-qoriq.txt | 1 Binding for Freescale QorIQ AHCI SATA Controller 5 - compatible: Compatibility string. Must be 'fsl,<chip>-ahci', where 11 - dma-coherent: Enable AHCI coherent DMA operation. 16 compatible = "fsl,ls1021a-ahci";
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D | ahci-da850.txt | 1 Device tree binding for the TI DA850 AHCI SATA Controller 5 - compatible: must be "ti,da850-ahci" 8 AHCI 1.1 standard and the Power Down Control Register (PWRDN) 15 compatible = "ti,da850-ahci";
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D | ahci-dm816.txt | 1 Device tree binding for the TI DM816 AHCI SATA Controller 5 - compatible: must be "ti,dm816-ahci" 7 the controller (as defined by the AHCI 1.1 standard) 17 compatible = "ti,dm816-ahci";
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/linux-6.8/Documentation/devicetree/bindings/soc/socionext/ |
D | socionext,uniphier-ahci-glue.yaml | 4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-ahci-glue.yaml# 7 title: Socionext UniPhier SoC AHCI glue layer 13 AHCI glue layer implemented on Socionext UniPhier SoCs is a sideband 14 logic handling signals to AHCI host controller inside AHCI component. 20 - socionext,uniphier-pro4-ahci-glue 21 - socionext,uniphier-pxs2-ahci-glue 22 - socionext,uniphier-pxs3-ahci-glue 41 $ref: /schemas/phy/socionext,uniphier-ahci-phy.yaml# 52 compatible = "socionext,uniphier-pxs3-ahci-glue", "simple-mfd"; 59 compatible = "socionext,uniphier-pxs3-ahci-reset"; [all …]
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/linux-6.8/Documentation/devicetree/bindings/phy/ |
D | socionext,uniphier-ahci-phy.yaml | 4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-ahci-phy.yaml# 7 title: Socionext UniPhier AHCI PHY 11 AHCI controller implemented on Socionext UniPhier SoCs. 19 - socionext,uniphier-pro4-ahci-phy 20 - socionext,uniphier-pxs2-ahci-phy 21 - socionext,uniphier-pxs3-ahci-phy 46 const: socionext,uniphier-pro4-ahci-phy 71 const: socionext,uniphier-pxs2-ahci-phy 89 const: socionext,uniphier-pxs3-ahci-phy 121 compatible = "socionext,uniphier-pxs3-ahci-phy";
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/linux-6.8/drivers/ata/ |
D | ahci_platform.c | 3 * AHCI SATA platform driver 21 #include "ahci.h" 23 #define DRV_NAME "ahci" 59 if (device_is_compatible(dev, "hisilicon,hisi-ahci")) in ahci_probe() 81 { .compatible = "generic-ahci", }, 83 { .compatible = "ibm,476gtr-ahci", }, 84 { .compatible = "hisilicon,hisi-ahci", }, 85 { .compatible = "cavium,octeon-7130-ahci", }, 110 MODULE_DESCRIPTION("AHCI SATA platform driver"); 113 MODULE_ALIAS("platform:ahci");
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D | ahci.c | 3 * ahci.c - AHCI SATA support 14 * AHCI hardware documentation: 32 #include <linux/ahci-remap.h> 34 #include "ahci.h" 36 #define DRV_NAME "ahci" 106 AHCI_SHT("ahci"), 298 { PCI_VDEVICE(INTEL, 0x3b22), board_ahci }, /* PCH AHCI */ 299 { PCI_VDEVICE(INTEL, 0x3b23), board_ahci }, /* PCH AHCI */ 302 { PCI_VDEVICE(INTEL, 0x3b29), board_ahci_low_power }, /* PCH M AHCI */ 305 { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */ [all …]
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D | Kconfig | 110 tristate "AHCI SATA support" 114 This option enables support for AHCI Serial ATA. 140 tristate "Platform AHCI SATA support" 143 This option enables support for Platform AHCI Serial ATA 149 tristate "Broadcom AHCI SATA support" 154 This option enables support for the AHCI SATA3 controller found on 160 tristate "DaVinci DA850 AHCI SATA support" 165 onboard AHCI SATA. 170 tristate "DaVinci DM816 AHCI SATA support" 175 onboard AHCI SATA controller. [all …]
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D | ahci_brcm.c | 3 * Broadcom SATA3 AHCI Controller Driver 22 #include "ahci.h" 24 #define DRV_NAME "brcm-ahci" 28 #define MMIO_ENDIAN_SHIFT 0 /* CPU->AHCI */ 29 #define DMADESC_ENDIAN_SHIFT 2 /* AHCI->DDR */ 30 #define DMADATA_ENDIAN_SHIFT 4 /* AHCI->DDR */ 53 #define DATA_ENDIAN 2 /* AHCI->DDR inbound accesses */ 54 #define MMIO_ENDIAN 2 /* CPU->AHCI outbound accesses */ 425 {.compatible = "brcm,bcm7425-ahci", .data = (void *)BRCM_SATA_BCM7425}, 426 {.compatible = "brcm,bcm7445-ahci", .data = (void *)BRCM_SATA_BCM7445}, [all …]
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D | ahci_qoriq.c | 3 * Freescale QorIQ AHCI SATA platform driver 18 #include "ahci.h" 20 #define DRV_NAME "ahci-qoriq" 70 { .compatible = "fsl,ls1021a-ahci", .data = (void *)AHCI_LS1021A}, 71 { .compatible = "fsl,ls1028a-ahci", .data = (void *)AHCI_LS1028A}, 72 { .compatible = "fsl,ls1043a-ahci", .data = (void *)AHCI_LS1043A}, 73 { .compatible = "fsl,ls2080a-ahci", .data = (void *)AHCI_LS2080A}, 74 { .compatible = "fsl,ls1046a-ahci", .data = (void *)AHCI_LS1046A}, 75 { .compatible = "fsl,ls1088a-ahci", .data = (void *)AHCI_LS1088A}, 76 { .compatible = "fsl,ls2088a-ahci", .data = (void *)AHCI_LS2088A}, [all …]
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D | libahci_platform.c | 3 * AHCI SATA platform library 26 #include "ahci.h" 125 * This function enables all the clks found for the AHCI device. 155 * the AHCI device. 174 * the reset controls found for the AHCI device. 240 * AHCI controller. 448 * regulator for controlling the AHCI controller (optional) 477 * If the DT provided an "ahci" named resource, use it. Otherwise, in ahci_platform_get_resources() 480 if (platform_get_resource_byname(pdev, IORESOURCE_MEM, "ahci")) in ahci_platform_get_resources() 481 hpriv->mmio = devm_platform_ioremap_resource_byname(pdev, "ahci"); in ahci_platform_get_resources() [all …]
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/linux-6.8/Documentation/devicetree/bindings/powerpc/4xx/ |
D | akebono.txt | 24 1.b) The Advanced Host Controller Interface (AHCI) SATA node 30 - compatible : should be "ibm,476gtr-ahci". 31 - reg : should contain the AHCI registers location and length. 32 - interrupts : should contain the AHCI interrupt.
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