Home
last modified time | relevance | path

Searched full:adc (Results 1 – 25 of 1508) sorted by relevance

12345678910>>...61

/linux-5.10/drivers/iio/adc/
Dpalmas_gpadc.c3 * palmas-adc.c -- TI PALMAS GPADC.
139 static int palmas_disable_auto_conversion(struct palmas_gpadc *adc) in palmas_disable_auto_conversion() argument
143 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE, in palmas_disable_auto_conversion()
148 dev_err(adc->dev, "GPADC_CTRL1 update failed: %d\n", ret); in palmas_disable_auto_conversion()
152 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE, in palmas_disable_auto_conversion()
158 dev_err(adc->dev, "AUTO_CTRL update failed: %d\n", ret); in palmas_disable_auto_conversion()
164 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE, in palmas_disable_auto_conversion()
168 dev_err(adc->dev, "GPADC_CTRL1 update failed: %d\n", ret); in palmas_disable_auto_conversion()
175 struct palmas_gpadc *adc = data; in palmas_gpadc_irq() local
177 complete(&adc->conv_completion); in palmas_gpadc_irq()
[all …]
Dstm32-adc.c3 * This file is part of STM32 ADC driver
29 #include "stm32-adc-core.h"
34 /* BOOST bit must be set on STM32H7 when ADC clock is above 20MHz */
81 * struct stm32_adc_trig_info - ADC trigger info
91 * struct stm32_adc_calib - optional adc calibration data
105 * struct stm32_adc_regs - stm32 ADC misc registers & bitfield desc
158 * @smp_cycles: programmable sampling time (ADC clock cycles)
175 * struct stm32_adc - private data of each ADC IIO instance
176 * @common: reference to ADC block common data
177 * @offset: ADC instance register offset in ADC block
[all …]
Dmcp3911.c57 static int mcp3911_read(struct mcp3911 *adc, u8 reg, u32 *val, u8 len) in mcp3911_read() argument
61 reg = MCP3911_REG_READ(reg, adc->dev_addr); in mcp3911_read()
62 ret = spi_write_then_read(adc->spi, &reg, 1, val, len); in mcp3911_read()
68 dev_dbg(&adc->spi->dev, "reading 0x%x from register 0x%x\n", *val, in mcp3911_read()
73 static int mcp3911_write(struct mcp3911 *adc, u8 reg, u32 val, u8 len) in mcp3911_write() argument
75 dev_dbg(&adc->spi->dev, "writing 0x%x to register 0x%x\n", val, reg); in mcp3911_write()
79 val |= MCP3911_REG_WRITE(reg, adc->dev_addr); in mcp3911_write()
81 return spi_write(adc->spi, &val, len + 1); in mcp3911_write()
84 static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask, in mcp3911_update() argument
90 ret = mcp3911_read(adc, reg, &tmp, len); in mcp3911_update()
[all …]
Dti-adc12138.c3 * ADC12130/ADC12132/ADC12138 12-bit plus sign ADC driver
51 * Maximum size needed: 16x 2 bytes ADC data + 8 bytes timestamp.
127 static int adc12138_mode_programming(struct adc12138 *adc, u8 mode, in adc12138_mode_programming() argument
131 .tx_buf = adc->tx_buf, in adc12138_mode_programming()
132 .rx_buf = adc->rx_buf, in adc12138_mode_programming()
138 if (adc->id != adc12138) in adc12138_mode_programming()
141 adc->tx_buf[0] = mode; in adc12138_mode_programming()
143 ret = spi_sync_transfer(adc->spi, &xfer, 1); in adc12138_mode_programming()
147 memcpy(rx_buf, adc->rx_buf, len); in adc12138_mode_programming()
152 static int adc12138_read_status(struct adc12138 *adc) in adc12138_read_status() argument
[all …]
Dingenic-adc.c3 * ADC driver for the Ingenic JZ47xx SoCs
6 * based on drivers/mfd/jz4740-adc.c
9 #include <dt-bindings/iio/adc/ingenic,adc.h>
98 int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc);
112 struct ingenic_adc *adc = iio_priv(iio_dev); in ingenic_adc_set_adcmd() local
114 mutex_lock(&adc->lock); in ingenic_adc_set_adcmd()
117 readl(adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
124 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
130 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
138 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
[all …]
Dstm32-dfsdm-adc.c3 * This file is the ADC part of the STM32 DFSDM driver
11 #include <linux/iio/adc/stm32-dfsdm-adc.h>
77 /* ADC specific */
315 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); in stm32_dfsdm_compute_all_osrs() local
316 struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[adc->fl_id]; in stm32_dfsdm_compute_all_osrs()
336 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); in stm32_dfsdm_start_channel() local
337 struct regmap *regmap = adc->dfsdm->regmap; in stm32_dfsdm_start_channel()
342 for_each_set_bit(bit, &adc->smask, sizeof(adc->smask) * BITS_PER_BYTE) { in stm32_dfsdm_start_channel()
356 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); in stm32_dfsdm_stop_channel() local
357 struct regmap *regmap = adc->dfsdm->regmap; in stm32_dfsdm_stop_channel()
[all …]
DKconfig3 # ADC drivers
25 tristate "Analog Devices AD7091R5 ADC Driver"
29 Say yes here to build support for Analog Devices AD7091R-5 ADC.
37 SPI analog to digital converters (ADC).
43 tristate "Analog Devices AD7190 AD7192 AD7193 AD7195 ADC driver"
48 AD7192, AD7193 or AD7195 SPI analog to digital converters (ADC).
55 tristate "Analog Devices AD7265/AD7266 ADC driver"
68 tristate "Analog Devices AD7291 ADC driver"
72 8 Channel ADC with temperature sensor.
78 tristate "Analog Devices AD7292 ADC driver"
[all …]
Dlpc18xx_adc.c3 * IIO ADC driver for NXP LPC18xx ADC
27 /* LPC18XX ADC registers and bits */
70 static int lpc18xx_adc_read_chan(struct lpc18xx_adc *adc, unsigned int ch) in lpc18xx_adc_read_chan() argument
75 reg = adc->cr_reg | BIT(ch) | LPC18XX_ADC_CR_START_NOW; in lpc18xx_adc_read_chan()
76 writel(reg, adc->base + LPC18XX_ADC_CR); in lpc18xx_adc_read_chan()
78 ret = readl_poll_timeout(adc->base + LPC18XX_ADC_GDR, reg, in lpc18xx_adc_read_chan()
81 dev_warn(adc->dev, "adc read timed out\n"); in lpc18xx_adc_read_chan()
92 struct lpc18xx_adc *adc = iio_priv(indio_dev); in lpc18xx_adc_read_raw() local
96 mutex_lock(&adc->lock); in lpc18xx_adc_read_raw()
97 *val = lpc18xx_adc_read_chan(adc, chan->channel); in lpc18xx_adc_read_raw()
[all …]
Dmax1241.c3 * MAX1241 low-power, 12-bit serial ADC
42 static int max1241_read(struct max1241 *adc) in max1241_read() argument
58 .rx_buf = &adc->data, in max1241_read()
63 return spi_sync_transfer(adc->spi, xfers, ARRAY_SIZE(xfers)); in max1241_read()
71 struct max1241 *adc = iio_priv(indio_dev); in max1241_read_raw() local
75 mutex_lock(&adc->lock); in max1241_read_raw()
77 if (adc->shutdown) { in max1241_read_raw()
78 gpiod_set_value(adc->shutdown, 0); in max1241_read_raw()
80 ret = max1241_read(adc); in max1241_read_raw()
81 gpiod_set_value(adc->shutdown, 1); in max1241_read_raw()
[all …]
Dti-adc084s021.c5 * Driver for Texas Instruments' ADC084S021 ADC chip.
68 * Read an ADC channel and return its value.
70 * @adc: The ADC SPI data.
73 static int adc084s021_adc_conversion(struct adc084s021 *adc, void *data) in adc084s021_adc_conversion() argument
75 int n_words = (adc->spi_trans.len >> 1) - 1; /* Discard first word */ in adc084s021_adc_conversion()
80 ret = spi_sync(adc->spi, &adc->message); in adc084s021_adc_conversion()
85 *(p + i) = adc->rx_buf[i + 1]; in adc084s021_adc_conversion()
94 struct adc084s021 *adc = iio_priv(indio_dev); in adc084s021_read_raw() local
103 ret = regulator_enable(adc->reg); in adc084s021_read_raw()
109 adc->tx_buf[0] = channel->channel << 3; in adc084s021_read_raw()
[all …]
Dqcom-spmi-adc5.c103 * struct adc5_channel_prop - ADC channel property.
112 * @avg_samples: ability to provide single result from the ADC
132 * struct adc5_chip - ADC private structure.
135 * @base: base address for the ADC peripheral.
136 * @nchannels: number of ADC channels.
137 * @chan_props: array of ADC channel properties.
140 * @complete: ADC result notification after interrupt is received.
141 * @lock: ADC lock for access to the peripheral.
169 static int adc5_read(struct adc5_chip *adc, u16 offset, u8 *data, int len) in adc5_read() argument
171 return regmap_bulk_read(adc->regmap, adc->base + offset, data, len); in adc5_read()
[all …]
Dti-adc0832.c3 * ADC0831/ADC0832/ADC0834/ADC0838 8-bit ADC driver
33 * Max size needed: 16x 1 byte ADC data + 8 bytes timestamp
120 static int adc0831_adc_conversion(struct adc0832 *adc) in adc0831_adc_conversion() argument
122 struct spi_device *spi = adc->spi; in adc0831_adc_conversion()
125 ret = spi_read(spi, &adc->rx_buf, 2); in adc0831_adc_conversion()
132 return (adc->rx_buf[0] << 2 & 0xff) | (adc->rx_buf[1] >> 6); in adc0831_adc_conversion()
135 static int adc0832_adc_conversion(struct adc0832 *adc, int channel, in adc0832_adc_conversion() argument
138 struct spi_device *spi = adc->spi; in adc0832_adc_conversion()
140 .tx_buf = adc->tx_buf, in adc0832_adc_conversion()
141 .rx_buf = adc->rx_buf, in adc0832_adc_conversion()
[all …]
Dmxs-lradc-adc.c3 * Freescale MXS LRADC ADC driver
133 struct mxs_lradc_adc *adc = iio_priv(iio_dev); in mxs_lradc_adc_read_single() local
134 struct mxs_lradc *lradc = adc->lradc; in mxs_lradc_adc_read_single()
147 reinit_completion(&adc->completion); in mxs_lradc_adc_read_single()
156 adc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR); in mxs_lradc_adc_read_single()
157 writel(0x1, adc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR); in mxs_lradc_adc_read_single()
160 if (test_bit(chan, &adc->is_divided)) in mxs_lradc_adc_read_single()
162 adc->base + LRADC_CTRL2 + STMP_OFFSET_REG_SET); in mxs_lradc_adc_read_single()
165 adc->base + LRADC_CTRL2 + STMP_OFFSET_REG_CLR); in mxs_lradc_adc_read_single()
169 adc->base + LRADC_CTRL4 + STMP_OFFSET_REG_CLR); in mxs_lradc_adc_read_single()
[all …]
Dmcp320x.c8 * Driver for following ADC chips from Microchip Technology's:
72 * struct mcp320x - Microchip SPI ADC instance
74 * @msg: SPI message to select a channel and receive a value from the ADC
80 * @chip_info: ADC properties
120 static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel, in mcp320x_adc_conversion() argument
125 if (adc->chip_info->conv_time) { in mcp320x_adc_conversion()
126 ret = spi_sync(adc->spi, &adc->start_conv_msg); in mcp320x_adc_conversion()
130 usleep_range(adc->chip_info->conv_time, in mcp320x_adc_conversion()
131 adc->chip_info->conv_time + 100); in mcp320x_adc_conversion()
134 memset(&adc->rx_buf, 0, sizeof(adc->rx_buf)); in mcp320x_adc_conversion()
[all …]
Dti-ads8344.c3 * ADS8344 16-bit 8-Channel ADC driver
26 * Lock protecting access to adc->tx_buff and rx_buff,
76 static int ads8344_adc_conversion(struct ads8344 *adc, int channel, in ads8344_adc_conversion() argument
79 struct spi_device *spi = adc->spi; in ads8344_adc_conversion()
82 adc->tx_buf = ADS8344_START; in ads8344_adc_conversion()
84 adc->tx_buf |= ADS8344_SINGLE_END; in ads8344_adc_conversion()
85 adc->tx_buf |= ADS8344_CHANNEL(channel); in ads8344_adc_conversion()
86 adc->tx_buf |= ADS8344_CLOCK_INTERNAL; in ads8344_adc_conversion()
88 ret = spi_write(spi, &adc->tx_buf, 1); in ads8344_adc_conversion()
94 ret = spi_read(spi, adc->rx_buf, sizeof(adc->rx_buf)); in ads8344_adc_conversion()
[all …]
Drn5t618-adc.c3 * ADC driver for the RICOH RN5T618 power management chip family
86 struct rn5t618_adc_data *adc = data; in rn5t618_adc_irq() local
91 regmap_write(adc->rn5t618->regmap, RN5T618_IR_ADC1, 0); in rn5t618_adc_irq()
92 regmap_write(adc->rn5t618->regmap, RN5T618_IR_ADC2, 0); in rn5t618_adc_irq()
94 ret = regmap_read(adc->rn5t618->regmap, RN5T618_IR_ADC3, &r); in rn5t618_adc_irq()
96 dev_err(adc->dev, "failed to read IRQ status: %d\n", ret); in rn5t618_adc_irq()
98 regmap_write(adc->rn5t618->regmap, RN5T618_IR_ADC3, 0); in rn5t618_adc_irq()
101 complete(&adc->conv_completion); in rn5t618_adc_irq()
110 struct rn5t618_adc_data *adc = iio_priv(iio_dev); in rn5t618_adc_read() local
123 ret = regmap_update_bits(adc->rn5t618->regmap, RN5T618_ADCCNT3, in rn5t618_adc_read()
[all …]
Dqcom-pm8xxx-xoadc.c7 * specific-purpose and general purpose ADC converters and channels.
28 * Qualcomm tree. Their kernel has two out-of-tree drivers for the ADC:
30 * drivers/hwmon/pm8xxx-adc.c
58 /* Proper ADC registers */
100 * On a later ADC the decimation factors are defined as
168 * ADC code to the value that IIO expects, in uV or millicelsius
308 * include/linux/mfd/pm8xxx/pm8xxx-adc.h
370 * struct pm8xxx_chan_info - ADC channel information
418 struct pm8xxx_xoadc *adc = iio_priv(indio_dev); in pm8xxx_eoc_irq() local
420 complete(&adc->complete); in pm8xxx_eoc_irq()
[all …]
/linux-5.10/arch/arm/mach-s3c/
Dadc.c7 // Samsung ADC device core
22 #include "regs-adc.h"
23 #include <linux/soc/samsung/s3c-adc.h>
25 /* This driver is designed to control the usage of the ADC block between
83 static inline void s3c_adc_convert(struct adc_device *adc) in s3c_adc_convert() argument
85 unsigned con = readl(adc->regs + S3C2410_ADCCON); in s3c_adc_convert()
88 writel(con, adc->regs + S3C2410_ADCCON); in s3c_adc_convert()
91 static inline void s3c_adc_select(struct adc_device *adc, in s3c_adc_select() argument
94 unsigned con = readl(adc->regs + S3C2410_ADCCON); in s3c_adc_select()
95 enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data; in s3c_adc_select()
[all …]
/linux-5.10/drivers/mfd/
Dpcf50633-adc.c2 /* NXP PCF50633 ADC Driver
11 * NOTE: This driver does not yet support subtractive ADC mode, which means
23 #include <linux/mfd/pcf50633/adc.h>
62 /* start ADC conversion on selected channel */ in adc_setup()
69 struct pcf50633_adc *adc = __to_adc(pcf); in trigger_next_adc_job_if_any() local
72 head = adc->queue_head; in trigger_next_adc_job_if_any()
74 if (!adc->queue[head]) in trigger_next_adc_job_if_any()
77 adc_setup(pcf, adc->queue[head]->mux, adc->queue[head]->avg); in trigger_next_adc_job_if_any()
83 struct pcf50633_adc *adc = __to_adc(pcf); in adc_enqueue_request() local
86 mutex_lock(&adc->queue_mutex); in adc_enqueue_request()
[all …]
/linux-5.10/Documentation/devicetree/bindings/iio/adc/
Dst,stm32-adc.yaml4 $id: "http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#"
7 title: STMicroelectronics STM32 ADC bindings
10 STM32 ADC is a successive approximation analog-to-digital converter.
12 in single, continuous, scan or discontinuous mode. Result of the ADC is
19 Each STM32 ADC block can have up to 3 ADC instances.
27 - st,stm32f4-adc-core
28 - st,stm32h7-adc-core
29 - st,stm32mp1-adc-core
36 One or more interrupts for ADC block, depending on part used:
37 - stm32f4 and stm32h7 share a common ADC interrupt line.
[all …]
Dat91_adc.txt1 * AT91's Analog to Digital Converter (ADC)
4 - compatible: Should be "atmel,<chip>-adc"
6 - reg: Should contain ADC registers location and length
7 - interrupts: Should contain the IRQ line for the ADC
11 - atmel,adc-channels-used: Bitmask of the channels muxed and enabled for this
13 - atmel,adc-startup-time: Startup Time of the ADC in microseconds as
15 - atmel,adc-vref: Reference voltage in millivolts for the conversions
16 - atmel,adc-res: List of resolutions in bits supported by the ADC. List size
18 - atmel,adc-res-names: Contains one identifier string for each resolution
19 in atmel,adc-res property. "lowres" and "highres"
[all …]
Dsamsung,exynos-adc.yaml4 $id: http://devicetree.org/schemas/iio/adc/samsung,exynos-adc.yaml#
7 title: Samsung Exynos Analog to Digital Converter (ADC)
15 - samsung,exynos-adc-v1 # Exynos5250
16 - samsung,exynos-adc-v2
17 - samsung,exynos3250-adc
18 - samsung,exynos4212-adc # Exynos4212 and Exynos4412
19 - samsung,exynos7-adc
20 - samsung,s3c2410-adc
21 - samsung,s3c2416-adc
22 - samsung,s3c2440-adc
[all …]
Dqcom,pm8xxx-xoadc.txt3 The Qualcomm PM8xxx PMICs contain a HK/XO ADC (Housekeeping/Crystal
4 oscillator ADC) encompassing PM8018, PM8038, PM8058 and PM8921.
9 "qcom,pm8018-adc"
10 "qcom,pm8038-adc"
11 "qcom,pm8058-adc"
12 "qcom,pm8921-adc"
14 - reg: should contain the ADC base address in the PMIC, typically
23 ADC has a special addressing scheme that require two cells for
24 identifying each ADC channel:
39 and reference the proper ADC interrupt.
[all …]
/linux-5.10/drivers/hwmon/
Dadcxx.c11 * ADC<bb><c>S<sss>, where
18 * http://www.national.com/ds/DC/ADC<bb><c>S<sss>.pdf
52 struct adcxx *adc = spi_get_drvdata(spi); in adcxx_show() local
58 if (mutex_lock_interruptible(&adc->lock)) in adcxx_show()
61 if (adc->channels == 1) { in adcxx_show()
77 value = value * adc->reference >> 12; in adcxx_show()
80 mutex_unlock(&adc->lock); in adcxx_show()
95 struct adcxx *adc = spi_get_drvdata(spi); in adcxx_max_show() local
98 if (mutex_lock_interruptible(&adc->lock)) in adcxx_max_show()
101 reference = adc->reference; in adcxx_max_show()
[all …]
/linux-5.10/sound/soc/codecs/
Drt5670.c662 /* ADC Digital Volume Control */
663 SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL,
665 SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL,
669 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL,
673 /* ADC Boost Volume Control */
674 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
678 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
682 SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum),
917 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
924 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
[all …]

12345678910>>...61