Searched full:aapcs (Results 1 – 11 of 11) sorted by relevance
| /linux-5.10/arch/arm64/kernel/ |
| D | efi-rt-wrapper.S | 13 * Register x18 is designated as the 'platform' register by the AAPCS,
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| D | ftrace.c | 143 * All instrumented functions follow the AAPCS, so x0-x8 and x19-x30 are live,
158 * being traced, the MOV is not harmful given x9 is not live per the AAPCS.
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| D | entry-ftrace.S | 26 * Each instrumented function follows the AAPCS, so here x0-x8 and x18-x30 are
106 * x19-x29 per the AAPCS, and we created frame records upon entry, so we need
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| /linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | psci.yaml | 23 in a manner similar to that specified by AAPCS:
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| /linux-5.10/tools/testing/selftests/wireguard/qemu/ |
| D | Makefile | 99 CFLAGS += -march=armv7-a -mtune=cortex-a15 -mabi=aapcs-linux
109 CFLAGS += -march=armv7-a -mabi=aapcs-linux # We don't pass -mtune=cortex-a15 due to a compiler bug …
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| /linux-5.10/arch/arm64/kernel/vdso32/ |
| D | Makefile | 68 VDSO_CAFLAGS += -mabi=aapcs-linux -mfloat-abi=soft
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| /linux-5.10/arch/arm/ |
| D | Makefile | 103 CFLAGS_ABI :=-mabi=aapcs-linux -mfpu=vfp
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| /linux-5.10/arch/arm64/include/asm/ |
| D | assembler.h | 710 * AAPCS to be preserved across an ordinary function call.
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| /linux-5.10/arch/arm/crypto/ |
| D | aes-ce-core.S | 124 * Internal, non-AAPCS compliant functions that implement the core AES
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| /linux-5.10/arch/arm64/net/ |
| D | bpf_jit_comp.c | 230 /* Save FP and LR registers to stay align with ARM64 AAPCS */ in build_prologue()
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| /linux-5.10/tools/include/nolibc/ |
| D | nolibc.h | 797 "and %r3, %r1, $-8\n" // AAPCS : sp must be 8-byte aligned in the
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