| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | qcom,ipq5332-usb-hsphy.yaml | 49 usb-phy@7b000 {
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| /linux/arch/arm/boot/dts/arm/ |
| H A D | versatile-pb.dts | 58 interrupt-map-mask = <0x1800 0 0 7>;
104 mmc@b000 {
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| H A D | arm-realview-eb.dtsi | 105 reg-io-width = <7>;
224 led@8,7 {
229 label = "versatile:7";
344 serial2: serial@1000b000 {
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| H A D | vexpress-v2m.dtsi | 39 <0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
86 <7 0 0x10000000 0x00020000>;
123 iofpga@7,00000000 {
127 ranges = <0 7 0 0x20000>;
235 v2m_serial2: serial@b000 {
238 interrupts = <7>;
430 gpios = <&v2m_led_gpios 7 0>;
489 arm,vexpress-sysreg,func = <7 0>;
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | pmk8350.dtsi | 96 bits = <1 7>;
108 pmk8350_sdam_13: nvram@7c00 {
116 pmk8350_sdam_14: nvram@7d00 {
164 pmk8350_gpios: gpio@b000 {
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| /linux/drivers/gpu/drm/meson/ |
| H A D | meson_dw_hdmi.h | 15 * Bit 7 RW Reserved. Default 1, sw_reset_emp starting from G12A
39 * Bit 7 RW hdcp22_skpclk_en: starting from G12A, 1=enable; 0=disable
61 * [ 7] rxsense_fall starting from G12A
76 * Bit 7 RW rxsense_fall starting from G12A
86 * [7] rxsense_fall starting from G12A
101 #define HDMITX_TOP_INTR_RXSENSE_FALL BIT(7)
104 * Bit 14:12 RW tmds_sel: 3'b000=Output zero; 3'b001=Output normal TMDS data;
107 * every 2 clk cycles; ...; 7=New pattern every 8 clk cycles. Default 0.
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| /linux/arch/arm/boot/dts/nxp/vf/ |
| H A D | vfxxx.dtsi | 136 dmas = <&edma0 0 6>, <&edma0 0 7>;
266 adc0: adc@4003b000 {
336 gpio2: gpio@4004b000 {
368 gpio-ranges = <&iomuxc 0 128 7>;
369 ngpios = <7>;
433 clks: ccm@4006b000 {
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| /linux/arch/arm/boot/dts/hisilicon/ |
| H A D | hi3620.dtsi | 149 interrupts = <0 6 4>, <0 7 4>;
227 &pmx0 5 0 1 &pmx0 6 1 1 &pmx0 7 2 1>;
242 &pmx0 6 5 1 &pmx0 7 6 1>;
255 gpio-ranges = < &pmx0 0 7 1 &pmx0 1 8 1 &pmx0 2 9 1
257 &pmx0 6 3 1 &pmx0 7 3 1>;
272 &pmx0 6 11 1 &pmx0 7 11 1>;
287 &pmx0 6 13 1 &pmx0 7 13 1>;
294 gpio5: gpio@80b000 {
302 &pmx0 6 16 1 &pmx0 7 16 1>;
317 &pmx0 6 18 1 &pmx0 7 19 1>;
[all …]
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| /linux/drivers/hwmon/pmbus/ |
| H A D | mp9941.c | 59 * page = 0, MFR_RESO_SET[7:6] defines the vout format in mp9941_set_vout_format()
62 ret = (ret & ~GENMASK(7, 6)) | FIELD_PREP(GENMASK(7, 6), 3); in mp9941_set_vout_format()
114 * 3'b000 set the iout scale as 0.5A/Lsb in mp9941_identify_iin_scale()
174 ret = DIV_ROUND_CLOSEST((ret & GENMASK(7, 0)) * MP9941_VIN_LIMIT_UINT, in mp9941_read_word_data()
182 ret = ret & GENMASK(7, 0); in mp9941_read_word_data()
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| /linux/arch/powerpc/boot/dts/fsl/ |
| H A D | mpc8536ds.dtsi | 71 partition@7f00000 {
76 partition@7f80000 {
240 usb@2b000 {
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| /linux/arch/riscv/boot/dts/sophgo/ |
| H A D | sg2042.dtsi | 147 gpio2: gpio@703000b000 {
296 interrupts-extended = <&cpu0_intc 7>,
297 <&cpu1_intc 7>,
298 <&cpu2_intc 7>,
299 <&cpu3_intc 7>;
306 interrupts-extended = <&cpu4_intc 7>,
307 <&cpu5_intc 7>,
308 <&cpu6_intc 7>,
309 <&cpu7_intc 7>;
316 interrupts-extended = <&cpu8_intc 7>,
[all …]
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| H A D | sg2044.dtsi | 48 interrupt-map-mask = <0 0 0 7>;
83 interrupt-map-mask = <0 0 0 7>;
118 interrupt-map-mask = <0 0 0 7>;
153 interrupt-map-mask = <0 0 0 7>;
188 interrupt-map-mask = <0 0 0 7>;
256 snps,priority = <0 1 2 3 4 5 6 7>;
399 sd: mmc@703000b000 {
513 gpio2: gpio@704000b000 {
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| /linux/drivers/crypto/intel/qat/qat_common/ |
| H A D | icp_qat_fw_comp.h | 19 ICP_QAT_FW_COMP_20_CMD_RESERVED_7 = 7,
45 #define ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_BITPOS 7
187 #define ICP_QAT_FW_COMP_CNV_ERROR_NONE 0b000
353 #define QAT_FW_COMP_BANK_H_BITPOS 7
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | mediatek,mt8365-pinctrl.yaml | 143 7: (E1, E0, EN) = (1, 1, 1)
144 So the valid arguments are from 0 to 7.
146 enum: [0, 1, 2, 3, 4, 5, 6, 7]
212 pio: pinctrl@1000b000 {
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| /linux/arch/arm/boot/dts/broadcom/ |
| H A D | bcm53573.dtsi | 102 <0x0000a000 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
244 gmac1: ethernet@b000 {
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| /linux/include/linux/irqchip/ |
| H A D | arm-gic-v5.h | 69 #define GICV5_IRS_IDR1_PRIORITY_BITS_1BITS 0b000
102 #define GICV5_IRS_CR1_IST_WA BIT(7)
129 #define GICV5_IRS_IST_CFGR_ISTSZ GENMASK(8, 7)
171 #define GICV5_ITS_IDR1_ITT_LEVELS BIT(7)
185 #define GICV5_ITS_CR1_ITT_RA BIT(7)
192 #define GICV5_ITS_DT_CFGR_L2SZ GENMASK(7, 6)
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| /linux/arch/arm64/boot/dts/marvell/mmp/ |
| H A D | pxa1908.dtsi | 128 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
204 pinctrl-single,function-mask = <7>;
230 apbcp: clock-controller@3b000 {
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| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8516.dtsi | 172 <GIC_SPI 7 IRQ_TYPE_LEVEL_LOW>;
239 pio: pinctrl@1000b000 {
382 i2c2: i2c@1100b000 {
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| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | omap3-beagle-xm.dts | 154 etb@5401b000 {
281 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
331 * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
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| /linux/Documentation/arch/powerpc/ |
| H A D | transactional_memory.rst | 191 These can be checked by the user program's abort handler as TEXASR[0:7]. If
192 bit 7 is set, it indicates that the error is considered persistent. For example
269 if (MSR 29:31 ¬ = 0b010 | SRR1 29:31 ¬ = 0b000) then
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| /linux/Documentation/arch/arm/pxa/ |
| H A D | mfp.rst | 160 31 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
169 Bit 7: SLEEP_OE_N - enable outputs during low power modes
177 Bit 0 - 2: AF_SEL - alternate function selection, 8 possibilities, from 0-7
179 0b000 - fast 1mA
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| /linux/drivers/hwtracing/coresight/ |
| H A D | coresight-etm4x.h | 63 #define TRCIMSPECn(n) (0x1C0 + (n * 4)) /* n = 1-7 */
77 /* Single-shot comparator registers, n = 0-7 */
90 /* ContextID/Virtual ContextID comparators, n = 0-7 */
135 #define TRCIDR0_TRCCCI BIT(7)
177 #define TRCCONFIGR_VMID BIT(7)
199 #define TRCVICTLR_EVENT_MASK GENMASK(7, 0)
217 #define TRCSSPCICRn_PC_MASK GENMASK(7, 0)
220 #define TRCBBCTLR_RANGE_MASK GENMASK(7, 0)
233 #define ETM4x_CRn(n) (((n) >> 7) & 0x7)
321 CASE_##op((val), TRCIMSPECn(7)) \
[all …]
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| /linux/drivers/input/touchscreen/ |
| H A D | iqs5xx.c | 40 #define IQS5XX_SHOW_RESET BIT(7)
41 #define IQS5XX_ACK_RESET BIT(7)
565 * A000 and B000 devices use 8-bit and 16-bit addressing, respectively. in iqs5xx_dev_init()
588 * B000 device via new firmware. in iqs5xx_dev_init()
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| /linux/arch/powerpc/platforms/512x/ |
| H A D | clock-commonclk.c | 318 4, 5, 6, 7, 8, 9, 10, 14, in get_sys_div_x2()
339 /* 0b000 is "times 36" */ in get_cpmf_mult_x2()
340 72, 2, 2, 3, 4, 5, 6, 7, in get_cpmf_mult_x2()
343 /* 0b000 is "bypass" */ in get_cpmf_mult_x2()
344 2, 2, 2, 3, 4, 5, 6, 7, in get_cpmf_mult_x2()
569 MCLK_SETUP_DATA_PSC(7),
693 mccr_reg, 7, 1); in mpc512x_clk_setup_mclk()
750 * allow to setup the divider's bits 7:1, which results in that in mpc512x_clk_setup_clock_tree()
758 &clkregs->scfr2, 1, 7, in mpc512x_clk_setup_clock_tree()
763 9, 7, CLK_DIVIDER_ONE_BASED); in mpc512x_clk_setup_clock_tree()
[all …]
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| /linux/arch/arm64/tools/ |
| H A D | sysreg | 93 Res0 11:7
266 UnsignedEnum 7:6 P3
318 Field 7:0 Aff0
321 Sysreg SPMCFGR_EL1 2 0 9 13 7
336 Field 7:0 N
347 Sysreg PMCCNTSVR_EL1 2 0 14 11 7
361 Res0 7:5
395 Sysreg SPMSCR_EL1 2 7 9 14 7
434 UnsignedEnum 7:4 State1
474 Enum 7:4 Security
[all …]
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