/linux-5.10/Documentation/devicetree/bindings/ |
D | trivial-devices.yaml | 151 # Microchip 7-bit Single I2C Digital POT (5k) 153 # Microchip 7-bit Single I2C Digital POT (10k) 155 # Microchip 7-bit Single I2C Digital POT (50k) 157 # Microchip 7-bit Single I2C Digital POT (100k) 159 # Microchip 7-bit Single I2C Digital POT (5k) 161 # Microchip 7-bit Single I2C Digital POT (10k) 163 # Microchip 7-bit Single I2C Digital POT (50k) 165 # Microchip 7-bit Single I2C Digital POT (100k) 167 # Microchip 7-bit Single I2C Digital POT (5k) 169 # Microchip 7-bit Single I2C Digital POT (10k) [all …]
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/linux-5.10/arch/arm64/boot/dts/mediatek/ |
D | mt8173-pinfunc.h | 17 #define MT8173_PIN_0_EINT0__FUNC_DBG_MON_A_20_ (MTK_PIN_NO(0) | 7) 24 #define MT8173_PIN_1_EINT1__FUNC_DBG_MON_A_21_ (MTK_PIN_NO(1) | 7) 31 #define MT8173_PIN_2_EINT2__FUNC_DBG_MON_A_22_ (MTK_PIN_NO(2) | 7) 38 #define MT8173_PIN_3_EINT3__FUNC_DBG_MON_A_23_ (MTK_PIN_NO(3) | 7) 62 #define MT8173_PIN_7_EINT7__FUNC_GPIO7 (MTK_PIN_NO(7) | 0) 63 #define MT8173_PIN_7_EINT7__FUNC_PCM1_DI (MTK_PIN_NO(7) | 1) 64 #define MT8173_PIN_7_EINT7__FUNC_I2S2_DI_1 (MTK_PIN_NO(7) | 2) 65 #define MT8173_PIN_7_EINT7__FUNC_SPI_MO_3_ (MTK_PIN_NO(7) | 3) 66 #define MT8173_PIN_7_EINT7__FUNC_AP_MD32_JTAG_TDI (MTK_PIN_NO(7) | 5) 67 #define MT8173_PIN_7_EINT7__FUNC_SFHOLD (MTK_PIN_NO(7) | 6) [all …]
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D | mt8516-pinfunc.h | 15 #define MT8516_PIN_0_EINT0__FUNC_DBG_MON_A_6 (MTK_PIN_NO(0) | 7) 23 #define MT8516_PIN_1_EINT1__FUNC_DBG_MON_A_7 (MTK_PIN_NO(1) | 7) 31 #define MT8516_PIN_2_EINT2__FUNC_DBG_MON_A_8 (MTK_PIN_NO(2) | 7) 39 #define MT8516_PIN_3_EINT3__FUNC_DBG_MON_A_9 (MTK_PIN_NO(3) | 7) 47 #define MT8516_PIN_4_EINT4__FUNC_DBG_MON_A_10 (MTK_PIN_NO(4) | 7) 55 #define MT8516_PIN_5_EINT5__FUNC_DBG_MON_A_11 (MTK_PIN_NO(5) | 7) 62 #define MT8516_PIN_6_EINT6__FUNC_DBG_MON_A_12 (MTK_PIN_NO(6) | 7) 64 #define MT8516_PIN_7_EINT7__FUNC_GPIO7 (MTK_PIN_NO(7) | 0) 65 #define MT8516_PIN_7_EINT7__FUNC_SQIRST (MTK_PIN_NO(7) | 1) 66 #define MT8516_PIN_7_EINT7__FUNC_SDA1_0 (MTK_PIN_NO(7) | 3) [all …]
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D | mt2712-pinfunc.h | 58 #define MT2712_PIN_7_PWM3__FUNC_GPIO7 (MTK_PIN_NO(7) | 0) 59 #define MT2712_PIN_7_PWM3__FUNC_PWM3 (MTK_PIN_NO(7) | 1) 60 #define MT2712_PIN_7_PWM3__FUNC_DISP1_PWM (MTK_PIN_NO(7) | 2) 61 #define MT2712_PIN_7_PWM3__FUNC_DISP0_PWM (MTK_PIN_NO(7) | 3) 62 #define MT2712_PIN_7_PWM3__FUNC_LCM_RST2 (MTK_PIN_NO(7) | 4) 63 #define MT2712_PIN_7_PWM3__FUNC_DIN_D0 (MTK_PIN_NO(7) | 5) 132 #define MT2712_PIN_24_CMMCLK__FUNC_DBG_MON_A_1_ (MTK_PIN_NO(24) | 7) 136 #define MT2712_PIN_25_CM2MCLK__FUNC_DBG_MON_A_2_ (MTK_PIN_NO(25) | 7) 145 #define MT2712_PIN_26_PCM_TX__FUNC_DBG_MON_A_3_ (MTK_PIN_NO(26) | 7) 151 #define MT2712_PIN_27_PCM_CLK__FUNC_DBG_MON_A_4_ (MTK_PIN_NO(27) | 7) [all …]
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/linux-5.10/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/ |
D | pci-6602.c | 63 .dest = NI_PFI(7), 65 TRIGGER_LINE(7), 72 NI_PFI(7), 84 TRIGGER_LINE(7), 92 NI_CtrInternalOutput(7), 101 NI_PFI(7), 113 TRIGGER_LINE(7), 121 NI_CtrInternalOutput(7), 130 NI_CtrGate(7), 138 NI_CtrSource(7), [all …]
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/linux-5.10/tools/perf/pmu-events/arch/x86/sandybridge/ |
D | pipeline.json | 45 "CounterHTOff": "0,1,2,3,4,5,6,7" 55 "CounterHTOff": "0,1,2,3,4,5,6,7" 64 "CounterHTOff": "0,1,2,3,4,5,6,7" 73 "CounterHTOff": "0,1,2,3,4,5,6,7" 83 "CounterHTOff": "0,1,2,3,4,5,6,7" 92 "CounterHTOff": "0,1,2,3,4,5,6,7" 102 "CounterHTOff": "0,1,2,3,4,5,6,7" 113 "CounterHTOff": "0,1,2,3,4,5,6,7" 124 "CounterHTOff": "0,1,2,3,4,5,6,7" 133 "CounterHTOff": "0,1,2,3,4,5,6,7" [all …]
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/linux-5.10/include/dt-bindings/pinctrl/ |
D | mt6797-pinfunc.h | 28 #define MT6797_GPIO7__FUNC_GPIO7 (MTK_PIN_NO(7) | 0) 29 #define MT6797_GPIO7__FUNC_CSI0B_L0N_T0B (MTK_PIN_NO(7) | 1) 98 #define MT6797_GPIO28__FUNC_C2K_DM_OTDO (MTK_PIN_NO(28) | 7) 107 #define MT6797_GPIO29__FUNC_C2K_DM_OTMS (MTK_PIN_NO(29) | 7) 111 #define MT6797_GPIO30__FUNC_MD_CLKM0 (MTK_PIN_NO(30) | 7) 115 #define MT6797_GPIO31__FUNC_MD_CLKM1 (MTK_PIN_NO(31) | 7) 124 #define MT6797_GPIO32__FUNC_C2K_DM_OTCK (MTK_PIN_NO(32) | 7) 133 #define MT6797_GPIO33__FUNC_C2K_DM_OTDI (MTK_PIN_NO(33) | 7) 142 #define MT6797_GPIO34__FUNC_C2K_DM_JTINTP (MTK_PIN_NO(34) | 7) 151 #define MT6797_GPIO35__FUNC_PCC_PPC_IO (MTK_PIN_NO(35) | 7) [all …]
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D | mt6397-pinfunc.h | 31 #define MT6397_PIN_7_SPI_MOSI__FUNC_GPIO7 (MTK_PIN_NO(7) | 0) 32 #define MT6397_PIN_7_SPI_MOSI__FUNC_SPI_MOSI (MTK_PIN_NO(7) | 1) 40 #define MT6397_PIN_9_AUD_CLK_MOSI__FUNC_TEST_OUT0 (MTK_PIN_NO(9) | 7) 45 #define MT6397_PIN_10_AUD_DAT_MISO__FUNC_TEST_OUT1 (MTK_PIN_NO(10) | 7) 50 #define MT6397_PIN_11_AUD_DAT_MOSI__FUNC_TEST_OUT2 (MTK_PIN_NO(11) | 7) 57 #define MT6397_PIN_12_COL0__FUNC_TEST_OUT3 (MTK_PIN_NO(12) | 7) 64 #define MT6397_PIN_13_COL1__FUNC_TEST_OUT4 (MTK_PIN_NO(13) | 7) 71 #define MT6397_PIN_14_COL2__FUNC_TEST_OUT5 (MTK_PIN_NO(14) | 7) 78 #define MT6397_PIN_15_COL3__FUNC_TEST_OUT6 (MTK_PIN_NO(15) | 7) 85 #define MT6397_PIN_16_COL4__FUNC_TEST_OUT7 (MTK_PIN_NO(16) | 7) [all …]
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D | mt6779-pinfunc.h | 20 #define PINMUX_GPIO0__FUNC_PTA_RXD (MTK_PIN_NO(0) | 7) 29 #define PINMUX_GPIO1__FUNC_PTA_TXD (MTK_PIN_NO(1) | 7) 54 #define PINMUX_GPIO4__FUNC_SCL8 (MTK_PIN_NO(4) | 7) 63 #define PINMUX_GPIO5__FUNC_SDA8 (MTK_PIN_NO(5) | 7) 72 #define PINMUX_GPIO6__FUNC_SCL9 (MTK_PIN_NO(6) | 7) 74 #define PINMUX_GPIO7__FUNC_GPIO7 (MTK_PIN_NO(7) | 0) 75 #define PINMUX_GPIO7__FUNC_SPI7_CLK (MTK_PIN_NO(7) | 1) 76 #define PINMUX_GPIO7__FUNC_I2S0_DI (MTK_PIN_NO(7) | 2) 77 #define PINMUX_GPIO7__FUNC_SRCLKENAI1 (MTK_PIN_NO(7) | 3) 78 #define PINMUX_GPIO7__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(7) | 4) [all …]
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/linux-5.10/drivers/video/fbdev/omap2/omapfb/dss/ |
D | hdmi5_core.c | 67 (v >> 8) & 0xff, 7, 0); in hdmi_core_ddc_init() 69 v & 0xff, 7, 0); in hdmi_core_ddc_init() 74 (v >> 8) & 0xff, 7, 0); in hdmi_core_ddc_init() 76 v & 0xff, 7, 0); in hdmi_core_ddc_init() 81 (v >> 8) & 0xff, 7, 0); in hdmi_core_ddc_init() 83 v & 0xff, 7, 0); in hdmi_core_ddc_init() 88 (v >> 8) & 0xff, 7, 0); in hdmi_core_ddc_init() 90 v & 0xff, 7, 0); in hdmi_core_ddc_init() 94 REG_FLD_MOD(base, HDMI_CORE_I2CM_SDA_HOLD_ADDR, v & 0xff, 7, 0); in hdmi_core_ddc_init() 100 REG_FLD_MOD(base, HDMI_CORE_I2CM_CTLINT, 0x1, 7, 7); in hdmi_core_ddc_init() [all …]
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/linux-5.10/tools/perf/pmu-events/arch/x86/jaketown/ |
D | pipeline.json | 36 "CounterHTOff": "0,1,2,3,4,5,6,7" 45 "CounterHTOff": "0,1,2,3,4,5,6,7" 54 "CounterHTOff": "0,1,2,3,4,5,6,7" 63 "CounterHTOff": "0,1,2,3,4,5,6,7" 72 "CounterHTOff": "0,1,2,3,4,5,6,7" 81 "CounterHTOff": "0,1,2,3,4,5,6,7" 90 "CounterHTOff": "0,1,2,3,4,5,6,7" 99 "CounterHTOff": "0,1,2,3,4,5,6,7" 108 "CounterHTOff": "0,1,2,3,4,5,6,7" 117 "CounterHTOff": "0,1,2,3,4,5,6,7" [all …]
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/linux-5.10/drivers/pinctrl/mediatek/ |
D | pinctrl-mtk-mt6797.h | 68 7, "GPIO7", 225 MTK_FUNCTION(7, "C2K_DM_OTDO") 238 MTK_FUNCTION(7, "C2K_DM_OTMS") 246 MTK_FUNCTION(7, "MD_CLKM0") 254 MTK_FUNCTION(7, "MD_CLKM1") 267 MTK_FUNCTION(7, "C2K_DM_OTCK") 280 MTK_FUNCTION(7, "C2K_DM_OTDI") 293 MTK_FUNCTION(7, "C2K_DM_JTINTP") 306 MTK_FUNCTION(7, "PCC_PPC_IO") 319 MTK_FUNCTION(7, "EXT_FRAME_SYNC") [all …]
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D | pinctrl-mtk-mt6397.h | 54 MTK_PIN(PINCTRL_PIN(7, "SPI_MOSI"), 72 MTK_FUNCTION(7, "TEST_OUT0") 80 MTK_FUNCTION(7, "TEST_OUT1") 88 MTK_FUNCTION(7, "TEST_OUT2") 98 MTK_FUNCTION(7, "TEST_OUT3") 108 MTK_FUNCTION(7, "TEST_OUT4") 118 MTK_FUNCTION(7, "TEST_OUT5") 128 MTK_FUNCTION(7, "TEST_OUT6") 138 MTK_FUNCTION(7, "TEST_OUT7") 148 MTK_FUNCTION(7, "TEST_OUT8") [all …]
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D | pinctrl-mt8192.c | 52 PIN_FIELD_BASE(7, 7, 4, 0x00f0, 0x10, 9, 1), 63 PIN_FIELD_BASE(18, 18, 7, 0x0100, 0x10, 4, 1), 64 PIN_FIELD_BASE(19, 19, 7, 0x0100, 0x10, 4, 1), 65 PIN_FIELD_BASE(20, 20, 7, 0x0100, 0x10, 5, 1), 66 PIN_FIELD_BASE(21, 21, 7, 0x0100, 0x10, 5, 1), 88 PIN_FIELD_BASE(43, 43, 7, 0x0100, 0x10, 4, 1), 89 PIN_FIELD_BASE(44, 44, 7, 0x0100, 0x10, 4, 1), 101 PIN_FIELD_BASE(56, 56, 1, 0x00c0, 0x10, 7, 1), 130 PIN_FIELD_BASE(85, 85, 3, 0x00a0, 0x10, 7, 1), 131 PIN_FIELD_BASE(86, 86, 3, 0x00a0, 0x10, 7, 1), [all …]
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/linux-5.10/arch/powerpc/xmon/ |
D | spu.h | 31 A_A, /* register at pos 7 */ 34 A_S, /* special purpose register at pos 7 */ 35 A_H, /* channel register at pos 7 */ 84 #define DECODE_INSN_RA(insn) ((insn >> 7) & 0x7f) 92 #define DECODE_INSN_I16(insn) SIGNED_EXTRACT(insn,16,7) 93 #define DECODE_INSN_U16(insn) UNSIGNED_EXTRACT(insn,16,7) 99 #define DECODE_INSN_I18(insn) SIGNED_EXTRACT(insn,18,7) 100 #define DECODE_INSN_U18(insn) UNSIGNED_EXTRACT(insn,18,7) 103 #define DECODE_INSN_I7(insn) SIGNED_EXTRACT(insn,7,14) 104 #define DECODE_INSN_U7(insn) UNSIGNED_EXTRACT(insn,7,14) [all …]
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/linux-5.10/include/asm-generic/ |
D | xor.h | 23 p1[7] ^= p2[7]; in xor_8regs_2() 43 p1[7] ^= p2[7] ^ p3[7]; in xor_8regs_3() 64 p1[7] ^= p2[7] ^ p3[7] ^ p4[7]; in xor_8regs_4() 86 p1[7] ^= p2[7] ^ p3[7] ^ p4[7] ^ p5[7]; in xor_8regs_5() 109 d7 = p1[7]; in xor_32regs_2() 117 d7 ^= p2[7]; in xor_32regs_2() 125 p1[7] = d7; in xor_32regs_2() 146 d7 = p1[7]; in xor_32regs_3() 154 d7 ^= p2[7]; in xor_32regs_3() 162 d7 ^= p3[7]; in xor_32regs_3() [all …]
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/linux-5.10/tools/testing/selftests/bpf/verifier/ |
D | dead_code.c | 7 BPF_MOV64_IMM(BPF_REG_0, 7), 12 .retval = 7, 17 BPF_MOV64_IMM(BPF_REG_0, 7), 23 .retval = 7, 32 BPF_MOV64_IMM(BPF_REG_0, 7), 43 BPF_MOV64_IMM(BPF_REG_0, 7), 49 .retval = 7, 54 BPF_MOV64_IMM(BPF_REG_0, 7), 61 .retval = 7, 66 BPF_MOV64_IMM(BPF_REG_0, 7), [all …]
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/linux-5.10/include/linux/mfd/da9150/ |
D | registers.h | 161 #define DA9150_REVERT_SHIFT 7 162 #define DA9150_REVERT_MASK BIT(7) 181 #define DA9150_LFOSC_STAT_SHIFT 7 182 #define DA9150_LFOSC_STAT_MASK BIT(7) 237 #define DA9150_VBUS_OT_SHIFT 7 238 #define DA9150_VBUS_OT_MASK BIT(7) 257 #define DA9150_CHG_IEND_STAT_SHIFT 7 258 #define DA9150_CHG_IEND_STAT_MASK BIT(7) 278 #define DA9150_CHG_BAT_REMOVED_SHIFT 7 279 #define DA9150_CHG_BAT_REMOVED_MASK BIT(7) [all …]
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/linux-5.10/drivers/scsi/qla2xxx/ |
D | qla_nx.h | 129 #define QLA82XX_HW_PX_MAP_CRB_QMN 7 192 #define QLA82XX_HW_CRB_HUB_AGT_ADR_MN ((QLA82XX_HW_H0_CH_HUB_ADR << 7) | \ 194 #define QLA82XX_HW_CRB_HUB_AGT_ADR_PH ((QLA82XX_HW_H0_CH_HUB_ADR << 7) | \ 196 #define QLA82XX_HW_CRB_HUB_AGT_ADR_MS ((QLA82XX_HW_H0_CH_HUB_ADR << 7) | \ 198 #define QLA82XX_HW_CRB_HUB_AGT_ADR_PS ((QLA82XX_HW_H1_CH_HUB_ADR << 7) | \ 200 #define QLA82XX_HW_CRB_HUB_AGT_ADR_SS ((QLA82XX_HW_H1_CH_HUB_ADR << 7) | \ 202 #define QLA82XX_HW_CRB_HUB_AGT_ADR_RPMX3 ((QLA82XX_HW_H1_CH_HUB_ADR << 7) | \ 204 #define QLA82XX_HW_CRB_HUB_AGT_ADR_QMS ((QLA82XX_HW_H1_CH_HUB_ADR << 7) | \ 206 #define QLA82XX_HW_CRB_HUB_AGT_ADR_SQS0 ((QLA82XX_HW_H1_CH_HUB_ADR << 7) | \ 208 #define QLA82XX_HW_CRB_HUB_AGT_ADR_SQS1 ((QLA82XX_HW_H1_CH_HUB_ADR << 7) | \ [all …]
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/linux-5.10/arch/arm64/boot/dts/amlogic/ |
D | meson-gxl-s905x-libretech-cc.dts | 245 "7J1 Header Pin5", 246 "7J1 Header Pin3", 247 "7J1 Header Pin12", 249 "9J3 Switch HDMI CEC/7J1 Header Pin11", 250 "7J1 Header Pin13", 252 "7J1 Header Pin15"; 280 "7J1 Header Pin27", "7J1 Header Pin28", 283 "7J1 Header Pin22", "7J1 Header Pin26", 284 "7J1 Header Pin36", "7J1 Header Pin38", 285 "7J1 Header Pin40", "7J1 Header Pin37", [all …]
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D | meson-gxl-s805x-libretech-ac.dts | 223 "7J1 Header Pin31", 239 "", "7J1 Header Pin13", 240 "7J1 Header Pin15", 241 "7J1 Header Pin7", 242 "7J1 Header Pin12", 243 "7J1 Header Pin16", 244 "7J1 Header Pin18", 256 "7J1 Header Pin27", "7J1 Header Pin28", "", 257 "7J1 Header Pin29", 260 "7J1 Header Pin22", "7J1 Header Pin26", [all …]
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/linux-5.10/Documentation/hwmon/ |
D | nct6775.rst | 137 pwm[1-7] 142 pwm[1-7]_enable 152 pwm[1-7]_mode 161 pwm[1-7]_temp_sel 165 pwm[1-7]_weight_temp_sel 173 pwm[1-7]_weight_duty_step 176 pwm[1-7]_weight_temp_step 181 pwm[1-7]_weight_temp_step_base 185 pwm[1-7]_weight_temp_step_tol 193 pwm[1-7]_target_temp [all …]
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/linux-5.10/drivers/net/ethernet/qlogic/qlcnic/ |
D | qlcnic_hdr.h | 231 ((QLCNIC_HW_H0_CH_HUB_ADR << 7) | QLCNIC_HW_MN_CRB_AGT_ADR) 233 ((QLCNIC_HW_H0_CH_HUB_ADR << 7) | QLCNIC_HW_PH_CRB_AGT_ADR) 235 ((QLCNIC_HW_H0_CH_HUB_ADR << 7) | QLCNIC_HW_MS_CRB_AGT_ADR) 238 ((QLCNIC_HW_H1_CH_HUB_ADR << 7) | QLCNIC_HW_PS_CRB_AGT_ADR) 240 ((QLCNIC_HW_H1_CH_HUB_ADR << 7) | QLCNIC_HW_SS_CRB_AGT_ADR) 242 ((QLCNIC_HW_H1_CH_HUB_ADR << 7) | QLCNIC_HW_RPMX3_CRB_AGT_ADR) 244 ((QLCNIC_HW_H1_CH_HUB_ADR << 7) | QLCNIC_HW_QMS_CRB_AGT_ADR) 246 ((QLCNIC_HW_H1_CH_HUB_ADR << 7) | QLCNIC_HW_SQGS0_CRB_AGT_ADR) 248 ((QLCNIC_HW_H1_CH_HUB_ADR << 7) | QLCNIC_HW_SQGS1_CRB_AGT_ADR) 250 ((QLCNIC_HW_H1_CH_HUB_ADR << 7) | QLCNIC_HW_SQGS2_CRB_AGT_ADR) [all …]
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/linux-5.10/tools/perf/pmu-events/arch/x86/ivybridge/ |
D | pipeline.json | 44 "CounterHTOff": "0,1,2,3,4,5,6,7" 54 "CounterHTOff": "0,1,2,3,4,5,6,7" 64 "CounterHTOff": "0,1,2,3,4,5,6,7" 74 "CounterHTOff": "0,1,2,3,4,5,6,7" 85 "CounterHTOff": "0,1,2,3,4,5,6,7" 96 "CounterHTOff": "0,1,2,3,4,5,6,7" 106 "CounterHTOff": "0,1,2,3,4,5,6,7" 141 "CounterHTOff": "0,1,2,3,4,5,6,7" 151 "CounterHTOff": "0,1,2,3,4,5,6,7" 161 "CounterHTOff": "0,1,2,3,4,5,6,7" [all …]
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/linux-5.10/tools/perf/pmu-events/arch/x86/ivytown/ |
D | pipeline.json | 44 "CounterHTOff": "0,1,2,3,4,5,6,7" 54 "CounterHTOff": "0,1,2,3,4,5,6,7" 64 "CounterHTOff": "0,1,2,3,4,5,6,7" 74 "CounterHTOff": "0,1,2,3,4,5,6,7" 85 "CounterHTOff": "0,1,2,3,4,5,6,7" 96 "CounterHTOff": "0,1,2,3,4,5,6,7" 106 "CounterHTOff": "0,1,2,3,4,5,6,7" 141 "CounterHTOff": "0,1,2,3,4,5,6,7" 151 "CounterHTOff": "0,1,2,3,4,5,6,7" 161 "CounterHTOff": "0,1,2,3,4,5,6,7" [all …]
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