Home
last modified time | relevance | path

Searched +full:4 +full:c000000 (Results 1 – 25 of 48) sorted by relevance

12

/linux-5.10/Documentation/devicetree/bindings/memory-controllers/ti/
Demif.txt61 emif1: emif@4c000000 {
62 compatible = "ti,emif-4d";
73 emif: emif@4c000000 {
80 emif1: emif@4c000000 {
/linux-5.10/Documentation/devicetree/bindings/clock/
Dsamsung,s3c2412-clock.txt32 clocks: clock-controller@4c000000 {
45 interrupts = <1 23 3 4>, <1 23 4 4>;
Dsamsung,s3c2410-clock.txt33 clocks: clock-controller@4c000000 {
46 interrupts = <1 23 3 4>, <1 23 4 4>;
Dsamsung,s3c2443-clock.txt37 clocks: clock-controller@4c000000 {
50 interrupts = <1 23 3 4>, <1 23 4 4>;
/linux-5.10/Documentation/devicetree/bindings/hwlock/
Dst,stm32-hwspinlock.yaml42 hwspinlock@4c000000 {
/linux-5.10/Documentation/devicetree/bindings/mips/cavium/
Dsata-uctl.txt28 uctl@118006c000000 {
40 interrupts = <2 4>; /* Bit: 2, level */
/linux-5.10/Documentation/devicetree/bindings/usb/
Dpxa-usb.txt24 usb0: ohci@4c000000 {
/linux-5.10/arch/arm/boot/dts/
Ds3c2416.dtsi31 clocks: clock-controller@4c000000 {
40 interrupts = <1 18 24 4>, <1 18 25 4>;
48 sdhci_1: sdhci@4ac00000 {
59 sdhci_0: sdhci@4a800000 {
Dspear320-evb.dts23 st,pinmux-mode = <4>;
83 fsmc: flash@4c000000 {
Dspear320.dtsi32 fsmc: flash@4c000000 {
Dpxa27x.dtsi27 reg = <0x40e00054 0x20 0x40e0000c 0xc 0x40e0010c 4
38 usb0: usb@4c000000 {
95 interrupts = <4>;
Daspeed-bmc-opp-vesnin.dts30 flash_memory: region@5c000000 {
40 gpios = <&gpio ASPEED_GPIO(R, 4) GPIO_ACTIVE_LOW>;
Dspear320-hmi.dts23 st,pinmux-mode = <4>;
99 fsmc: flash@4c000000 {
255 ts,sample-time = <4>;
261 ts,settling = <4>;
Dkeystone-k2e.dtsi89 msm_ram: sram@c000000 {
144 reg = <0x21021000 0x2000>, <0x21020000 0x1000>, <0x02620128 4>;
160 <0 0 0 4 &pcie_intc1 3>; /* INT D */
Daspeed-bmc-opp-palmetto.dts35 flash_memory: region@5c000000 {
45 gpios = <&gpio ASPEED_GPIO(R, 4) GPIO_ACTIVE_LOW>;
66 clock-gpios = <&gpio ASPEED_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
166 tmp423@4c {
214 gpios = <ASPEED_GPIO(C, 4) GPIO_ACTIVE_HIGH>;
284 gpios = <ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH>;
312 gpios = <ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>;
Dvexpress-v2p-ca5s.dts75 interrupts = <0 85 4>;
90 interrupts = <0 86 4>,
91 <0 87 4>;
96 scu@2c000000 {
133 interrupts = <0 84 4>;
139 interrupts = <0 68 4>,
140 <0 69 4>;
186 arm,vexpress-sysreg,func = <1 4>;
204 arm,vexpress-sysreg,func = <4 0>;
218 <4 0 0x0c000000 0x04000000>,
[all …]
Dkeystone-k2hk.dtsi60 msm_ram: sram@c000000 {
82 0xa4c 8 0xa4c 8 0x84c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 4: dsp4 */
228 resets = <&pscrst 4>;
230 interrupts = <4 12>;
Dvexpress-v2p-ca9.dts78 vram: vram@4c000000 {
90 interrupts = <0 44 4>;
114 interrupts = <0 45 4>,
115 <0 46 4>;
123 interrupts = <0 48 4>,
124 <0 49 4>;
133 interrupts = <0 51 4>;
167 interrupts = <0 43 4>;
176 interrupts = <0 60 4>,
177 <0 61 4>,
[all …]
Dpxa3xx.dtsi6 ((gpio <= 2) ? (0x00b4 + 4 * gpio) : \
7 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
8 (gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) : \
9 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
12 ((gpio <= 1) ? (0x674 + 4 * gpio) : \
13 (gpio <= 6) ? (0x2dc + 4 * gpio) : \
17 ((gpio <= 2) ? (0x00b4 + 4 * gpio) : \
18 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
19 (gpio <= 29) ? (0x0400 + 4 * (gpio - 27)) : \
20 (gpio <= 98) ? (0x0418 + 4 * (gpio - 30)) : \
[all …]
/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dsifive,plic-1.0.0.yaml17 in an 4 core system with 2-way SMT, you have 8 harts and probably at least two
84 plic: interrupt-controller@c000000 {
/linux-5.10/arch/sh/mm/
DKconfig12 On other systems (such as the SH-3 and 4) where an MMU exists,
41 The page size is not necessarily 4KB. Keep this in mind when
54 boards typically map RAM at 0C000000.
87 32-bits through the SH-4A PMB. If this is not set, legacy
167 bool "4kB"
187 This enables support for 64kB pages, possible on all SH-4
210 bool "4MB"
251 Since there's sill some aliasing issues on SH-4, this option will
/linux-5.10/arch/mips/boot/dts/mti/
Dsead3.dts69 flash@1c000000 {
74 bank-width = <4>;
221 reg-io-width = <4>;
227 interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>; /* GIC 3 or CPU 4 */
236 reg-io-width = <4>;
242 interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>; /* GIC 2 or CPU 4 */
250 reg-io-width = <4>;
/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhip05.dtsi245 its_peri: interrupt-controller@8c000000 {
306 reg-io-width = <4>;
317 reg-io-width = <4>;
/linux-5.10/arch/riscv/boot/dts/sifive/
Dfu540-c000.dtsi112 cpu4: cpu@4 {
126 reg = <4>;
142 plic0: interrupt-controller@c000000 {
165 interrupts = <4>;
/linux-5.10/arch/arm64/boot/dts/freescale/
Dfsl-ls1088a.dtsi28 /* We have 2 clusters having 4 Cortex-A53 cores each */
261 /* Calibration data group 4 */
282 clocks = <&clockgen 4 1>;
290 clocks = <&clockgen 4 3>;
298 clocks = <&clockgen 4 3>;
363 clocks = <&clockgen 4 7>;
373 clocks = <&clockgen 4 7>;
383 clocks = <&clockgen 4 7>;
393 clocks = <&clockgen 4 7>;
406 clocks = <&clockgen 4 3>, <&clockgen 4 3>;
[all …]

12