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/linux/Documentation/arch/arm64/
H A Dmemory.rst8 Linux kernel. The architecture allows up to 4 levels of translation
9 tables with a 4KB page size and up to 3 levels with a 64KB page size.
11 AArch64 Linux uses either 3 levels or 4 levels of translation tables
12 with the 4KB page configuration, allowing 39-bit (512GB) or 48-bit
14 64KB pages, only 2 levels of translation tables, allowing 42-bit (4TB)
18 only available when running with a 64KB page size and expands the
23 contains only user (non-global) mappings. The swapper_pg_dir address is
30 GICv2 gets mapped next to the HYP idmap page, as do vectors when
36 52-bit VA support in the kernel
37 -------------------------------
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/linux/Documentation/translations/zh_CN/mm/
H A Dpage_tables.rst1 .. SPDX-License-Identifier: GPL-2.0
2 .. include:: ../disclaimer-zh_CN.rst
26 虚拟地址对应的物理地址通常由底层物理页帧引用。 **页帧号(page frame number,pfn)**
32 在页粒度为 4KB 且地址范围为32位的情况下，pfn 0 对应地址0x00000000，pfn 1 对应
34 0xfffff000。如果页粒度为 16KB，则 pfn 分别对应地址 0x00004000、0x00008000
37 如你所见，对于 4KB 页面粒度，页基址使用地址的 12-31 位，这就是为什么在这种情况下
40 随着内存容量的增加，久而久之层级结构逐渐加深。Linux 最初使用 4KB 页面和一个名为
41 `swapper_pg_dir` 的页表，该页表拥有 1024 个表项(entries)，覆盖 4MB 的内存，
42 事实上Torvald 的第一台计算机正好就有 4MB 物理内存。表项在这张表中被称为 *PTE*:s
43 - 页表项(page table entries)。
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/linux/Documentation/filesystems/
H A Dproc.rst1 .. SPDX-License-Identifier: GPL-2.0
24 1.1 Process-Specific Subdirectories
36 3 Per-Process Parameters
37 3.1 /proc/<pid>/oom_adj & /proc/<pid>/oom_score_adj - Adjust the oom-killer
39 3.2 /proc/<pid>/oom_score - Display current oom-killer score
40 3.3 /proc/<pid>/io - Display the IO accounting fields
41 3.4 /proc/<pid>/coredump_filter - Core dump filtering settings
42 3.5 /proc/<pid>/mountinfo - Information about mounts
44 3.7 /proc/<pid>/task/<tid>/children - Information about task children
45 3.8 /proc/<pid>/fdinfo/<fd> - Information about opened file
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/linux/arch/parisc/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
83 select HAVE_DYNAMIC_FTRACE if $(cc-option,-fpatchable-function-entry=1,1)
93 The PA-RISC microprocessor is designed by Hewlett-Packard and used
95 and later HP3000 series). The PA-RISC Linux project home page is
155 # unless you want to implement ACPI on PA-RISC ... ;-)
190 that can run on all 32-bit PA CPUs (albeit not optimally fast),
193 Specifying "PA8000" here will allow you to select a 64-bit kernel
199 Select this option for the PCX-L processor, as used in the
201 D200, D210, D300, D310 and E-class
206 Select this option for the PCX-T' processor, as used in the
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/linux/arch/powerpc/include/asm/book3s/64/
H A Dradix-4k.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * For 4K page size supported index is 13/9/9/9
8 #define RADIX_PTE_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps 2^9 x 4K = 2MB
9 #define RADIX_PMD_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps 2^9 x 2MB = 1GB
10 #define RADIX_PUD_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps 2^9 x 1GB = 512GB
11 #define RADIX_PGD_INDEX_SIZE 13 // size: 8B << 13 = 64KB, maps 2^13 x 512GB = 4PB
14 * One fragment per page
H A Dradix-64k.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * For 64K page size supported index is 13/9/9/5
9 #define RADIX_PMD_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps 2^9 x 2MB = 1GB
10 #define RADIX_PUD_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps 2^9 x 1GB = 512GB
11 #define RADIX_PGD_INDEX_SIZE 13 // size: 8B << 13 = 64KB, maps 2^13 x 512GB = 4PB
14 * We use a 256 byte PTE page fragment in radix
H A Dhash-64k.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #define H_PTE_INDEX_SIZE 8 // size: 8B << 8 = 2KB, maps 2^8 x 64KB = 16MB
6 #define H_PMD_INDEX_SIZE 10 // size: 8B << 10 = 8KB, maps 2^10 x 16MB = 16GB
7 #define H_PUD_INDEX_SIZE 10 // size: 8B << 10 = 8KB, maps 2^10 x 16GB = 16TB
8 #define H_PGD_INDEX_SIZE 8 // size: 8B << 8 = 2KB, maps 2^8 x 16TB = 4PB
11 * If we store section details in page->flags we can't increase the MAX_PHYSMEM_BITS
12 * if we increase SECTIONS_WIDTH we will not store node details in page->flags and
13 * page_to_nid does a page->section->node lookup
37 * Define the address range of the kernel non-linear virtual area
46 #define H_PAGE_COMBO _RPAGE_RPN0 /* this is a combo 4k page */
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H A Dhash-4k.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #define H_PTE_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps: 2^9 x 4KB = 2MB
6 #define H_PMD_INDEX_SIZE 7 // size: 8B << 7 = 1KB, maps: 2^7 x 2MB = 256MB
7 #define H_PUD_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps: 2^9 x 256MB = 128GB
8 #define H_PGD_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps: 2^9 x 128GB = 64TB
11 * Each context is 512TB. But on 4k we restrict our max TASK size to 64TB
18 * Our page table limit us to 64TB. For 64TB physical memory, we only need 64GB
31 * Define the address range of the kernel non-linear virtual area (61TB)
51 * Not supported by 4k linux page size
72 * On all 4K setups, remap_4k_pfn() equates to remap_pfn_range()
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/linux/arch/sh/mm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
12 Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
15 On other systems (such as the SH-3 and 4) where an MMU exists,
26 On MMU-less systems, any of these page sizes can be selected
40 The kernel page allocator limits the size of maximal physically
47 The page size is not necessarily 4KB. Keep this in mind when
89 bool "Support 32-bit physical addressing through PMB"
95 32-bits through the SH-4A PMB. If this is not set, legacy
96 29-bit physical addressing will be used.
103 bool "Support vsyscall page"
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/linux/Documentation/admin-guide/cgroup-v1/
H A Dhugetlb.rst7 # mount -t cgroup -o hugetlb none /sys/fs/cgroup
25 …rsvd.max_usage_in_bytes # show max "hugepagesize" hugetlb reservations and no-reserve faults
26 …hugetlb.<hugepagesize>.rsvd.usage_in_bytes # show current reservations and no-reserve f…
46 hugetlb.64KB.limit_in_bytes
47 hugetlb.64KB.max_usage_in_bytes
48 hugetlb.64KB.numa_stat
49 hugetlb.64KB.usage_in_bytes
50 hugetlb.64KB.failcnt
51 hugetlb.64KB.rsvd.limit_in_bytes
52 hugetlb.64KB.rsvd.max_usage_in_bytes
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/linux/drivers/char/agp/
H A Dintel-gtt.c15 * /fairy-tale-mode off
27 #include "intel-agp.h"
28 #include <drm/intel/intel-gtt.h>
52 /* This should undo anything done in ->setup() save the unmapping
58 * For chipsets that need to support old ums (non-gem) code, this
78 struct page *scratch_page;
93 #define INTEL_GTT_GEN intel_private.driver->gen
94 #define IS_G33 intel_private.driver->is_g33
95 #define IS_PINEVIEW intel_private.driver->is_pineview
96 #define IS_IRONLAKE intel_private.driver->is_ironlake
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/linux/Documentation/ABI/testing/
H A Dprocfs-smaps_rollup5 This file provides pre-summed memory information for a
15 and the procfs man page.
19 00100000-ff709000 ---p 00000000 00:00 0 [rollup]
20 Size: 1192 kB
21 KernelPageSize: 4 kB
22 MMUPageSize: 4 kB
23 Rss: 884 kB
24 Pss: 385 kB
25 Pss_Dirty: 68 kB
26 Pss_Anon: 301 kB
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/linux/Documentation/mm/
H A Dvmemmap_dedup.rst2 .. SPDX-License-Identifier: GPL-2.0
13 The ``struct page`` structures are used to describe a physical page frame. By
14 default, there is a one-to-one mapping from a page frame to its corresponding
15 ``struct page``.
17 HugeTLB pages consist of multiple base page size pages and is supported by many
18 architectures. See Documentation/admin-guide/mm/hugetlbpage.rst for more
19 details. On the x86-64 architecture, HugeTLB pages of size 2MB and 1GB are
20 currently supported. Since the base page size on x86 is 4KB, a 2MB HugeTLB page
21 consists of 512 base pages and a 1GB HugeTLB page consists of 262144 base pages.
22 For each base page, there is a corresponding ``struct page``.
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/linux/arch/mips/include/asm/
H A Dpgtable-64.h16 #include <asm/page.h>
21 #include <asm-generic/pgtable-nopmd.h>
23 #include <asm-generic/pgtable-nopud.h>
25 #include <asm-generic/pgtable-nop4d.h>
29 * Each address space has 2 4K pages as its page directory, giving 1024
31 * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
32 * tables. Each page table is also a single 4K page, giving 512 (==
39 * fault address - VMALLOC_START.
43 /* PGDIR_SHIFT determines what a third-level page table entry can map */
45 #define PGDIR_SHIFT (PAGE_SHIFT + PAGE_SHIFT - 3)
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/linux/include/xen/
H A Dpage.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <asm/page.h>
7 /* The hypercall interface supports only 4KB page */
10 #define XEN_PAGE_MASK (~(XEN_PAGE_SIZE-1))
19 (pfn_to_page((unsigned long)(xen_pfn) >> (PAGE_SHIFT - XEN_PAGE_SHIFT)))
20 #define page_to_xen_pfn(page) \ argument
21 ((page_to_pfn(page)) << (PAGE_SHIFT - XEN_PAGE_SHIFT))
26 #define XEN_PFN_UP(x) (((x) + XEN_PAGE_SIZE-1) >> XEN_PAGE_SHIFT)
28 #include <asm/xen/page.h>
30 /* Return the GFN associated to the first 4KB of the page */
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/linux/arch/powerpc/include/asm/
H A Dpnv-ocxl.h1 /* SPDX-License-Identifier: GPL-2.0+ */
10 #define PNV_OCXL_TL_BITS_PER_RATE 4
21 * 0b01 Invalidate just Page Walk Cache.
22 * 0b10 Invalidate TLB, Page Walk Cache, and any
26 /* Number and Page Size of translations to be invalidated */
37 /* Actual Page Size to be invalidated
38 * 000 4KB
39 * 101 64KB
44 /* Defines the large page select
45 * L=0b0 for 4KB pages
/linux/drivers/net/ethernet/intel/iavf/
H A Diavf_alloc.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
15 iavf_mem_atq_ring = 4, /* ATQ descriptor ring */
16 iavf_mem_pd = 5, /* Page Descriptor */
17 iavf_mem_bp = 6, /* Backing Page - 4KB */
18 iavf_mem_bp_jumbo = 7, /* Backing Page - > 4KB */
/linux/Documentation/admin-guide/mm/
H A Dtranshuge.rst12 that supports the automatic promotion and demotion of page sizes and
19 in the examples below we presume that the basic page size is 4K and
20 the huge page size is 2M, although the actual numbers may vary
26 requiring larger clear-page copy-page in page faults which is a
28 single page fault for each 2M virtual region touched by userland (so
48 Modern kernels support "multi-size THP" (mTHP), which introduces the
49 ability to allocate memory in blocks that are bigger than a base page
50 but smaller than traditional PMD-size (as described above), in
51 increments of a power-of-2 number of pages. mTHP can back anonymous
53 PTE-mapped, but in many cases can still provide similar benefits to
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/linux/arch/arc/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
90 source "arch/arc/plat-tb10x/Kconfig"
91 source "arch/arc/plat-axs10x/Kconfig"
92 source "arch/arc/plat-hsdk/Kconfig"
110 ISA for the Next Generation ARC-HS cores
128 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
130 -Caches: New Prog Model, Region Flush
131 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
134 bool "ARC-HS"
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/linux/Documentation/devicetree/bindings/net/
H A Dfsl,fman-port.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/fsl,fman-port.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
21 - fsl,fman-v2-port-oh
22 - fsl,fman-v2-port-rx
23 - fsl,fman-v2-port-tx
24 - fsl,fman-v3-port-oh
25 - fsl,fman-v3-port-rx
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/linux/tools/mm/
H A Dthpmaps2 # SPDX-License-Identifier: GPL-2.0-only
5 # Utility providing smaps-like output detailing transparent hugepage usage.
7 # ./thpmaps --help
34 return (v + (a - 1)) & ~(a - 1)
38 return v & (a - 1)
41 def kbnr(kb):
42 # Convert KB to number of pages.
43 return (kb << 10) >> PAGE_SHIFT
47 # Convert number of pages to KB.
52 # Convert page order to KB.
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/linux/fs/proc/
H A Dtask_mmu.c1 // SPDX-License-Identifier: GPL-2.0
32 #define SENTINEL_VMA_END -1
33 #define SENTINEL_VMA_GATE -2
36 seq_put_decimal_ull_width(m, str, (val) << (PAGE_SHIFT-10), 8)
53 hiwater_vm = total_vm = mm->total_vm; in task_mem()
54 if (hiwater_vm < mm->hiwater_vm) in task_mem()
55 hiwater_vm = mm->hiwater_vm; in task_mem()
57 if (hiwater_rss < mm->hiwater_rss) in task_mem()
58 hiwater_rss = mm->hiwater_rss; in task_mem()
61 text = PAGE_ALIGN(mm->end_code) - (mm->start_code & PAGE_MASK); in task_mem()
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/linux/drivers/md/dm-vdo/
H A Dmemory-alloc.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include "memory-alloc.h"
38 * @flag_ptr: Location of the allocation-allowed flag
71 * performance-critical stage for us, so a linked list should be fine.
113 memory_stats.kmalloc_blocks--; in remove_kmalloc_block()
114 memory_stats.kmalloc_bytes -= size; in remove_kmalloc_block()
123 block->next = memory_stats.vmalloc_list; in add_vmalloc_block()
126 memory_stats.vmalloc_bytes += block->size; in add_vmalloc_block()
140 block_ptr = &block->next) { in remove_vmalloc_block()
141 if (block->ptr == ptr) { in remove_vmalloc_block()
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/linux/include/xen/arm/
H A Dpage.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <asm/page.h>
9 #include <linux/dma-mapping.h>
22 /* Xen pseudo-physical address */
33 * The pseudo-physical frame (pfn) used in all the helpers is always based
34 * on Xen page granularity (i.e 4KB).
36 * A Linux page may be split across multiple non-contiguous Xen page so we
37 * have to keep track with frame based on 4KB page granularity.
46 /* Pseudo-physical <-> Guest conversion */
57 /* Pseudo-physical <-> BUS conversion */
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/linux/arch/x86/include/asm/
H A Dboot.h1 /* SPDX-License-Identifier: GPL-2.0 */
17 #if (CONFIG_PHYSICAL_ALIGN & (CONFIG_PHYSICAL_ALIGN-1)) || \
27 * The ZSTD_DCtx is ~160KB, so set the heap size to 192KB because it is a
39 * Used by decompressor's startup_32() to allocate page tables for identity
40 * mapping of the 4G of RAM in 4-level paging mode:
41 * - 1 level4 table;
42 * - 1 level3 table;
43 * - 4 level2 table that maps everything with 2M pages;
45 * The additional level5 table needed for 5-level paging is allocated from
51 * Total number of page tables kernel_add_identity_map() can allocate,
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