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Searched +full:2 +full:c001000 (Results 1 – 10 of 10) sorted by relevance

/linux-5.10/arch/arm64/boot/dts/arm/
Dfoundation-v8-gicv2.dtsi8 gic: interrupt-controller@2c001000 {
Drtsm_ve-aemv8a.dts23 #address-cells = <2>;
24 #size-cells = <2>;
36 #address-cells = <2>;
55 cpu@2 {
84 #address-cells = <2>;
85 #size-cells = <2>;
88 /* Chipselect 2,00000000 is physically at 0x18000000 */
97 gic: interrupt-controller@2c001000 {
138 #address-cells = <2>;
142 <2 0 0 0x18000000 0x04000000>,
[all …]
Dvexpress-v2f-1xv7-ca53x2.dts8 * Cortex-A53 (2 cores) Soft Macrocell Model
24 #address-cells = <2>;
25 #size-cells = <2>;
41 #address-cells = <2>;
65 reg = <0 0x80000000 0 0x80000000>; /* 2GB @ 2GB */
69 #address-cells = <2>;
70 #size-cells = <2>;
73 /* Chipselect 2 is physically at 0x18000000 */
82 gic: interrupt-controller@2c001000 {
91 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/mailbox/
Dst,stm32-ipcc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
34 minItems: 2
42 minItems: 2
70 ipcc: mailbox@4c001000 {
/linux-5.10/arch/arm/boot/dts/
Dxenvm-4.2.dts16 #address-cells = <2>;
17 #size-cells = <2>;
45 cpu_on = <2>;
54 gic: interrupt-controller@2c001000 {
Dvexpress-v2p-ca5s.dts63 /* Chipselect 2 is physically at 0x18000000 */
72 hdlcd@2a110000 {
80 memory-controller@2a150000 {
87 memory-controller@2a190000 {
96 scu@2c000000 {
101 timer@2c000600 {
107 timer@2c000200 {
115 watchdog@2c000620 {
121 gic: interrupt-controller@2c001000 {
130 L2: cache-controller@2c0f0000 {
[all …]
Dvexpress-v2p-ca15-tc1.dts20 #address-cells = <2>;
21 #size-cells = <2>;
57 #address-cells = <2>;
58 #size-cells = <2>;
61 /* Chipselect 2 is physically at 0x18000000 */
70 hdlcd@2b000000 {
78 memory-controller@2b0a0000 {
85 wdt@2b060000 {
94 gic: interrupt-controller@2c001000 {
202 arm,vexpress-sysreg,func = <2 0>;
[all …]
Dvexpress-v2p-ca15_a7.dts20 #address-cells = <2>;
21 #size-cells = <2>;
58 cpu2: cpu@2 {
113 #address-cells = <2>;
114 #size-cells = <2>;
117 /* Chipselect 2 is physically at 0x18000000 */
126 wdt@2a490000 {
134 hdlcd@2b000000 {
142 memory-controller@2b0a0000 {
149 gic: interrupt-controller@2c001000 {
[all …]
Dstm32mp151.dtsi180 timer@2 {
182 reg = <2>;
567 dac2: dac@2 {
570 reg = <2>;
923 dfsdm2: filter@2 {
926 reg = <2>;
1079 ipcc: mailbox@4c001000 {
1144 #interrupt-cells = <2>;
1196 trigger@2 {
1198 reg = <2>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic.yaml69 The 2nd cell contains the interrupt number for the interrupt type.
76 2 = high-to-low edge triggered (invalid for SPIs)
90 first region is the GIC distributor register base and size. The 2nd region
96 control register base and size. The 2nd additional region is the GIC
98 minItems: 2
117 maxItems: 2
195 interrupt-controller@2c001000 {