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/qemu/gdb-xml/
H A Dloongarch-lasx.xml28 <reg name="xr0" bitsize="256" type="lasxv" group="lasx"/>
29 <reg name="xr1" bitsize="256" type="lasxv" group="lasx"/>
30 <reg name="xr2" bitsize="256" type="lasxv" group="lasx"/>
31 <reg name="xr3" bitsize="256" type="lasxv" group="lasx"/>
32 <reg name="xr4" bitsize="256" type="lasxv" group="lasx"/>
33 <reg name="xr5" bitsize="256" type="lasxv" group="lasx"/>
34 <reg name="xr6" bitsize="256" type="lasxv" group="lasx"/>
35 <reg name="xr7" bitsize="256" type="lasxv" group="lasx"/>
36 <reg name="xr8" bitsize="256" type="lasxv" group="lasx"/>
37 <reg name="xr9" bitsize="256" type="lasxv" group="lasx"/>
[all …]
/qemu/tests/qemu-iotests/
H A D149.out1 # ================= dm-crypt aes-256-xts-plain64-sha1 =================
3 truncate TEST_DIR/luks-aes-256-xts-plain64-sha1.img --size 4194304MB
5 …512 --hash sha1 --key-slot 0 --key-file - --iter-time 10 TEST_DIR/luks-aes-256-xts-plain64-sha1.img
7 sudo cryptsetup -q -v luksOpen TEST_DIR/luks-aes-256-xts-plain64-sha1.img qiotest-145-aes-256-xts-p…
9 sudo chown UID:GID /dev/mapper/qiotest-145-aes-256-xts-plain64-sha1
10 … 100M 10M --image-opts driver=host_device,filename=/dev/mapper/qiotest-145-aes-256-xts-plain64-sha1
15 sudo chown UID:GID /dev/mapper/qiotest-145-aes-256-xts-plain64-sha1
16 …5728M 10M --image-opts driver=host_device,filename=/dev/mapper/qiotest-145-aes-256-xts-plain64-sha1
21 sudo cryptsetup -q -v luksClose qiotest-145-aes-256-xts-plain64-sha1
23 …4 --image-opts driver=luks,key-secret=sec0,file.filename=TEST_DIR/luks-aes-256-xts-plain64-sha1.img
[all …]
H A D149427 LUKSConfig("aes-256-xts-plain64-sha1",
428 "aes", 256, "xts", "plain64", None, "sha1"),
432 LUKSConfig("twofish-256-xts-plain64-sha1",
433 "twofish", 256, "xts", "plain64", None, "sha1"),
434 LUKSConfig("serpent-256-xts-plain64-sha1",
435 "serpent", 256, "xts", "plain64", None, "sha1"),
440 LUKSConfig("cast6-256-xts-plain64-sha1",
441 "cast6", 256, "xts", "plain64", None, "sha1"),
445 LUKSConfig("aes-256-cbc-plain-sha1",
446 "aes", 256, "cbc", "plain", None, "sha1"),
[all …]
H A D066.out7 256 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
9 256 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
23 256 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
25 256 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
H A D11559 # 8192 * 512/8 = 524,288 clusters which cover a space of 256 MB.
65 # least 256 MB. We can achieve that by using preallocation=metadata for an image
66 # which has a guest disk size of 256 MB.
68 _make_test_img -o "refcount_bits=64,cluster_size=512,preallocation=metadata" 256M
H A D03768 pattern=$(( ( (cur_sec % 256) + (cur_sec / 256)) % 256 ))
74 backing_io 0 256 write | $QEMU_IO "$TEST_IMG" | _filter_qemu_io
H A D06657 $QEMU_IO -c "write 0 256k" -c "write -z 0 256k" -c "write 64M 512" \
76 $QEMU_IO -c 'write -P 42 1M 256k' "$TEST_IMG" | _filter_qemu_io
80 $QEMU_IO -c 'write -z 1M 256k' "$TEST_IMG" | _filter_qemu_io
/qemu/target/s390x/
H A Dcpu_features_def.h.inc184 DEF_FEAT(PLO_CLO, "plo-clo", PLO, 24, "PLO Compare and load (256 bit in parameter list)")
185 DEF_FEAT(PLO_CSO, "plo-cso", PLO, 25, "PLO Compare and swap (256 bit in parameter list)")
186 DEF_FEAT(PLO_DCSO, "plo-dcso", PLO, 26, "PLO Double compare and swap (256 bit in parameter list)")
187 DEF_FEAT(PLO_CSSTO, "plo-cssto", PLO, 27, "PLO Compare and swap and store (256 bit in parameter lis…
188 DEF_FEAT(PLO_CSDSTO, "plo-csdsto", PLO, 28, "PLO Compare and swap and double store (256 bit in para…
189 DEF_FEAT(PLO_CSTSTO, "plo-cststo", PLO, 29, "PLO Compare and swap and trible store (256 bit in para…
193 DEF_FEAT(PLO_TCSO, "plo-tcso", PLO, 33, "Triple compare and swap (256 bit in parameter list)")
197 DEF_FEAT(PLO_QCSO, "plo-qcso", PLO, 37, "Quadruple compare and swap (256 bit in parameter list)")
198 DEF_FEAT(PLO_LO, "plo-lo", PLO, 38, "Load (256 bit in parameter list)")
200 DEF_FEAT(PLO_DLO, "plo-dlo", PLO, 40, "Double load (256 bit in parameter list)")
[all …]
/qemu/tests/qtest/
H A Dcxl-test.c38 "-object memory-backend-file,id=cxl-mem0,mem-path=%s,size=256M " \
39 "-object memory-backend-file,id=lsa0,mem-path=%s,size=256M " \
43 "-object memory-backend-file,id=cxl-mem0,mem-path=%s,size=256M " \
44 "-object memory-backend-file,id=lsa0,mem-path=%s,size=256M " \
48 "-object memory-backend-ram,id=cxl-mem0,size=256M " \
52 "-object memory-backend-ram,id=cxl-mem0,size=256M " \
53 "-object memory-backend-file,id=lsa0,mem-path=%s,size=256M " \
57 "-object memory-backend-file,id=cxl-mem0,mem-path=%s,size=256M " \
58 "-object memory-backend-file,id=lsa0,mem-path=%s,size=256M " \
60 "-object memory-backend-file,id=cxl-mem1,mem-path=%s,size=256M " \
[all …]
H A Dpnv-xive2-common.h27 * 256 ENDs
29 * 256 VPs
33 #define MAX_ENDS 256
34 #define MAX_VPS 256
42 #define XIVE_IC_TM_INDIRECT (XIVE_IC_ADDR + (256 << XIVE_PAGE_SHIFT))
71 #define XIVE_REPORT_SIZE 256 /* two cache lines per NVP */
H A Dcmsdk-apb-dualtimer-test.c86 /* Start timer: will fire after 40 * 256 * 1000 == 1024000 ns */ in test_prescale()
88 /* enable in periodic, wrapping, interrupt mode, prescale 256 */ in test_prescale()
93 clock_step(40 * 256 * 501); in test_prescale()
98 clock_step(40 * 256 * 500); in test_prescale()
103 clock_step(40 * 256); in test_prescale()
/qemu/docs/system/devices/
H A Dcxl.rst307 -object memory-backend-file,id=cxl-mem1,share=on,mem-path=/tmp/cxltest.raw,size=256M \
308 -object memory-backend-file,id=cxl-lsa1,share=on,mem-path=/tmp/lsa.raw,size=256M \
318 -object memory-backend-ram,id=vmem0,share=on,size=256M \
328 -object memory-backend-ram,id=vmem0,share=on,size=256M \
329 -object memory-backend-file,id=cxl-lsa0,share=on,mem-path=/tmp/lsa.raw,size=256M \
341 -object memory-backend-file,id=cxl-mem1,share=on,mem-path=/tmp/cxltest.raw,size=256M \
342 -object memory-backend-file,id=cxl-mem2,share=on,mem-path=/tmp/cxltest2.raw,size=256M \
343 -object memory-backend-file,id=cxl-mem3,share=on,mem-path=/tmp/cxltest3.raw,size=256M \
344 -object memory-backend-file,id=cxl-mem4,share=on,mem-path=/tmp/cxltest4.raw,size=256M \
345 -object memory-backend-file,id=cxl-lsa1,share=on,mem-path=/tmp/lsa.raw,size=256M \
[all …]
/qemu/tests/tcg/s390x/
H A Dmvc-smc.c41 while (n >= 256) { in memcpy_mvc()
42 asm("mvc 0(256,%[dest]),0(%[src])" in memcpy_mvc()
47 dest += 256; in memcpy_mvc()
48 src += 256; in memcpy_mvc()
49 n -= 256; in memcpy_mvc()
/qemu/include/crypto/
H A Daes.h30 extern const uint8_t AES_sbox[256];
31 extern const uint8_t AES_isbox[256];
38 extern const uint32_t AES_Te0[256], AES_Td0[256];
/qemu/tests/tcg/hexagon/
H A Dhvx_histogram.c34 static int result[256] __attribute__((aligned(128)));
35 static int expect[256] __attribute__((aligned(128)));
39 for (int i = 0; i < 256; i++) { in check()
53 for (int i = 0; i < 256; i++) { in ref_histogram()
69 for (int i = 0; i < 256; i++) { in hvx_histogram()
/qemu/
H A Dqemu.sasl22 # 'scram-sha-256' plugin allows plain username/password authentication
25 #mech_list: scram-sha-256
30 #mech_list: scram-sha-256 gssapi
37 # If using scram-sha-256 for username/passwds, then this is the file
/qemu/hw/xen/
H A Dxen_devconfig.c51 char fe[256], be[256]; in xen_config_dev_vfb()
64 char fe[256], be[256]; in xen_config_dev_vkbd()
/qemu/include/hw/intc/
H A Dloongarch_extioi_common.h15 #define EXTIOI_IRQS (256)
16 #define EXTIOI_IRQS_BITMAP_SIZE (256 / 8)
20 #define EXTIOI_IRQS_IPMAP_SIZE (256 / 32)
21 #define EXTIOI_IRQS_COREMAP_SIZE 256
/qemu/hw/audio/
H A Dgusemu_mixer.c90 sample1 = (*adr & 0xff) + (*(adr + 1) * 256); in gus_mixvoices()
91 sample2 = (*(adr + 2) & 0xff) + (*(adr + 2 + 1) * 256); in gus_mixvoices()
98 sample1 = (*adr) * 256; in gus_mixvoices()
99 sample2 = (*(adr + 1)) * 256; in gus_mixvoices()
102 …Volume = ((((Volume32 >> (4 + 5)) & 0xff) + 256) << (Volume32 >> ((4 + 8) + 5))) / 512; /* semi-lo… in gus_mixvoices()
196 … newtimerirqs = (elapsed_time + timer1fraction) / (80 * (256 - GUSregb(GUS46Counter1))); in gus_irqgen()
197 … state->timer1fraction = (elapsed_time + timer1fraction) % (80 * (256 - GUSregb(GUS46Counter1))); in gus_irqgen()
215 … newtimerirqs = (elapsed_time + timer2fraction) / (320 * (256 - GUSregb(GUS47Counter2))); in gus_irqgen()
216 … state->timer2fraction = (elapsed_time + timer2fraction) % (320 * (256 - GUSregb(GUS47Counter2))); in gus_irqgen()
/qemu/qapi/
H A Dcrypto.json51 # @sha256: SHA-256. Current recommended strong hash.
75 # @aes-256: AES with 256 bit / 32 byte keys
88 # @serpent-256: Serpent with 256 bit / 32 byte keys
94 # @twofish-256: Twofish with 256 bit / 32 byte keys
101 'data': ['aes-128', 'aes-192', 'aes-256',
104 'serpent-128', 'serpent-192', 'serpent-256',
105 'twofish-128', 'twofish-192', 'twofish-256',
207 # defaults to 'aes-256'.
/qemu/include/hw/arm/
H A Dfsl-imx25.h78 * 0x1000_0000 0x1FFF_FFFF 256 Mbytes Reserved
79 * 0x2000_0000 0x2FFF_FFFF 256 Mbytes Reserved
80 * 0x3000_0000 0x3FFF_FFFF 256 Mbytes Reserved
105 * 0x43FC_0000 0x43FF_FFFF 256 Kbytes Reserved AIPS A off-platform slots
122 * 0x5004_0000 0x51FF_FFFF 32 Mbytes (minus 256 Kbytes)
164 * 0x8000_0000 0x8FFF_FFFF 256 Mbytes SDRAM bank 0
165 * 0x9000_0000 0x9FFF_FFFF 256 Mbytes SDRAM bank 1
/qemu/hw/display/
H A Dvga_int.h80 uint8_t sr[256];
81 uint8_t sr_vbe[256];
83 uint8_t gr[256];
88 uint8_t cr[256]; /* CRT registers */
147 uint32_t last_palette[256];
H A Dcg3.c83 uint8_t r[256], g[256], b[256];
355 memset(s->r, 0, 256); in cg3_reset()
356 memset(s->g, 0, 256); in cg3_reset()
357 memset(s->b, 0, 256); in cg3_reset()
/qemu/tests/bench/
H A Dbenchmark-crypto-cipher.c193 ADD_TEST(ecb, aes, 256, chunk); \ in main()
195 ADD_TEST(cbc, aes, 256, chunk); \ in main()
197 ADD_TEST(ctr, aes, 256, chunk); \ in main()
199 ADD_TEST(xts, aes, 256, chunk); \ in main()
/qemu/tests/qtest/libqos/
H A Dmalloc-spapr.c13 /* Memory must be a multiple of 256 MB,
14 * so we have at least 256MB

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