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/qemu/target/mips/tcg/
H A Dmsa_helper.c33 #define DF_BITS(df) (1 << ((df) + 3))
35 #define DF_MAX_INT(df) (int64_t)((1LL << (DF_BITS(df) - 1)) - 1)
36 #define M_MAX_INT(m) (int64_t)((1LL << ((m) - 1)) - 1)
38 #define DF_MIN_INT(df) (int64_t)(-(1LL << (DF_BITS(df) - 1)))
39 #define M_MIN_INT(m) (int64_t)(-(1LL << ((m) - 1)))
41 #define DF_MAX_UINT(df) (uint64_t)(-1ULL >> (64 - DF_BITS(df)))
42 #define M_MAX_UINT(m) (uint64_t)(-1ULL >> (64 - (m)))
58 * | NLOC.B | Vector Leading Ones Count (byte) |
62 * | NLZC.B | Vector Leading Zeros Count (byte) |
66 * | PCNT.B | Vector Population Count (byte) |
[all …]
/qemu/target/loongarch/
H A Dvec.h12 #define B(x) B[(x) ^ 15] macro
15 #define D(x) D[(x) ^ 1]
19 #define UD(x) UD[(x) ^ 1]
22 #define B(x) B[x] macro
33 #define DO_ADD(a, b) (a + b) argument
34 #define DO_SUB(a, b) (a - b) argument
35 #define DO_VAVG(a, b) ((a >> 1) + (b >> 1) + (a & b & 1)) argument
36 #define DO_VAVGR(a, b) ((a >> 1) + (b >> 1) + ((a | b) & 1)) argument
37 #define DO_VABSD(a, b) ((a > b) ? (a -b) : (b-a)) argument
39 #define DO_MIN(a, b) (a < b ? a : b) argument
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/qemu/target/openrisc/
H A Ddisas.c43 return -1; in print_insn_or1k()
60 INSN(add, "r%d, r%d, r%d", a->d, a->a, a->b)
61 INSN(addc, "r%d, r%d, r%d", a->d, a->a, a->b)
62 INSN(sub, "r%d, r%d, r%d", a->d, a->a, a->b)
63 INSN(and, "r%d, r%d, r%d", a->d, a->a, a->b)
64 INSN(or, "r%d, r%d, r%d", a->d, a->a, a->b)
65 INSN(xor, "r%d, r%d, r%d", a->d, a->a, a->b)
66 INSN(sll, "r%d, r%d, r%d", a->d, a->a, a->b)
67 INSN(srl, "r%d, r%d, r%d", a->d, a->a, a->b)
68 INSN(sra, "r%d, r%d, r%d", a->d, a->a, a->b)
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/qemu/target/arm/tcg/
H A Darith_helper.c24 static inline uint16_t add16_sat(uint16_t a, uint16_t b) in add16_sat() argument
28 res = a + b; in add16_sat()
29 if (((res ^ a) & 0x8000) && !((a ^ b) & 0x8000)) { in add16_sat()
40 static inline uint8_t add8_sat(uint8_t a, uint8_t b) in add8_sat() argument
44 res = a + b; in add8_sat()
45 if (((res ^ a) & 0x80) && !((a ^ b) & 0x80)) { in add8_sat()
56 static inline uint16_t sub16_sat(uint16_t a, uint16_t b) in sub16_sat() argument
60 res = a - b; in sub16_sat()
61 if (((res ^ a) & 0x8000) && ((a ^ b) & 0x8000)) { in sub16_sat()
72 static inline uint8_t sub8_sat(uint8_t a, uint8_t b) in sub8_sat() argument
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H A Dgengvec.c44 tcg_debug_assert(vece >= 1 && vece <= 2); in gen_gvec_sqdmulh_qc()
45 gen_gvec_fn3_qc(rd_ofs, rn_ofs, rm_ofs, opr_sz, max_sz, fns[vece - 1]); in gen_gvec_sqdmulh_qc()
54 tcg_debug_assert(vece >= 1 && vece <= 2); in gen_gvec_sqrdmulh_qc()
55 gen_gvec_fn3_qc(rd_ofs, rn_ofs, rm_ofs, opr_sz, max_sz, fns[vece - 1]); in gen_gvec_sqrdmulh_qc()
64 tcg_debug_assert(vece >= 1 && vece <= 2); in gen_gvec_sqrdmlah_qc()
65 gen_gvec_fn3_qc(rd_ofs, rn_ofs, rm_ofs, opr_sz, max_sz, fns[vece - 1]); in gen_gvec_sqrdmlah_qc()
74 tcg_debug_assert(vece >= 1 && vece <= 2); in gen_gvec_sqrdmlsh_qc()
75 gen_gvec_fn3_qc(rd_ofs, rn_ofs, rm_ofs, opr_sz, max_sz, fns[vece - 1]); in gen_gvec_sqrdmlsh_qc()
95 shift = MIN(shift, (8 << vece) - 1); in GEN_CMP0()
174 /* tszimm encoding produces immediates in the range [1..esize]. */ in gen_gvec_ssra()
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H A Dop_addsub.c.inc23 uint32_t HELPER(glue(PFX,add16))(uint32_t a, uint32_t b GE_ARG)
28 ADD16(a, b, 0);
29 ADD16(a >> 16, b >> 16, 1);
34 uint32_t HELPER(glue(PFX,add8))(uint32_t a, uint32_t b GE_ARG)
39 ADD8(a, b, 0);
40 ADD8(a >> 8, b >> 8, 1);
41 ADD8(a >> 16, b >> 16, 2);
42 ADD8(a >> 24, b >> 24, 3);
47 uint32_t HELPER(glue(PFX,sub16))(uint32_t a, uint32_t b GE_ARG)
52 SUB16(a, b, 0);
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/qemu/target/hexagon/
H A Dfma_emu.c50 return mant | 1ULL << 52; in float64_getmant()
68 return exp + 1; in float64_getexp()
70 return -1; in float64_getexp()
80 return exp + 1; in float32_getexp()
82 return -1; in float32_getexp()
93 static Int128 int128_sub_borrow(Int128 a, Int128 b, int borrow) in int128_sub_borrow() argument
95 Int128 ret = int128_sub(a, b); in int128_sub_borrow()
124 a.mant = int128_lshift(a.mant, 1); in accum_norm_left()
145 a.guard = (int128_getlo(a.mant) >> 63) & 1; in accum_norm_right()
146 a.round = (int128_getlo(a.mant) >> 62) & 1; in accum_norm_right()
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/qemu/target/ppc/
H A Dint_helper.c41 env->so = env->ov = env->ov32 = 1; in helper_update_ov_legacy()
57 overflow = 1; in helper_DIVWEU()
84 ((divisor == -1ull) && (dividend == INT64_MIN)))) { in helper_DIVWE()
85 overflow = 1; in helper_DIVWE()
110 overflow = 1; in helper_DIVDEU()
131 overflow = 1; in helper_DIVDE()
152 * subtract 1 from each byte, and with inverse, check if MSB is set at each
183 return -1; in helper_DARN32()
198 return -1; in helper_DARN64()
213 ra |= 1 << i; in helper_BPERMD()
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H A Ddfp_helper.c34 dst->VsrD(1) = dfp->VsrD(0); in get_dfp64()
40 dst->VsrD(1) = dfp[1].VsrD(0); in get_dfp128()
45 dfp[0].VsrD(0) = src->VsrD(1); in set_dfp64()
46 dfp[0].VsrD(1) = 0ULL; in set_dfp64()
52 dfp[1].VsrD(0) = src->VsrD(1); in set_dfp128()
53 dfp[0].VsrD(1) = 0ULL; in set_dfp128()
54 dfp[1].VsrD(1) = 0ULL; in set_dfp128()
65 decNumber t, a, b; member
78 case 1: in dfp_prepare_rounding_mode()
115 case 1: in dfp_set_round_mode_from_immediate()
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/qemu/tests/tcg/arm/system/
H A Dtest-armv6m-undef.S17 * terminate with exit code 0 on success or 1 on failure.
42 .word exc_reset_thumb /* 1. Reset */
58 .equ exc_reset_thumb, exc_reset + 1
68 b not_reached
71 b not_reached
74 b not_reached
77 b not_reached
80 b not_reached
85 b not_reached
93 b 1f
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/qemu/tests/tcg/openrisc/
H A Dtest_logic.c5 int a, b, c; in main() local
8 b = 0x9743; in main()
12 ("l.sll %0, %1, %2\n\t" in main()
14 : "r"(b), "r"(c) in main()
18 return -1; in main()
21 b = 0x9743; in main()
24 ("l.slli %0, %1, 0x2\n\t" in main()
26 : "r"(b) in main()
30 return -1; in main()
33 b = 0x7654; in main()
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H A Dtest_lf_lts.c6 float b, c, d; in main() local
10 b = 124.5; in main()
12 result = 1; in main()
16 "lf.sflt.s %1, %2\n\t" in main()
20 : "r"(b), "r"(c) in main()
24 return -1; in main()
28 b = 11.1; in main()
33 ("1:\n\t" in main()
34 "lf.add.s %1, %1, %3\n\t" in main()
35 "l.addi %0, %0, 1\n\t" in main()
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H A Dtest_extx.c5 int a, b; in main() local
8 b = 0x83; in main()
11 ("l.extbs %0, %1\n\t" in main()
13 : "r"(b) in main()
17 return -1; in main()
22 ("l.extbz %0, %1\n\t" in main()
24 : "r"(b) in main()
28 return -1; in main()
31 b = 0x8083; in main()
34 ("l.exths %0, %1\n\t" in main()
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H A Dtest_fx.c5 int a, b; in main() local
8 b = 0x123; in main()
9 result = 1; in main()
11 ("l.ff1 %0, %1\n\t" in main()
13 : "r"(b) in main()
17 return -1; in main()
20 b = 0x0; in main()
23 ("l.ff1 %0, %1\n\t" in main()
25 : "r"(b) in main()
29 return -1; in main()
[all …]
/qemu/tests/tcg/multiarch/
H A Dsha1.c6 SHA-1 in C
10 Test Vectors (from FIPS PUB 180-1)
14 84983E44 1C3BD26E BAAE4AA1 F95129E5 E54670F1
30 SHA-1 in C
60 ^block->l[(i+2)&15]^block->l[i&15],1))
74 uint32_t a, b, c, d, e; in SHA1Transform() local
80 CHAR64LONG16 block[1]; /* use array to appear as a pointer */ in SHA1Transform()
92 b = state[1]; in SHA1Transform()
97 R0(a,b,c,d,e, 0); R0(e,a,b,c,d, 1); R0(d,e,a,b,c, 2); R0(c,d,e,a,b, 3); in SHA1Transform()
98 R0(b,c,d,e,a, 4); R0(a,b,c,d,e, 5); R0(e,a,b,c,d, 6); R0(d,e,a,b,c, 7); in SHA1Transform()
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/qemu/tests/tcg/s390x/
H A Dadd-logical-with-carry.c23 { "cc0->cc1", {0, 0, 42}, 42, 1, },
27 { "cc1->cc1", {-3, 1, 1}, -1, 1, },
28 { "cc1->cc2", {-3, 1, 2}, 0, 2, },
29 { "cc1->cc3", {-3, 1, -1}, -3, 3, },
31 { "cc2->cc1", {-1, 1, 1}, 2, 1, },
32 { "cc2->cc2", {-1, 1, -1}, 0, 2, },
35 { "cc3->cc1", {-1, 2, 1}, 3, 1, },
36 { "cc3->cc2", {-1, 2, -2}, 0, 2, },
37 { "cc3->cc3", {-1, 2, -1}, 1, 3, },
41 static unsigned long test32rm(unsigned long a, unsigned long b, in test32rm() argument
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/qemu/hw/scsi/
H A Dmptconfig.c58 case 'b': in vfill()
71 case 'b': in vfill()
147 mptsas_config_pack(data, "b*bbb" fmt, version, number, type, \
161 stb_p(*data + 1, ret / 4); in mptsas_config_pack()
167 mptsas_config_pack_ext(data, "b*bbb*wb*b" fmt, version, number, \
204 return MPTSAS_CONFIG_PACK(1, MPI_CONFIG_PAGETYPE_MANUFACTURING, 0x00, in mptsas_config_manufacturing_1()
213 "wb*b*l", in mptsas_config_manufacturing_2()
222 "wb*b*l", in mptsas_config_manufacturing_3()
231 "*l*b*b*b*b*b*b*w*s56*l*l*l*l*l*l" in mptsas_config_manufacturing_4()
232 "*b*b*w*b*b*w*l*l"); in mptsas_config_manufacturing_4()
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/qemu/tests/tcg/xtensa/
H A Dmacros.inc27 1:
31 addi a2, a2, -1
32 bnez a2, 1b
45 movi a4, 97b
46 movi a5, 98b
73 movi a2, 1
80 movi a3, 1
89 b\cond \arg1, \arg2, 90f
105 1: .word 0
107 movi a4, 1b
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H A Dtest_mac16.S8 #define mul16(a, b) ((ext16(a) * ext16(b))) argument
29 .macro test_mulxx mulop, comb, s, t, a, b argument
31 init_reg \comb & 1, \t, \b
34 assert_acc_value mul16(\a, \b)
37 assert_acc_value mul16(\a, (\b >> 16))
40 assert_acc_value mul16((\a >> 16), \b)
43 assert_acc_value mul16((\a >> 16), (\b >> 16))
51 test_mulxx mul.ad, 1, a2, m2, 0xf7315a5a, 0xa5a5137f
70 .macro test_mulxxx mulop, comb, s, t, a, b, iv, op
72 init_reg \comb & 1, \t, \b
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H A Dtest_load_store.S8 1:
14 movi a3, 1b
15 addi a4, a4, 1
27 1:
37 movi a3, 1b
38 addi a4, a4, 1
40 1:
52 movi a7, 1b
64 1:
70 movi a3, 1b + 1
[all …]
/qemu/hw/uefi/
H A Dvar-service-utils.c66 const uint16_t *b, size_t blen, in uefi_str_equal_ex() argument
77 if (pos == alen && b[pos] == 0) { in uefi_str_equal_ex()
86 if (a[pos] == 0 && b[pos] == 0) { in uefi_str_equal_ex()
91 if (!isxdigit(b[pos])) { in uefi_str_equal_ex()
95 if (a[pos] != b[pos]) { in uefi_str_equal_ex()
104 const uint16_t *b, size_t blen) in uefi_str_equal() argument
106 return uefi_str_equal_ex(a, alen, b, blen, false); in uefi_str_equal()
111 char *str = g_malloc0(ucs2_size / 2 + 1); in uefi_ucs2_to_ascii()
131 int uefi_time_compare(efi_time *a, efi_time *b) in uefi_time_compare() argument
133 if (a->year < b->year) { in uefi_time_compare()
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/qemu/target/i386/
H A Dops_sse.h28 #define B(n) MMX_B(n) macro
36 #define B(n) ZMM_B(n) macro
40 #if SHIFT == 1
61 for (int i = 0; i < 1 << SHIFT; i++) { in glue()
65 shift = c->B(0); in glue()
76 for (int i = 0; i < 1 << SHIFT; i++) { in glue()
80 shift = c->B(0); in glue()
93 shift = c->B(0); in glue()
104 for (int i = 0; i < 1 << SHIFT; i++) { in glue()
108 shift = c->B(0); in glue()
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/qemu/tests/qemu-iotests/
H A D172.out24 logical_block_size = 512 (512 B)
25 physical_block_size = 512 (512 B)
26 min_io_size = 0 (0 B)
27 opt_io_size = 0 (0 B)
53 logical_block_size = 512 (512 B)
54 physical_block_size = 512 (512 B)
55 min_io_size = 0 (0 B)
56 opt_io_size = 0 (0 B)
86 unit = 1 (0x1)
89 logical_block_size = 512 (512 B)
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/qemu/tests/tcg/i386/
H A Dtest-i386-fprem.c41 unsigned int one:1;
43 unsigned int negative:1;
50 unsigned int quiet_nan:1;
51 unsigned int one:1;
53 unsigned int negative:1;
63 .ieee_nan.one = 1,
64 .ieee_nan.quiet_nan = 1,
71 .ieee_nan.one = 1,
73 .ieee_nan.mantissa = 1, /* nonzero */
79 .ieee.one = 1,
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/qemu/chardev/
H A Dchar-fe.c73 if (res == -1 && errno == EAGAIN) { in qemu_chr_fe_read_all()
116 int res = (qemu_chr_fe_get_msgfds(be, &fd, 1) == 1) ? fd : -1; in qemu_chr_fe_get_msgfd()
120 exit(1); in qemu_chr_fe_get_msgfd()
130 return -1; in qemu_chr_fe_get_msgfds()
134 CHARDEV_GET_CLASS(s)->get_msgfds(s, fds, len) : -1; in qemu_chr_fe_get_msgfds()
142 return -1; in qemu_chr_fe_set_msgfds()
146 CHARDEV_GET_CLASS(s)->set_msgfds(s, fds, num) : -1; in qemu_chr_fe_set_msgfds()
192 bool qemu_chr_fe_init(CharBackend *b, Chardev *s, Error **errp) in qemu_chr_fe_init() argument
200 if (!mux_chr_attach_frontend(d, b, &tag, errp)) { in qemu_chr_fe_init()
207 s->be = b; in qemu_chr_fe_init()
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