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/qemu/docs/system/ppc/
H A Dpowernv.rst4 PowerNV (as Non-Virtualized) is the "bare metal" platform using the
16 -----------------
24 * Simple OCC is an on-chip micro-controller used for power management tasks.
30 ---------------
44 --------
49 GitHub <https://github.com/open-power>`_.
52 `OpenPOWER <https://github.com/open-power/op-build/releases/>`__ site.
58 ---------------------------
60 KVM acceleration in Linux Power hosts is provided by the kvm-hv and
61 kvm-pr modules. kvm-hv is adherent to PAPR and it's not compliant with
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/qemu/pc-bios/s390-ccw/
H A Dbootmap.c7 * your option) any later version. See the COPYING file in the top-level
13 #include "s390-ccw.h"
14 #include "s390-arch.h"
49 return !memcmp(&vd->ident[0], vol_desc_magic, 5) && in is_iso_vd_valid()
50 vd->version == 0x1 && in is_iso_vd_valid()
51 vd->type <= VOL_DESC_TYPE_PARTITION; in is_iso_vd_valid()
67 if (!magic_match(bip->magic, ZIPL_MAGIC)) { in verify_boot_info()
69 return -EINVAL; in verify_boot_info()
71 if (bip->version != BOOT_INFO_VERSION) { in verify_boot_info()
73 return -EINVAL; in verify_boot_info()
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/qemu/qapi/
H A Dnet.json1 # -*- Mode: Python -*-
21 # - If @name is not a valid network device, DeviceNotFound
29 # .. qmp-example::
31 # -> { "execute": "set_link",
33 # <- { "return": {} }
47 # - If @type is not a valid network backend, DeviceNotFound
49 # .. qmp-example::
51 # -> { "execute": "netdev_add",
54 # <- { "return": {} }
57 'allow-preconfig': true }
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/qemu/target/ppc/
H A Dinsn64.decode2 # Power ISA decode for 64-bit prefixed insns (opcode space 0 and 1)
4 # Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br)
23 @PLS_D ...... .. ... r:1 .. .................. \
26 @8LS_D_TSX ...... .. . .. r:1 .. .................. \
30 %rt_tsxp 21:1 22:4 !function=times_2
31 @8LS_D_TSXP ...... .. . .. r:1 .. .................. \
35 @8LS_D ...... .. . .. r:1 .. .................. \
41 %8rr_xt 16:1 21:5
44 ...... ..... ... ix:1 . ................ \
52 %8rr_xx_xt 0:1 21:5
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/qemu/target/xtensa/
H A Dcpu.h31 #include "cpu-qom.h"
32 #include "qemu/cpu-float.h"
33 #include "exec/cpu-common.h"
34 #include "exec/cpu-defs.h"
35 #include "exec/cpu-interrupt.h"
37 #include "xtensa-isa.h"
113 LEND = 1,
116 BR = 4, enumerator
220 ((MAX_INSN_LENGTH + sizeof(xtensa_insnbuf_word) - 1) / \
227 #define MAX_NNMI 1
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H A Dtranslate.c3 * http://www.tensilica.com/products/literature-docs/documentation/xtensa-isa-databook.htm
34 #include "tcg/tcg-op.h"
36 #include "qemu/qemu-print.h"
38 #include "exec/translation-block.h"
40 #include "exec/helper-proto.h"
41 #include "exec/helper-gen.h"
48 #include "exec/helper-info.c.inc"
101 xtensa_isa isa = config->isa; in xtensa_collect_sr_names()
189 sregs[BR]), in xtensa_translate_init()
194 sregs[BR]), in xtensa_translate_init()
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/qemu/include/standard-headers/drm/
H A Ddrm_fourcc.h38 * further describe the buffer's format - for example tiling or compression.
41 * ----------------
55 * vendor-namespaced, and as such the relationship between a fourcc code and a
57 * may preserve meaning - such as number of planes - from the fourcc code,
63 * a modifier: a buffer may match a 64-pixel aligned modifier and a 32-pixel
75 * - Kernel and user-space drivers: for drivers it's important that modifiers
79 * - Higher-level programs interfacing with KMS/GBM/EGL/Vulkan/etc: these users
92 * -----------------------
97 * upstream in-kernel or open source userspace user does not apply.
107 #define DRM_FORMAT_BIG_ENDIAN (1U<<31) /* format is big endian instead of little endian */
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/qemu/tcg/aarch64/
H A Dtcg-target.c.inc10 * See the COPYING file in the top-level directory for details.
28 /* We're going to re-use TCGType in setting of the SF bit, which controls
31 QEMU_BUILD_BUG_ON(TCG_TYPE_I32 != 0 || TCG_TYPE_I64 != 1);
67 /* V8 - V15 are call-saved, and skipped. */
82 tcg_debug_assert(slot >= 0 && slot <= 1);
96 ptrdiff_t offset = target - src_rx;
110 ptrdiff_t offset = target - src_rx;
122 ptrdiff_t offset = target - src_rx;
159 /* Match a constant valid for addition (12-bit, optionally shifted). */
171 0....01....1
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/qemu/hw/core/
H A Dloader.c24 * Gunzip functionality in this file is derived from u-boot:
28 * (C) Copyright 2000-2005
47 #include "qemu/error-report.h"
49 #include "qapi/qapi-commands-machine.h"
50 #include "qapi/type-helpers.h"
72 /* return the size or -1 if error */
79 return -1; in get_image_size()
85 /* return the size or -1 if error */
93 return -1; in load_image_size()
96 while ((actsize = read(fd, addr + l, size - l)) > 0) { in load_image_size()
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/qemu/disas/
H A Dmicroblaze.c105 …pbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16, wic, wdc, wdcclear, wdcflush, mts, mfs, br, brd, enumerator
138 /* mask is reg num - max_reg_num, ie reg_num - 32 in this case */
179 #define REG_ROSDP 2 /* read-only small data pointer */
180 #define REG_RWSDP 13 /* read-write small data pointer */
182 /* Assembler Register - Used in Delay Slot Optimization */
206 #endif /* MICROBLAZE-OPCM */
209 #define INST_TYPE_RD_R1_IMM 1
218 #define INST_TYPE_SPECIAL_R1 10
232 // new insn type for tuqula rd - addik rd, r0, 42
242 #define INST_PC_OFFSET 1 /* instructions where the label address is resolved as a PC offset (for br…
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/qemu/target/xtensa/core-dsp3400/
H A Dgdb-config.c.inc3 Copyright (c) 2003-2010 Tensilica Inc.
23 XTREG( 0, 0,32, 4, 4,0x0020,0x0006,-2, 9,0x0100,pc, 0,0,0,0,0,0)
24 XTREG( 1, 4,32, 4, 4,0x0100,0x0006,-2, 1,0x0002,ar0, 0,0,0,0,0,0)
25 XTREG( 2, 8,32, 4, 4,0x0101,0x0006,-2, 1,0x0002,ar1, 0,0,0,0,0,0)
26 XTREG( 3, 12,32, 4, 4,0x0102,0x0006,-2, 1,0x0002,ar2, 0,0,0,0,0,0)
27 XTREG( 4, 16,32, 4, 4,0x0103,0x0006,-2, 1,0x0002,ar3, 0,0,0,0,0,0)
28 XTREG( 5, 20,32, 4, 4,0x0104,0x0006,-2, 1,0x0002,ar4, 0,0,0,0,0,0)
29 XTREG( 6, 24,32, 4, 4,0x0105,0x0006,-2, 1,0x0002,ar5, 0,0,0,0,0,0)
30 XTREG( 7, 28,32, 4, 4,0x0106,0x0006,-2, 1,0x0002,ar6, 0,0,0,0,0,0)
31 XTREG( 8, 32,32, 4, 4,0x0107,0x0006,-2, 1,0x0002,ar7, 0,0,0,0,0,0)
[all …]
/qemu/target/microblaze/
H A Dinsns.decode110 br 100110 ..... 00000 ..... 000 0000 0000 @typea_br
156 # operand which is unused. So allow the field to be non-zero but discard
157 # the value and treat as 2-operand insns.
158 flt 010110 ..... ..... ----- 0101 000 0000 @typea0
159 fint 010110 ..... ..... ----- 0110 000 0000 @typea0
188 mfs 100101 rd:5 0 e:1 000 10 rs:14
189 mts 100101 0 e:1 000 ra:5 11 rs:14
207 put 011011 00000 ra:5 1 ctrl:5 000000 imm:4
208 putd 010011 00000 ra:5 rb:5 1 ctrl:5 00000
252 wdic 100100 00000 ----- ----- -00 -11- 01-0 # wdc
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/qemu/hw/pci/
H A Dpcie.c41 PCIE_DPRINTF("%s:%x "fmt, (dev)->name, (dev)->devfn, ## __VA_ARGS__)
73 uint8_t *exp_cap = dev->config + dev->exp.exp_cap; in pcie_cap_v1_fill()
74 uint8_t *cmask = dev->cmask + dev->exp.exp_cap; in pcie_cap_v1_fill()
83 * table 7-12: in pcie_cap_v1_fill()
91 if (dev->cap_present & QEMU_PCIE_EXT_TAG) { in pcie_cap_v1_fill()
166 uint8_t *exp_cap = dev->config + dev->exp.exp_cap; in pcie_cap_fill_link_ep_usp()
184 uint8_t *exp_cap = dev->config + dev->exp.exp_cap; in pcie_cap_fill_slot_lnk()
196 if (s->width > QEMU_PCI_EXP_LNK_X1 || in pcie_cap_fill_slot_lnk()
197 s->speed > QEMU_PCI_EXP_LNK_2_5GT) { in pcie_cap_fill_slot_lnk()
202 if (s->speed > QEMU_PCI_EXP_LNK_2_5GT) { in pcie_cap_fill_slot_lnk()
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/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dgdb-config.c.inc3 Copyright (c) 2003-2019 Tensilica Inc.
23 XTREG( 0, 0,32, 4, 4,0x0020,0x0006,-2, 9,0x0100,pc, 0,0,0,0,0,0)
24 XTREG( 1, 4,32, 4, 4,0x0100,0x0006,-2, 1,0x0002,ar0, 0,0,0,0,0,0)
25 XTREG( 2, 8,32, 4, 4,0x0101,0x0006,-2, 1,0x0002,ar1, 0,0,0,0,0,0)
26 XTREG( 3, 12,32, 4, 4,0x0102,0x0006,-2, 1,0x0002,ar2, 0,0,0,0,0,0)
27 XTREG( 4, 16,32, 4, 4,0x0103,0x0006,-2, 1,0x0002,ar3, 0,0,0,0,0,0)
28 XTREG( 5, 20,32, 4, 4,0x0104,0x0006,-2, 1,0x0002,ar4, 0,0,0,0,0,0)
29 XTREG( 6, 24,32, 4, 4,0x0105,0x0006,-2, 1,0x0002,ar5, 0,0,0,0,0,0)
30 XTREG( 7, 28,32, 4, 4,0x0106,0x0006,-2, 1,0x0002,ar6, 0,0,0,0,0,0)
31 XTREG( 8, 32,32, 4, 4,0x0107,0x0006,-2, 1,0x0002,ar7, 0,0,0,0,0,0)
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/qemu/target/arm/tcg/
H A Da64.decode23 %esz_sd 22:1 !function=plus_2
24 %esz_hs 22:1 !function=plus_1
26 %hl 11:1 21:1
27 %hlm 11:1 20:2
48 @rr_h ........ ... ..... ...... rn:5 rd:5 &rr_e esz=1
56 @rrr_h ........ ... rm:5 ...... rn:5 rd:5 &rrr_e esz=1
64 @rrx_h ........ .. .. rm:4 .... . . rn:5 rd:5 &rrx_e esz=1 idx=%hlm
66 @rrx_d ........ .. . rm:5 .... idx:1 . rn:5 rd:5 &rrx_e esz=3
68 @rr_q1e0 ........ ........ ...... rn:5 rd:5 &qrr_e q=1 esz=0
69 @rr_q1e2 ........ ........ ...... rn:5 rd:5 &qrr_e q=1 esz=2
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/qemu/hw/scsi/
H A Dscsi-disk.c9 * 2009-Dec-12 Artyom Tarasenko : implemented stamdard inquiry for the case
12 * 2009-Oct-13 Artyom Tarasenko : implemented the block descriptor in the
25 #include "qemu/error-report.h"
26 #include "qemu/main-loop.h"
28 #include "qemu/hw-version.h"
31 #include "migration/qemu-file-types.h"
36 #include "system/block-backend.h"
39 #include "hw/qdev-properties.h"
40 #include "hw/qdev-properties-system.h"
57 #define DEFAULT_MAX_UNMAP_SIZE (1 * GiB)
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/qemu/hw/ssi/
H A Dxilinx_spips.c29 #include "hw/qdev-properties.h"
53 #define IFMODE (1U << 31)
54 #define R_CONFIG_ENDIAN (1 << 26)
55 #define MODEFAIL_GEN_EN (1 << 17)
56 #define MAN_START_COM (1 << 16)
57 #define MAN_START_EN (1 << 15)
58 #define MANUAL_CS (1 << 14)
59 #define CS (0xF << 10)
60 #define CS_SHIFT (10)
61 #define PERI_SEL (1 << 9)
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/qemu/target/xtensa/core-test_kc705_be/
H A Dgdb-config.c.inc3 Copyright (c) 2003-2015 Tensilica Inc.
23 XTREG( 0, 0,32, 4, 4,0x0020,0x0006,-2, 9,0x0100,pc, 0,0,0,0,0,0)
24 XTREG( 1, 4,32, 4, 4,0x0100,0x0006,-2, 1,0x0002,ar0, 0,0,0,0,0,0)
25 XTREG( 2, 8,32, 4, 4,0x0101,0x0006,-2, 1,0x0002,ar1, 0,0,0,0,0,0)
26 XTREG( 3, 12,32, 4, 4,0x0102,0x0006,-2, 1,0x0002,ar2, 0,0,0,0,0,0)
27 XTREG( 4, 16,32, 4, 4,0x0103,0x0006,-2, 1,0x0002,ar3, 0,0,0,0,0,0)
28 XTREG( 5, 20,32, 4, 4,0x0104,0x0006,-2, 1,0x0002,ar4, 0,0,0,0,0,0)
29 XTREG( 6, 24,32, 4, 4,0x0105,0x0006,-2, 1,0x0002,ar5, 0,0,0,0,0,0)
30 XTREG( 7, 28,32, 4, 4,0x0106,0x0006,-2, 1,0x0002,ar6, 0,0,0,0,0,0)
31 XTREG( 8, 32,32, 4, 4,0x0107,0x0006,-2, 1,0x0002,ar7, 0,0,0,0,0,0)
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/qemu/
H A Dqemu-options.hx14 "-h or -help display this help and exit\n", QEMU_ARCH_ALL)
16 ``-h``
21 "-version display version information and exit\n", QEMU_ARCH_ALL)
23 ``-version``
28 "-machine [type=]name[,prop[=value][,...]]\n"
29 " selects emulated machine ('-machine help' for list)\n"
33 " dump-guest-core=on|off include guest memory in a core dump (default=on)\n"
34 " mem-merge=on|off controls memory merge support (default: on)\n"
35 " aes-key-wrap=on|off controls support for AES key wrapping (default=on)\n"
36 " dea-key-wrap=on|off controls support for DEA key wrapping (default=on)\n"
[all …]
/qemu/target/xtensa/core-de233_fpu/
H A Dgdb-config.c.inc3 Copyright (c) 2003-2020 Tensilica Inc.
23 XTREG( 0, 0,32, 4, 4,0x0020,0x0006,-2, 9,0x2100,pc, 0,0,0,0,0,0)
24 XTREG( 1, 4,32, 4, 4,0x0100,0x0006,-2, 1,0x0002,ar0, 0,0,0,0,0,0)
25 XTREG( 2, 8,32, 4, 4,0x0101,0x0006,-2, 1,0x0002,ar1, 0,0,0,0,0,0)
26 XTREG( 3, 12,32, 4, 4,0x0102,0x0006,-2, 1,0x0002,ar2, 0,0,0,0,0,0)
27 XTREG( 4, 16,32, 4, 4,0x0103,0x0006,-2, 1,0x0002,ar3, 0,0,0,0,0,0)
28 XTREG( 5, 20,32, 4, 4,0x0104,0x0006,-2, 1,0x0002,ar4, 0,0,0,0,0,0)
29 XTREG( 6, 24,32, 4, 4,0x0105,0x0006,-2, 1,0x0002,ar5, 0,0,0,0,0,0)
30 XTREG( 7, 28,32, 4, 4,0x0106,0x0006,-2, 1,0x0002,ar6, 0,0,0,0,0,0)
31 XTREG( 8, 32,32, 4, 4,0x0107,0x0006,-2, 1,0x0002,ar7, 0,0,0,0,0,0)
[all …]
H A Dxtensa-modules.c.inc1 /* Xtensa configuration-specific ISA information.
3 Copyright (c) 2003-2020 Tensilica Inc.
24 #include "xtensa-isa.h"
25 #include "xtensa-isa-internal.h"
32 { "LEND", 1, 0 },
34 { "BR", 4, 0 },
101 { "THREADPTR", 231, 1 },
102 { "FCR", 232, 1 },
103 { "FSR", 233, 1 },
104 { "EXPSTATE", 230, 1 }
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/qemu/hw/dma/
H A Domap_dma.c4 * Copyright (C) 2006-2008 Andrzej Zaborowski <balrog@zabor.org>
5 * Copyright (C) 2007-2008 Lauro Ramos Venancio <lauro.venancio@indt.org.br>
127 #define TIMEOUT_INTR (1 << 0)
128 #define EVENT_DROP_INTR (1 << 1)
129 #define HALF_FRAME_INTR (1 << 2)
130 #define END_FRAME_INTR (1 << 3)
131 #define LAST_FRAME_INTR (1 << 4)
132 #define END_BLOCK_INTR (1 << 5)
133 #define SYNC (1 << 6)
134 #define END_PKT_INTR (1 << 7)
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/qemu/pc-bios/keymaps/
H A Dpt-br2 # generated by qemu-keymap
4 # layout : br
5 # variant : -
6 # options : -
12 # 1: Lock
21 # 10: LevelThree
33 # evdev 1 (0x1), QKeyCode "esc", number 0x1
36 # evdev 2 (0x2), QKeyCode "1", number 0x2
37 1 0x02
84 # evdev 10 (0xa), QKeyCode "9", number 0xa
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/qemu/crypto/
H A Daes.c3 * aes.c - integrated in QEMU by Fabrice Bellard from the OpenSSL project.
6 * rijndael-alg-fst.c
14 * @author Paulo Barreto <paulo.barreto@terra.com.br>
34 #include "crypto/aes-round.h"
39 /* This controls loop-unrolling in aes_core.c */
41 # define GETU32(pt) (((u32)(pt)[0] << 24) ^ ((u32)(pt)[1] << 16) ^ ((u32)(pt)[2] << 8) ^ ((u32)(pt…
42 # define PUTU32(ct, st) { (ct)[0] = (u8)((st) >> 24); (ct)[1] = (u8)((st) >> 16); (ct)[2] = (u8)((s…
949 … 0x1B000000, 0x36000000, /* for 128-bit blocks, Rijndael never uses more than 10 rcon values */
963 /* Note that AES_mc_rot is encoded for little-endian. */ in aesenc_MC_swap()
964 t = ( AES_mc_rot[st->b[swap_b ^ 0x0]] ^ in aesenc_MC_swap()
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/qemu/pc-bios/
HDu-boot.e500 ... --------------------- ...

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