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/linux-6.15/kernel/locking/
Dlockdep_proc.c153 int i; in lc_show() local
171 for (i = 0; i < chain->depth; i++) { in lc_show()
172 class = lock_chain_get_class(chain, i); in lc_show()
205 seq_printf(m, " chain lookup misses: %11llu\n", in lockdep_stats_debug_show()
207 seq_printf(m, " chain lookup hits: %11llu\n", in lockdep_stats_debug_show()
209 seq_printf(m, " cyclic checks: %11llu\n", in lockdep_stats_debug_show()
211 seq_printf(m, " redundant checks: %11llu\n", in lockdep_stats_debug_show()
213 seq_printf(m, " redundant links: %11llu\n", in lockdep_stats_debug_show()
215 seq_printf(m, " find-mask forwards checks: %11llu\n", in lockdep_stats_debug_show()
217 seq_printf(m, " find-mask backwards checks: %11llu\n", in lockdep_stats_debug_show()
[all …]
/linux-6.15/crypto/
Dblake2b_generic.c26 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
27 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
28 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
29 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
30 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
31 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
32 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
33 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
34 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
35 { 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 },
[all …]
/linux-6.15/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_init_ops.h54 u32 i; in bnx2x_init_str_wr() local
56 for (i = 0; i < len; i++) in bnx2x_init_str_wr()
57 REG_WR(bp, addr + i*4, data[i]); in bnx2x_init_str_wr()
63 u32 i; in bnx2x_init_ind_wr() local
65 for (i = 0; i < len; i++) in bnx2x_init_ind_wr()
66 bnx2x_reg_wr_ind(bp, addr + i*4, data[i]); in bnx2x_init_ind_wr()
89 u32 i; in bnx2x_init_fill() local
93 for (i = 0; i < len; i += buf_len32) { in bnx2x_init_fill()
94 u32 cur_len = min(buf_len32, len - i); in bnx2x_init_fill()
96 bnx2x_write_big_buf(bp, addr + i*4, cur_len, wb); in bnx2x_init_fill()
[all …]
/linux-6.15/arch/mips/include/asm/
Dunaligned-emul.h27 : "r" (addr), "i" (-EFAULT)); \
48 : "r" (addr), "i" (-EFAULT)); \
73 "11:\tli\t%1, %3\n\t" \
77 STR(PTR_WD)"\t1b, 11b\n\t" \
78 STR(PTR_WD)"\t2b, 11b\n\t" \
79 STR(PTR_WD)"\t3b, 11b\n\t" \
80 STR(PTR_WD)"\t4b, 11b\n\t" \
83 : "r" (addr), "i" (-EFAULT)); \
109 : "r" (addr), "i" (-EFAULT)); \
132 : "r" (addr), "i" (-EFAULT)); \
[all …]
/linux-6.15/drivers/comedi/drivers/ni_routing/ni_route_values/
Dni_660x.c49 [B(NI_CtrInternalOutput(7))] = I(1),
52 [B(NI_CtrGate(7))] = I(1),
54 [B(NI_PFI(11))] = {
55 [B(NI_CtrSource(7))] = I(1),
58 [B(NI_CtrInternalOutput(6))] = I(1),
61 [B(NI_CtrGate(6))] = I(1),
64 [B(NI_CtrSource(6))] = I(1),
67 [B(NI_CtrInternalOutput(5))] = I(1),
70 [B(NI_CtrGate(5))] = I(1),
73 [B(NI_CtrSource(5))] = I(1),
[all …]
Dni_mseries.c57 [B(TRIGGER_LINE(0))] = I(18),
58 [B(TRIGGER_LINE(1))] = I(19),
59 [B(TRIGGER_LINE(2))] = I(20),
60 [B(TRIGGER_LINE(3))] = I(21),
61 [B(TRIGGER_LINE(4))] = I(22),
62 [B(TRIGGER_LINE(5))] = I(23),
63 [B(TRIGGER_LINE(6))] = I(24),
64 [B(TRIGGER_LINE(7))] = I(25),
65 [B(NI_CtrSource(0))] = I(9),
66 [B(NI_CtrSource(1))] = I(4),
[all …]
Dni_eseries.c54 [B(NI_AI_StartTrigger)] = I(NI_PFI_OUTPUT_AI_START1),
57 [B(NI_AI_ReferenceTrigger)] = I(NI_PFI_OUTPUT_AI_START2),
60 [B(NI_AI_ConvertClock)] = I(NI_PFI_OUTPUT_AI_CONVERT),
63 [B(NI_CtrSource(1))] = I(NI_PFI_OUTPUT_G_SRC1),
66 [B(NI_CtrGate(1))] = I(NI_PFI_OUTPUT_G_GATE1),
69 [B(NI_AO_SampleClock)] = I(NI_PFI_OUTPUT_AO_UPDATE_N),
72 [B(NI_AO_StartTrigger)] = I(NI_PFI_OUTPUT_AO_START1),
75 [B(NI_AI_SampleClock)] = I(NI_PFI_OUTPUT_AI_START_PULSE),
78 [B(NI_CtrSource(0))] = I(NI_PFI_OUTPUT_G_SRC0),
81 [B(NI_CtrGate(0))] = I(NI_PFI_OUTPUT_G_GATE0),
[all …]
/linux-6.15/lib/crypto/
Dblake2s-generic.c20 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
21 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
22 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
23 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
24 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
25 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
26 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
27 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
28 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
29 { 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 },
[all …]
Dchacha.c18 int i; in chacha_permute() local
23 for (i = 0; i < nrounds; i += 2) { in chacha_permute()
32 x[11] += x[15]; x[7] = rol32(x[7] ^ x[11], 12); in chacha_permute()
42 x[11] += x[15]; x[7] = rol32(x[7] ^ x[11], 7); in chacha_permute()
50 x[11] += x[12]; x[6] = rol32(x[6] ^ x[11], 12); in chacha_permute()
60 x[11] += x[12]; x[6] = rol32(x[6] ^ x[11], 7); in chacha_permute()
79 int i; in chacha_block_generic() local
85 for (i = 0; i < ARRAY_SIZE(x); i++) in chacha_block_generic()
86 put_unaligned_le32(x[i] + state[i], &stream[i * sizeof(u32)]); in chacha_block_generic()
/linux-6.15/tools/testing/selftests/drivers/net/mlxsw/
Drif_mac_profiles_occ.sh46 for ((i = 1; i <= count; i++)); do
47 vlan=$(( i*10 ))
48 m=$(( i*11 ))
90 ip link set $h1.20 address 00:11:11:11:11:11
107 local i=$((count + 1))
108 local vlan=$(( i*10 ))
109 local m=11
120 m=$(( i*11 ))
/linux-6.15/drivers/gpu/drm/display/
Ddrm_dsc_helper.c101 int i; in drm_dsc_pps_payload_pack() local
147 /* PPS 10, 11 */ in drm_dsc_pps_payload_pack()
236 for (i = 0; i < DSC_NUM_BUF_RANGES - 1; i++) in drm_dsc_pps_payload_pack()
237 pps_payload->rc_buf_thresh[i] = in drm_dsc_pps_payload_pack()
238 dsc_cfg->rc_buf_thresh[i]; in drm_dsc_pps_payload_pack()
243 * are as follows: Min_qp[15:11], max_qp[10:6], offset[5:0] in drm_dsc_pps_payload_pack()
245 for (i = 0; i < DSC_NUM_BUF_RANGES; i++) { in drm_dsc_pps_payload_pack()
246 pps_payload->rc_range_parameters[i] = in drm_dsc_pps_payload_pack()
247 cpu_to_be16((dsc_cfg->rc_range_params[i].range_min_qp << in drm_dsc_pps_payload_pack()
249 (dsc_cfg->rc_range_params[i].range_max_qp << in drm_dsc_pps_payload_pack()
[all …]
/linux-6.15/arch/x86/pci/
Dce4100.c114 DEFINE_REG(11, 0, 0x10, (256), reg_init, reg_read, reg_write)
115 DEFINE_REG(11, 0, 0x14, (256), reg_init, reg_read, reg_write)
116 DEFINE_REG(11, 1, 0x10, (256), reg_init, reg_read, reg_write)
117 DEFINE_REG(11, 2, 0x10, (256), reg_init, reg_read, reg_write)
118 DEFINE_REG(11, 2, 0x14, (256), reg_init, reg_read, reg_write)
119 DEFINE_REG(11, 2, 0x18, (256), reg_init, reg_read, reg_write)
120 DEFINE_REG(11, 3, 0x10, (256), reg_init, reg_read, reg_write)
121 DEFINE_REG(11, 3, 0x14, (256), reg_init, reg_read, reg_write)
122 DEFINE_REG(11, 4, 0x10, (256), reg_init, reg_read, reg_write)
123 DEFINE_REG(11, 5, 0x10, (64*KB), reg_init, reg_read, reg_write)
[all …]
/linux-6.15/drivers/staging/rtl8723bs/hal/
DHalHWImg8723B_RF.c215 u32 i = 0; in ODM_ReadAndConfig_MP_8723B_RadioA() local
219 for (i = 0; i < ArrayLen; i += 2) { in ODM_ReadAndConfig_MP_8723B_RadioA()
220 u32 v1 = Array[i]; in ODM_ReadAndConfig_MP_8723B_RadioA()
221 u32 v2 = Array[i+1]; in ODM_ReadAndConfig_MP_8723B_RadioA()
234 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_RadioA()
237 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_RadioA()
238 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_RadioA()
240 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_RadioA()
242 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_RadioA()
249 while (v1 < 0x40000000 && i < ArrayLen-2) in ODM_ReadAndConfig_MP_8723B_RadioA()
[all …]
/linux-6.15/drivers/staging/media/rkvdec/
Drkvdec-h264.c62 #define VIEW_ID(i) PS_FIELD(62 + ((i) * 10), 10) argument
63 #define NUM_ANCHOR_REFS_L(i) PS_FIELD(82 + ((i) * 11), 1) argument
64 #define ANCHOR_REF_L(i) PS_FIELD(83 + ((i) * 11), 10) argument
65 #define NUM_NON_ANCHOR_REFS_L(i) PS_FIELD(104 + ((i) * 11), 1) argument
66 #define NON_ANCHOR_REFS_L(i) PS_FIELD(105 + ((i) * 11), 10) argument
71 #define NUM_REF_IDX_L_DEFAULT_ACTIVE_MINUS1(i) PS_FIELD(143 + ((i) * 5), 5) argument
84 #define IS_LONG_TERM(i) PS_FIELD(216 + (i), 1) argument
86 #define DPB_OFFS(i, j) (288 + ((j) * 32 * 7) + ((i) * 7)) argument
87 #define DPB_INFO(i, j) PS_FIELD(DPB_OFFS(i, j), 5) argument
88 #define BOTTOM_FLAG(i, j) PS_FIELD(DPB_OFFS(i, j) + 5, 1) argument
[all …]
/linux-6.15/drivers/hwmon/
Dpc87360.c16 * PC87365 11 3 3 2 0xE5
17 * PC87366 11 3 3 3-4 0xE9
20 * the standard Super-I/O addresses is used (0x2E/0x2F or 0x4E/0x4F).
69 * Super-I/O registers and operations
295 u8 i; in pc87360_update_device() local
303 for (i = 0; i < data->fannr; i++) { in pc87360_update_device()
304 if (FAN_CONFIG_MONITOR(data->fan_conf, i)) { in pc87360_update_device()
305 data->fan_status[i] = in pc87360_update_device()
307 NO_BANK, PC87360_REG_FAN_STATUS(i)); in pc87360_update_device()
308 data->fan[i] = pc87360_read_value(data, LD_FAN, in pc87360_update_device()
[all …]
/linux-6.15/drivers/pmdomain/mediatek/
Dmtk-scpsys.c212 int i; in scpsys_clk_disable() local
214 for (i = max_num - 1; i >= 0; i--) in scpsys_clk_disable()
215 clk_disable_unprepare(clk[i]); in scpsys_clk_disable()
220 int i, ret = 0; in scpsys_clk_enable() local
222 for (i = 0; i < max_num && clk[i]; i++) { in scpsys_clk_enable()
223 ret = clk_prepare_enable(clk[i]); in scpsys_clk_enable()
225 scpsys_clk_disable(clk, i); in scpsys_clk_enable()
416 int i; in init_clks() local
418 for (i = CLK_NONE + 1; i < CLK_MAX; i++) in init_clks()
419 clk[i] = devm_clk_get(&pdev->dev, clk_names[i]); in init_clks()
[all …]
/linux-6.15/tools/testing/selftests/kvm/s390/
Dsync_regs_test.c32 " ahi 11,1\n" in guest_code()
52 int i; in compare_regs() local
54 for (i = 0; i < 16; i++) in compare_regs()
55 REG_COMPARE(gprs[i]); in compare_regs()
60 int i; in compare_sregs() local
62 for (i = 0; i < 16; i++) in compare_sregs()
63 REG_COMPARE32(acrs[i]); in compare_sregs()
65 for (i = 0; i < 16; i++) in compare_sregs()
66 REG_COMPARE(crs[i]); in compare_sregs()
150 run->s.regs.gprs[11] = 0xBAD1DEA; in test_set_and_verify_various_reg_values()
[all …]
/linux-6.15/drivers/media/pci/cobalt/
Dcobalt-cpld.c45 cobalt_info("\t\tRegister #11:\t0x%04x (0x001e)\n", in cpld_info_ver3()
134 { 10, 5, 2 }, { 11, 11, 1 }, { 12, 6, 2 },
136 { 20, 5, 4 }, { 22, 11, 2 }, { 24, 4, 6 },
139 { 44, 11, 4 }, { 48, 4, 12 }, { 50, 5, 10 },
141 { 64, 4, 16 }, { 66, 11, 6 }, { 70, 5, 14 },
143 { 88, 11, 8 }, { 90, 5, 18 }, { 96, 4, 24 },
145 { 108, 6, 18 }, { 110, 11, 10 }, { 112, 4, 28 },
147 { 130, 5, 26 }, { 132, 11, 12 }, { 136, 4, 34 },
149 { 152, 4, 38 }, { 154, 11, 14 }, { 156, 6, 26 },
151 { 170, 5, 34 }, { 176, 11, 16 }, { 180, 5, 36 },
[all …]
/linux-6.15/scripts/mod/
Dsumversion.c101 ROUND1(c, d, a, b, in[2], 11); in md4_transform()
105 ROUND1(c, d, a, b, in[6], 11); in md4_transform()
109 ROUND1(c, d, a, b, in[10], 11); in md4_transform()
110 ROUND1(b, c, d, a, in[11], 19); in md4_transform()
113 ROUND1(c, d, a, b, in[14], 11); in md4_transform()
130 ROUND2(c, d, a, b, in[11], 9); in md4_transform()
135 ROUND3(c, d, a, b, in[4], 11); in md4_transform()
139 ROUND3(c, d, a, b, in[6], 11); in md4_transform()
143 ROUND3(c, d, a, b, in[5], 11); in md4_transform()
146 ROUND3(d, a, b, c, in[11], 9); in md4_transform()
[all …]
/linux-6.15/drivers/net/ethernet/3com/
D3c574_cs.c22 I. Board Compatibility
39 RunnerWrCtrl. These are 11 bit down-counters that are preloaded with the
42 translation latency by buffering the I/O operations with an 8 word FIFO.
47 with *some* PCcard bridges) may be used instead of I/O operations.
126 /* Offsets from base I/O address. */
134 11 bits are the parameter, if applicable. */
136 TotalReset = 0<<11, SelectWindow = 1<<11, StartCoax = 2<<11,
137 RxDisable = 3<<11, RxEnable = 4<<11, RxReset = 5<<11, RxDiscard = 8<<11,
138 TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11,
139 FakeIntr = 12<<11, AckIntr = 13<<11, SetIntrEnb = 14<<11,
[all …]
D3c589_cs.c53 /* To minimize the size of the driver source I only define operating
58 /* Offsets from base I/O address. */
70 * 11 bits are the parameter, if applicable.
74 TotalReset = 0<<11,
75 SelectWindow = 1<<11,
76 StartCoax = 2<<11,
77 RxDisable = 3<<11,
78 RxEnable = 4<<11,
79 RxReset = 5<<11,
80 RxDiscard = 8<<11,
[all …]
D3c515.c19 2001/11/17 - Added ethtool support (jgarzik)
41 programmed-I/O for Vortex cards. Full-bus-master transfers are always
112 I. Board Compatibility
115 3Com's ISA bus adapter for Fast Ethernet. Due to the unique I/O port layout,
153 project names. I use these names to eliminate confusion -- 3Com product
173 11 bits are the parameter, if applicable.
174 Note that 11 parameters bits was fine for ethernet, but the new chips
179 TotalReset = 0 << 11, SelectWindow = 1 << 11, StartCoax = 2 << 11,
180 RxDisable = 3 << 11, RxEnable = 4 << 11, RxReset = 5 << 11,
181 UpStall = 6 << 11, UpUnstall = (6 << 11) + 1, DownStall = (6 << 11) + 2,
[all …]
/linux-6.15/Documentation/userspace-api/media/v4l/
Dpixfmt-sdr-pcu20be.rst15 number consist of two parts called In-phase and Quadrature (IQ). Both I
18 padded with 0. I value starts first and Q value starts at an offset
19 equalling half of the buffer size (i.e.) offset = buffersize/2. Out of
36 - I'\ :sub:`0[19:12]`
37 - I'\ :sub:`0[11:4]`
38 - I'\ :sub:`0[3:0]; B2[3:0]=pad`
41 - I'\ :sub:`1[19:12]`
42 - I'\ :sub:`1[11:4]`
43 - I'\ :sub:`1[3:0]; B2[3:0]=pad`
48 - Q'\ :sub:`0[11:4]`
[all …]
/linux-6.15/sound/firewire/oxfw/
Doxfw-spkr.c35 buf = kmalloc(11, GFP_KERNEL); in avc_audio_feature_mute()
60 err = fcp_avc_transaction(unit, buf, 11, buf, 11, 0x3fe); in avc_audio_feature_mute()
63 if (err < 11) { in avc_audio_feature_mute()
115 buf[11] = 0xff; in avc_audio_feature_volume()
118 buf[11] = *value; in avc_audio_feature_volume()
135 *value = (buf[10] << 8) | buf[11]; in avc_audio_feature_volume()
199 unsigned int i; in spkr_volume_get() local
201 for (i = 0; i < spkr->mixer_channels; ++i) in spkr_volume_get()
202 value->value.integer.value[channel_map[i]] = spkr->volume[i]; in spkr_volume_get()
212 unsigned int i, changed_channels; in spkr_volume_put() local
[all …]
/linux-6.15/drivers/staging/media/sunxi/sun6i-isp/
Dsun6i_isp_reg.h88 #define SUN6I_ISP_MODULE_EN_AF BIT(11)
133 #define SUN6I_ISP_AE_CFG_LOW_BRI_TH(v) ((v) & GENMASK(11, 0))
157 #define SUN6I_ISP_OB_SRC0_VALID_START_HORZ(v) ((v) & GENMASK(11, 0))
161 #define SUN6I_ISP_OB_SRC1_VALID_START_HORZ(v) ((v) & GENMASK(11, 0))
169 #define SUN6I_ISP_OB_SPRITE_START_HORZ(v) ((v) & GENMASK(11, 0))
184 #define SUN6I_ISP_BDNF_COEF_RB(i, v) (((v) << (4 * (i))) & \ argument
185 GENMASK(4 * (i) + 3, 4 * (i)))
188 #define SUN6I_ISP_BDNF_COEF_G(i, v) (((v) << (4 * (i))) & \ argument
189 GENMASK(4 * (i) + 3, 4 * (i)))
202 #define SUN6I_ISP_BAYER_GAIN0_R(v) ((v) & GENMASK(11, 0))
[all …]

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