| /linux-5.10/tools/perf/pmu-events/arch/x86/sandybridge/ |
| D | pipeline.json | 12 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
22 "Counter": "Fixed counter 1",
27 "CounterHTOff": "Fixed counter 1"
30 "Counter": "Fixed counter 1",
32 "AnyThread": "1",
36 "CounterHTOff": "Fixed counter 1"
40 "Counter": "0,1,2,3",
45 "CounterHTOff": "0,1,2,3,4,5,6,7"
48 … See the table of not supported store forwards in the Intel\u00ae 64 and IA-32 Architectures Opti…
50 "Counter": "0,1,2,3",
[all …]
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| D | cache.json | 4 "Counter": "0,1,2,3",
9 "CounterHTOff": "0,1,2,3,4,5,6,7"
13 "Counter": "0,1,2,3",
18 "CounterHTOff": "0,1,2,3,4,5,6,7"
22 "Counter": "0,1,2,3",
27 "CounterHTOff": "0,1,2,3,4,5,6,7"
31 "Counter": "0,1,2,3",
36 "CounterHTOff": "0,1,2,3,4,5,6,7"
40 "Counter": "0,1,2,3",
45 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
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| D | frontend.json | 4 "Counter": "0,1,2,3",
9 "CounterHTOff": "0,1,2,3"
13 "Counter": "0,1,2,3",
18 "CounterHTOff": "0,1,2,3,4,5,6,7"
22 "Counter": "0,1,2,3",
27 "CounterMask": "1",
28 "CounterHTOff": "0,1,2,3,4,5,6,7"
32 "Counter": "0,1,2,3",
37 "CounterHTOff": "0,1,2,3,4,5,6,7"
41 "Counter": "0,1,2,3",
[all …]
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| /linux-5.10/tools/perf/pmu-events/arch/x86/ivybridge/ |
| D | pipeline.json | 11 "Counter": "Fixed counter 1",
16 "CounterHTOff": "Fixed counter 1"
20 "Counter": "Fixed counter 1",
22 "AnyThread": "1",
26 "CounterHTOff": "Fixed counter 1"
39 "Counter": "0,1,2,3",
43 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
44 "CounterHTOff": "0,1,2,3,4,5,6,7"
49 "Counter": "0,1,2,3",
54 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
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| D | cache.json | 5 "Counter": "0,1,2,3",
10 "CounterHTOff": "0,1,2,3,4,5,6,7"
15 "Counter": "0,1,2,3",
20 "CounterHTOff": "0,1,2,3,4,5,6,7"
25 "Counter": "0,1,2,3",
30 "CounterHTOff": "0,1,2,3,4,5,6,7"
35 "Counter": "0,1,2,3",
40 "CounterHTOff": "0,1,2,3,4,5,6,7"
45 "Counter": "0,1,2,3",
50 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
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| /linux-5.10/tools/perf/pmu-events/arch/x86/ivytown/ |
| D | pipeline.json | 11 "Counter": "Fixed counter 1",
16 "CounterHTOff": "Fixed counter 1"
20 "Counter": "Fixed counter 1",
22 "AnyThread": "1",
26 "CounterHTOff": "Fixed counter 1"
39 "Counter": "0,1,2,3",
43 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
44 "CounterHTOff": "0,1,2,3,4,5,6,7"
49 "Counter": "0,1,2,3",
54 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
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| /linux-5.10/tools/perf/pmu-events/arch/x86/jaketown/ |
| D | pipeline.json | 3 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
4 "Counter": "Fixed counter 1",
9 "CounterHTOff": "Fixed counter 1"
22 "Counter": "Fixed counter 3",
27 "CounterHTOff": "Fixed counter 3"
31 "Counter": "0,1,2,3",
35 "BriefDescription": "Not taken macro-conditional branches.",
36 "CounterHTOff": "0,1,2,3,4,5,6,7"
40 "Counter": "0,1,2,3",
44 "BriefDescription": "Taken speculative and retired macro-conditional branches.",
[all …]
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| D | cache.json | 3 "PEBS": "1",
5 "Counter": "0,1,2,3",
10 "CounterHTOff": "0,1,2,3"
13 "PEBS": "1",
15 "Counter": "0,1,2,3",
20 "CounterHTOff": "0,1,2,3"
23 "PEBS": "1",
25 "Counter": "0,1,2,3",
30 "CounterHTOff": "0,1,2,3"
33 "PEBS": "1",
[all …]
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| D | frontend.json | 4 "Counter": "0,1,2,3",
9 "CounterHTOff": "0,1,2,3,4,5,6,7"
14 "Counter": "0,1,2,3",
19 "CounterHTOff": "0,1,2,3,4,5,6,7"
23 "Counter": "0,1,2,3",
28 "CounterHTOff": "0,1,2,3"
32 "Counter": "0,1,2,3",
37 "CounterHTOff": "0,1,2,3,4,5,6,7"
41 "Counter": "0,1,2,3",
46 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
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| /linux-5.10/arch/powerpc/lib/ |
| D | feature-fixups-test.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 #include <asm/feature-fixups.h>
9 #include <asm/asm-compat.h>
10 #include <asm/ppc-opcode.h>
19 or 1,1,1
21 or 3,3,3
26 or 1,1,1
28 or 3,3,3
31 or 1,1,1
33 or 3,3,3
[all …]
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| /linux-5.10/tools/perf/pmu-events/arch/x86/broadwellx/ |
| D | pipeline.json | 7 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
14 "Counter": "Fixed counter 1",
18 "CounterHTOff": "Fixed counter 1"
23 "Counter": "Fixed counter 1",
25 "AnyThread": "1",
27 "CounterHTOff": "Fixed counter 1"
34 …1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counte…
41 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
42 "Counter": "0,1,2,3",
44 …-on-Store blocking code preventing store forwarding. This includes cases when:\n - preceding store…
[all …]
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| /linux-5.10/tools/perf/pmu-events/arch/x86/haswellx/ |
| D | pipeline.json | 8 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
15 "Counter": "Fixed counter 1",
19 "CounterHTOff": "Fixed counter 1"
24 "Counter": "Fixed counter 1",
26 "AnyThread": "1",
28 "CounterHTOff": "Fixed counter 1"
43 "Counter": "0,1,2,3",
47 "CounterHTOff": "0,1,2,3,4,5,6,7"
53 "Counter": "0,1,2,3",
57 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
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| /linux-5.10/tools/perf/pmu-events/arch/x86/haswell/ |
| D | pipeline.json | 3 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
14 "Counter": "Fixed counter 1",
19 "CounterHTOff": "Fixed counter 1"
22 "Counter": "Fixed counter 1",
24 "AnyThread": "1",
28 "CounterHTOff": "Fixed counter 1"
42 "Counter": "0,1,2,3",
47 "CounterHTOff": "0,1,2,3,4,5,6,7"
52 "Counter": "0,1,2,3",
57 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
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| /linux-5.10/fs/exfat/ |
| D | balloc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd.
14 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2,/* 0 ~ 19*/
15 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2, 0, 1, 0, 3,/* 20 ~ 39*/
16 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/* 40 ~ 59*/
17 0, 1, 0, 6, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4,/* 60 ~ 79*/
18 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2,/* 80 ~ 99*/
19 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3,/*100 ~ 119*/
20 0, 1, 0, 2, 0, 1, 0, 7, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/*120 ~ 139*/
21 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5,/*140 ~ 159*/
[all …]
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| /linux-5.10/tools/perf/pmu-events/arch/x86/broadwell/ |
| D | pipeline.json | 3 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
13 "Counter": "Fixed counter 1",
18 "CounterHTOff": "Fixed counter 1"
21 "Counter": "Fixed counter 1",
23 "AnyThread": "1",
27 "CounterHTOff": "Fixed counter 1"
30 …1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counte…
39 …-on-Store blocking code preventing store forwarding. This includes cases when:\n - preceding store…
41 "Counter": "0,1,2,3",
45 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
[all …]
|
| D | cache.json | 5 "Counter": "0,1,2,3",
10 "CounterHTOff": "0,1,2,3,4,5,6,7"
14 "Counter": "0,1,2,3",
19 "CounterHTOff": "0,1,2,3,4,5,6,7"
23 "Counter": "0,1,2,3",
28 "CounterHTOff": "0,1,2,3,4,5,6,7"
32 "Counter": "0,1,2,3",
37 "CounterHTOff": "0,1,2,3,4,5,6,7"
42 "Counter": "0,1,2,3",
47 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
|
| /linux-5.10/tools/perf/pmu-events/arch/x86/broadwellde/ |
| D | pipeline.json | 7 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
14 "Counter": "Fixed counter 1",
18 "CounterHTOff": "Fixed counter 1"
23 "Counter": "Fixed counter 1",
25 "AnyThread": "1",
27 "CounterHTOff": "Fixed counter 1"
34 …1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counte…
41 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
42 "Counter": "0,1,2,3",
44 …-on-Store blocking code preventing store forwarding. This includes cases when:\n - preceding store…
[all …]
|
| D | cache.json | 6 "Counter": "0,1,2,3",
10 "CounterHTOff": "0,1,2,3,4,5,6,7"
16 "Counter": "0,1,2,3",
19 "CounterHTOff": "0,1,2,3,4,5,6,7"
25 "Counter": "0,1,2,3",
28 "CounterHTOff": "0,1,2,3,4,5,6,7"
34 "Counter": "0,1,2,3",
37 "CounterHTOff": "0,1,2,3,4,5,6,7"
43 "Counter": "0,1,2,3",
47 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
|
| /linux-5.10/tools/perf/pmu-events/arch/x86/skylake/ |
| D | pipeline.json | 3 …tion. For instructions that consist of multiple micro-ops, Counts the retirement of the last micro…
13 "Counter": "Fixed counter 1",
18 "CounterHTOff": "Fixed counter 1"
21 "Counter": "Fixed counter 1",
23 "AnyThread": "1",
27 "CounterHTOff": "Fixed counter 1"
30 …1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counte…
39 …-on-Store blocking code preventing store forwarding. This includes cases when:a. preceding store c…
41 "Counter": "0,1,2,3",
46 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
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| D | frontend.json | 5 "Counter": "0,1,2,3",
10 "CounterHTOff": "0,1,2,3,4,5,6,7"
15 "Counter": "0,1,2,3",
20 "CounterMask": "1",
21 "CounterHTOff": "0,1,2,3,4,5,6,7"
26 "Counter": "0,1,2,3",
31 "CounterHTOff": "0,1,2,3,4,5,6,7"
36 "Counter": "0,1,2,3",
41 "CounterMask": "1",
42 "CounterHTOff": "0,1,2,3,4,5,6,7"
[all …]
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| /linux-5.10/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| D | pipeline.json | 4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
9 "PEBS": "1",
16 "Counter": "0,1,2,3",
17 "CounterHTOff": "0,1,2,3,4,5,6,7",
25 …w LEA uops being allocated. A uop is generally considered SlowLea if it has 3 sources (e.g. 2 sour…
26 "Counter": "0,1,2,3",
27 "CounterHTOff": "0,1,2,3,4,5,6,7",
35 "Counter": "0,1,2,3",
36 "CounterHTOff": "0,1,2,3,4,5,6,7",
[all …]
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| /linux-5.10/tools/perf/pmu-events/arch/x86/skylakex/ |
| D | pipeline.json | 3 "BriefDescription": "Number of instructions retired. General Counter - architectural event",
4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
9 …n": "Counts the number of instructions (EOMs) retired. Counting covers macro-fused instructions in…
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
16 "CounterMask": "1",
19 "Invert": "1",
26 "Counter": "0,1,2,3",
27 "CounterHTOff": "0,1,2,3,4,5,6,7",
[all …]
|
| /linux-5.10/Documentation/userspace-api/media/v4l/ |
| D | pixfmt-rgb.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _pixfmt-rgb:
14 These are all packed-pixel formats, meaning all the data for a pixel lie
26 .. flat-table:: RGB Image Formats
27 :header-rows: 2
28 :stub-columns: 0
30 * - Identifier
31 - Code
32 - :cspan:`7` Byte 0 in memory
33 - :cspan:`7` Byte 1
[all …]
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| /linux-5.10/arch/powerpc/boot/ |
| D | string.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
13 addi r5,r3,-1
14 addi r4,r4,-1
15 1: lbzu r0,1(r4)
17 stbu r0,1(r5)
18 bne 1b
26 addi r6,r3,-1
27 addi r4,r4,-1
28 1: lbzu r0,1(r4)
30 stbu r0,1(r6)
[all …]
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| /linux-5.10/arch/xtensa/variants/csp/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
35 #define XCHAL_CP_NUM 1 /* number of coprocessors */
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
44 #define XCHAL_CP7_SA_ALIGN 1 /* min alignment of save area */
49 #define XCHAL_CP0_SA_ALIGN 1
51 #define XCHAL_CP1_SA_ALIGN 1
53 #define XCHAL_CP2_SA_ALIGN 1
55 #define XCHAL_CP3_SA_ALIGN 1
57 #define XCHAL_CP4_SA_ALIGN 1
[all …]
|