Searched +full:0 +full:xff0c0000 (Results 1 – 6 of 6) sorted by relevance
16 #define FLIS_BASE_ADDR 0xff0c000017 #define FLIS_LENGTH 0x8000
80 minimum: 082 default: 086 If not specified 0 deg will be used.90 minimum: 0114 reg = <0xff0c0000 0x4000>;121 fifo-depth = <0x100>;
25 #size-cells = <0>;27 cpu0: cpu@0 {32 reg = <0x0>;40 reg = <0x1>;49 reg = <0x2>;58 reg = <0x3>;66 CPU_SLEEP_0: cpu-sleep-0 {68 arm,psci-suspend-param = <0x40000000>;110 interrupts = <0 143 4>,111 <0 144 4>,[all …]
39 #address-cells = <0x2>;40 #size-cells = <0x0>;74 cpu_l0: cpu@0 {77 reg = <0x0 0x0>;85 reg = <0x0 0x1>;93 reg = <0x0 0x2>;101 reg = <0x0 0x3>;109 reg = <0x0 0x100>;117 reg = <0x0 0x101>;125 reg = <0x0 0x102>;[all …]
39 #size-cells = <0>;41 cpu0: cpu@0 {44 reg = <0x0 0x0>;57 reg = <0x0 0x1>;67 reg = <0x0 0x2>;77 reg = <0x0 0x3>;90 arm,psci-suspend-param = <0x0010000>;142 #clock-cells = <0>;160 #clock-cells = <0>;167 reg = <0x0 0xff000000 0x0 0x10000>;[all …]
53 #size-cells = <0>;60 reg = <0x500>;71 reg = <0x501>;82 reg = <0x502>;93 reg = <0x503>;165 reg = <0x0 0xff250000 0x0 0x4000>;177 reg = <0x0 0xff600000 0x0 0x4000>;178 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,190 reg = <0x0 0xffb20000 0x0 0x4000>;191 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,[all …]