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/linux-5.10/drivers/soc/renesas/
Drenesas-soc.c23 .reg = 0xff000044, /* PRR (Product Register) */
28 .reg = 0xff000044, /* PRR (Product Register) */
33 .reg = 0xfff00044, /* PRR (Product Register) */
38 .reg = 0xe600101c, /* CCCR (Common Chip Code Register) */
51 .reg = 0xff000044, /* PRR (Product Register) */
56 .reg = 0xfff00044, /* PRR (Product Register) */
61 .reg = 0xe600101c, /* CCCR (Common Chip Code Register) */
76 .id = 0x3b,
81 .id = 0x3f,
86 .id = 0x40,
[all …]
/linux-5.10/Documentation/devicetree/bindings/arm/
Drenesas,prr.yaml36 reg = <0xff000044 4>;
/linux-5.10/arch/sh/include/asm/
Dprocessor_32.h19 #define CCN_PVR 0xff000030
20 #define CCN_CVR 0xff000040
21 #define CCN_PRR 0xff000044
26 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
28 #define TASK_SIZE 0x7c000000UL
48 #define SR_DSP 0x00001000
49 #define SR_IMASK 0x000000f0
50 #define SR_FD 0x00008000
51 #define SR_MD 0x40000000
122 .flags = 0, \
[all …]
/linux-5.10/arch/arm/boot/dts/
Dr8a7779.dtsi22 #size-cells = <0>;
24 cpu@0 {
27 reg = <0>;
67 reg = <0xf0001000 0x1000>,
68 <0xf0000100 0x100>;
73 reg = <0xf0000200 0x100>;
81 reg = <0xf0000600 0x20>;
89 reg = <0xffc40000 0x2c>;
93 gpio-ranges = <&pfc 0 0 32>;
100 reg = <0xffc41000 0x2c>;
[all …]
Dr8a73a4.dtsi21 #size-cells = <0>;
23 cpu0: cpu@0 {
26 reg = <0>;
33 L2_CA15: cache-controller-0 {
65 reg = <0 0xe6790000 0 0x10000>;
71 reg = <0 0xe67a0000 0 0x10000>;
86 reg = <0 0xe6700020 0 0x89e0>;
121 #size-cells = <0>;
123 reg = <0 0xe60b0000 0 0x428>;
133 reg = <0 0xe6130000 0 0x1004>;
[all …]
Dr8a7792.dtsi40 #clock-cells = <0>;
42 clock-frequency = <0>;
47 #size-cells = <0>;
50 cpu0: cpu@0 {
53 reg = <0>;
70 L2_CA15: cache-controller-0 {
81 #clock-cells = <0>;
83 clock-frequency = <0>;
96 #clock-cells = <0>;
98 clock-frequency = <0>;
[all …]
Dr8a77470.dtsi27 #size-cells = <0>;
30 cpu0: cpu@0 {
33 reg = <0>;
50 L2_CA7: cache-controller-0 {
61 #clock-cells = <0>;
63 clock-frequency = <0>;
76 #clock-cells = <0>;
78 clock-frequency = <0>;
92 reg = <0 0xe6020000 0 0x0c>;
102 reg = <0 0xe6050000 0 0x50>;
[all …]
Dr8a7794.dtsi34 * The external audio clocks are configured as 0 Hz fixed frequency
40 #clock-cells = <0>;
41 clock-frequency = <0>;
45 #clock-cells = <0>;
46 clock-frequency = <0>;
50 #clock-cells = <0>;
51 clock-frequency = <0>;
57 #clock-cells = <0>;
59 clock-frequency = <0>;
64 #size-cells = <0>;
[all …]
Dr8a7793.dtsi32 * The external audio clocks are configured as 0 Hz fixed frequency
38 #clock-cells = <0>;
39 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
48 #clock-cells = <0>;
49 clock-frequency = <0>;
55 #clock-cells = <0>;
57 clock-frequency = <0>;
62 #size-cells = <0>;
[all …]
Dr8a7745.dtsi36 * The external audio clocks are configured as 0 Hz fixed
42 #clock-cells = <0>;
43 clock-frequency = <0>;
47 #clock-cells = <0>;
48 clock-frequency = <0>;
52 #clock-cells = <0>;
53 clock-frequency = <0>;
59 #clock-cells = <0>;
61 clock-frequency = <0>;
66 #size-cells = <0>;
[all …]
Dr8a7742.dtsi19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
35 #clock-cells = <0>;
36 clock-frequency = <0>;
42 #clock-cells = <0>;
44 clock-frequency = <0>;
49 #size-cells = <0>;
[all …]
Dr8a7791.dtsi40 * The external audio clocks are configured as 0 Hz fixed frequency
46 #clock-cells = <0>;
47 clock-frequency = <0>;
51 #clock-cells = <0>;
52 clock-frequency = <0>;
56 #clock-cells = <0>;
57 clock-frequency = <0>;
63 #clock-cells = <0>;
65 clock-frequency = <0>;
70 #size-cells = <0>;
[all …]
Dr8a7743.dtsi19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
31 #clock-cells = <0>;
32 clock-frequency = <0>;
37 #clock-cells = <0>;
38 clock-frequency = <0>;
44 #clock-cells = <0>;
46 clock-frequency = <0>;
51 #size-cells = <0>;
[all …]
Dr8a7744.dtsi19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
31 #clock-cells = <0>;
32 clock-frequency = <0>;
37 #clock-cells = <0>;
38 clock-frequency = <0>;
44 #clock-cells = <0>;
46 clock-frequency = <0>;
51 #size-cells = <0>;
[all …]
Dr8a7790.dtsi41 * The external audio clocks are configured as 0 Hz fixed frequency
47 #clock-cells = <0>;
48 clock-frequency = <0>;
52 #clock-cells = <0>;
53 clock-frequency = <0>;
57 #clock-cells = <0>;
58 clock-frequency = <0>;
64 #clock-cells = <0>;
66 clock-frequency = <0>;
71 #size-cells = <0>;
[all …]