Home
last modified time | relevance | path

Searched +full:0 +full:xf0010000 (Results 1 – 20 of 20) sorted by relevance

/linux/arch/arm/mach-mvebu/
H A Dpm.c26 #define SDRAM_CONFIG_OFFS 0x0
28 #define SDRAM_OPERATION_OFFS 0x18
29 #define SDRAM_OPERATION_SELF_REFRESH 0x7
30 #define SDRAM_DLB_EVICTION_OFFS 0x30c
31 #define SDRAM_DLB_EVICTION_THRESHOLD_MASK 0xff
64 srcmd &= ~0x1F; in mvebu_pm_powerdown()
69 return 0; in mvebu_pm_powerdown()
72 #define BOOT_INFO_ADDR 0x3000
73 #define BOOT_MAGIC_WORD 0xdeadb002
74 #define BOOT_MAGIC_LIST_END 0xfffffff
[all...]
/linux/Documentation/devicetree/bindings/bus/
H A Dmvebu-mbus.txt65 pcie-mem-aperture = <0xe0000000 0x8000000>;
66 pcie-io-aperture = <0xe8000000 0x100000>;
73 reg = <0x20000 0x100>, <0x20180 0x20>, <0x20250 0x
[all...]
/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-npcm750-runbmc-olympus.dts47 reg = <0 0x40000000>;
52 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
75 gpios = <&gpio0 19 0>; /* gpio19 */
76 regbase = <0xf0010000 0x1000>;
81 gpios = <&gpio0 18 0>; /* gpio18 */
82 regbase = <0xf0010000
[all...]
H A Dnuvoton-common-npcm7xx.dtsi17 #clock-cells = <0>;
25 #clock-cells = <0>;
33 #clock-cells = <0>;
41 #clock-cells = <0>;
49 #clock-cells = <0>;
56 #clock-cells = <0>;
66 ranges = <0x0 0xf0000000 0x00900000>;
70 reg = <0x3fe00
[all...]
/linux/arch/powerpc/boot/dts/
H A Dmedia5200.dts28 PowerPC,5200@0 {
35 memory@0 {
36 reg = <0x00000000 0x08000000>; // 128MB RAM
72 phy0: ethernet-phy@0 {
73 reg = <0>;
78 reg = <0x1000 0x100>;
83 interrupt-map-mask = <0xf800 0
[all...]
/linux/arch/m68k/coldfire/
H A Dm5272.c32 unsigned char ledbank = 0xff;
36 DEFINE_CLK(pll, "pll.0", MCF_CLK);
37 DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
40 CLKDEV_INIT(NULL, "pll.0", &clk_pll),
41 CLKDEV_INIT(NULL, "sys.0", &clk_sys),
42 CLKDEV_INIT("mcftmr.0", NULL, &clk_sys),
46 CLKDEV_INIT("mcfuart.0", NULL, &clk_sys),
48 CLKDEV_INIT("mcfqspi.0", NULL, &clk_sys),
49 CLKDEV_INIT("fec.0", NULL, &clk_sys),
60 v = (v & ~0x000000f in m5272_uarts_init()
[all...]
/linux/arch/arm64/boot/dts/nuvoton/
H A Dnuvoton-common-npcm8xx.dtsi22 reg = <0x0 0xf0800000 0x0 0x1000>;
27 reg = <0x0 0xdfff9000 0x0 0x1000>,
28 <0x0 0xdfffa00
[all...]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnuvoton,npcm7xx-pinctrl.txt32 reg = <0x0 0x80>;
34 gpio-ranges = <&pinctrl 0 0 32>;
113 <0> - slow
176 ranges = <0 0xf0010000 0x8000>;
181 reg = <0x
[all...]
/linux/arch/arm64/boot/dts/amazon/
H A Dalpine-v3.dtsi21 #size-cells = <0>;
23 cpu@0 {
26 reg = <0x0>;
28 d-cache-size = <0x8000>;
31 i-cache-size = <0xc000>;
40 reg = <0x1>;
42 d-cache-size = <0x8000>;
45 i-cache-size = <0xc000>;
54 reg = <0x2>;
56 d-cache-size = <0x800
[all...]
/linux/arch/arm/boot/dts/microchip/
H A Dat91sam9n12.dtsi42 #size-cells = <0>;
44 cpu@0 {
47 reg = <0>;
53 reg = <0x20000000 0x10000000>;
59 #clock-cells = <0>;
60 clock-frequency = <0>;
65 #clock-cells = <0>;
66 clock-frequency = <0>;
72 reg = <0x0030000
[all...]
H A Dat91sam9x5.dtsi44 #size-cells = <0>;
46 cpu@0 {
49 reg = <0>;
55 reg = <0x20000000 0x10000000>;
61 #clock-cells = <0>;
62 clock-frequency = <0>;
67 #clock-cells = <0>;
68 clock-frequency = <0>;
73 #clock-cells = <0>;
[all...]
H A Dsama5d3.dtsi46 #size-cells = <0>;
47 cpu@0 {
50 reg = <0x0>;
51 d-cache-size = <0x8000>; // L1, 32 KB
52 i-cache-size = <0x8000>; // L1, 32 KB
58 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
63 reg = <0x20000000 0x8000000>;
69 #clock-cells = <0>;
70 clock-frequency = <0>;
[all...]
H A Dsama5d2.dtsi29 #size-cells = <0>;
31 cpu@0 {
34 reg = <0>;
35 d-cache-size = <0x8000>; // L1, 32 KB
36 i-cache-size = <0x8000>; // L1, 32 KB
43 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>;
48 reg = <0x740000 0x1000>;
64 reg = <0x73c000 0x100
[all...]
H A Dsam9x7.dtsi36 #size-cells = <0>;
38 cpu@0 {
40 reg = <0>;
49 #clock-cells = <0>;
55 #clock-cells = <0>;
61 reg = <0x300000 0x10000>;
62 ranges = <0 0x300000 0x1000
[all...]
H A Dsam9x60.dtsi37 #size-cells = <0>;
39 cpu@0 {
42 reg = <0>;
48 reg = <0x20000000 0x10000000>;
54 #clock-cells = <0>;
59 #clock-cells = <0>;
65 reg = <0x00300000 0x100000>;
68 ranges = <0
[all...]
H A Dsama5d4.dtsi47 #size-cells = <0>;
49 cpu@0 {
52 reg = <0>;
53 d-cache-size = <0x8000>; // L1, 32 KB
54 i-cache-size = <0x8000>; // L1, 32 KB
61 reg = <0x20000000 0x20000000>;
67 #clock-cells = <0>;
68 clock-frequency = <0>;
73 #clock-cells = <0>;
[all...]
/linux/drivers/scsi/megaraid/
H A Dmegaraid_sas.h34 #define PCI_DEVICE_ID_LSI_SAS1078R 0x0060
35 #define PCI_DEVICE_ID_LSI_SAS1078DE 0x007C
36 #define PCI_DEVICE_ID_LSI_VERDE_ZCR 0x0413
37 #define PCI_DEVICE_ID_LSI_SAS1078GEN2 0x0078
38 #define PCI_DEVICE_ID_LSI_SAS0079GEN2 0x0079
39 #define PCI_DEVICE_ID_LSI_SAS0073SKINNY 0x0073
40 #define PCI_DEVICE_ID_LSI_SAS0071SKINNY 0x0071
41 #define PCI_DEVICE_ID_LSI_FUSION 0x005b
42 #define PCI_DEVICE_ID_LSI_PLASMA 0x002f
43 #define PCI_DEVICE_ID_LSI_INVADER 0x005
[all...]
/linux/drivers/net/wireless/realtek/rtw89/
H A Drtw8852b_table.c10 {0x704, 0x601E0100},
11 {0x4000, 0x00000000},
12 {0x4004, 0xCA014000},
13 {0x4008, 0xC751D4F0},
14 {0x400C, 0x4451147
[all...]
H A Drtw8851b_table.c10 {0x704, 0x601E0500},
11 {0x4000, 0x00000000},
12 {0x4004, 0xCA014000},
13 {0x4008, 0xC751D4F0},
14 {0x400C, 0x4451147
[all...]
H A Drtw8852c_table.c10 {0xF0FF0000, 0x00000000},
11 {0xF03300FF, 0x00000001},
12 {0xF03400FF, 0x00000002},
13 {0xF03500FF, 0x00000003},
14 {0xF03600FF, 0x0000000
[all...]