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/src/sys/contrib/device-tree/Bindings/input/
H A Dsprd,sc27xx-vibra.txt9 sc2731_pmic: pmic@0 {
11 reg = <0>;
17 #size-cells = <0>;
21 reg = <0xeb4>;
/src/sys/dev/rtwn/rtl8812a/
H A Dr12a_priv.h34 { 0x010, 0x0c },
37 { 0x025, 0x0f }, { 0x072, 0x00 }, { 0x420, 0x80 }, { 0x428, 0x0a }, \
38 { 0x429, 0x10 }, { 0x430, 0x00 }, { 0x431, 0x00 }, { 0x432, 0x00 }, \
39 { 0x433, 0x01 }, { 0x434, 0x04 }, { 0x435, 0x05 }, { 0x436, 0x07 }, \
40 { 0x437, 0x08 }, { 0x43c, 0x04 }, { 0x43d, 0x05 }, { 0x43e, 0x07 }, \
41 { 0x43f, 0x08 }, { 0x440, 0x5d }, { 0x441, 0x01 }, { 0x442, 0x00 }, \
42 { 0x444, 0x10 }, { 0x445, 0x00 }, { 0x446, 0x00 }, { 0x447, 0x00 }, \
43 { 0x448, 0x00 }, { 0x449, 0xf0 }, { 0x44a, 0x0f }, { 0x44b, 0x3e }, \
44 { 0x44c, 0x10 }, { 0x44d, 0x00 }, { 0x44e, 0x00 }, { 0x44f, 0x00 }, \
45 { 0x450, 0x00 }, { 0x451, 0xf0 }, { 0x452, 0x0f }, { 0x453, 0x00 }, \
[all …]
/src/sys/contrib/dev/rtw88/
H A Drtw8812a.c21 s8 rx_pwr_all = 0; in rtw8812a_cck_rx_pwr()
48 case 0: in rtw8812a_cck_rx_pwr()
85 cont_tx = rtw_read32_mask(rtwdev, REG_SINGLE_TONE_CONT_TX, 0x70000); in rtw8812a_do_lck()
90 rtw_write8(rtwdev, REG_TXPAUSE, 0xff); in rtw8812a_do_lck()
94 rtw_write_rf(rtwdev, RF_PATH_A, RF_CFGCH, 0x08000, 1); in rtw8812a_do_lck()
98 for (i = 0; i < 5; i++) { in rtw8812a_do_lck()
99 if (rtw_read_rf(rtwdev, RF_PATH_A, RF_CFGCH, 0x08000) != 1) in rtw8812a_do_lck()
110 rtw_write_rf(rtwdev, RF_PATH_A, RF_LCK, BIT(14), 0); in rtw8812a_do_lck()
113 rtw_write8(rtwdev, REG_TXPAUSE, 0); in rtw8812a_do_lck()
124 /* [31] = 0 --> Page C */ in rtw8812a_iqk_backup_rf()
[all …]
H A Drtw8812a_table.c10 0x010, 0x0000000C,
11 0x80000200, 0x00000000, 0x40000000, 0x00000000,
12 0x011, 0x00000066,
13 0xA0000000, 0x00000000,
14 0x011, 0x0000005A,
15 0xB0000000, 0x00000000,
16 0x025, 0x0000000F,
17 0x072, 0x00000000,
18 0x420, 0x00000080,
19 0x428, 0x0000000A,
[all …]
H A Drtw8821c_table.c10 0x010, 0x00000043,
11 0x025, 0x0000001D,
12 0x026, 0x000000CE,
13 0x04F, 0x00000001,
14 0x029, 0x000000F9,
15 0x420, 0x00000080,
16 0x421, 0x0000001F,
17 0x428, 0x0000000A,
18 0x429, 0x00000010,
19 0x430, 0x00000000,
[all …]
H A Drtw8822b_table.c10 0x029, 0x000000F9,
11 0x420, 0x00000080,
12 0x421, 0x0000001F,
13 0x428, 0x0000000A,
14 0x429, 0x00000010,
15 0x430, 0x00000000,
16 0x431, 0x00000000,
17 0x432, 0x00000000,
18 0x433, 0x00000001,
19 0x434, 0x00000004,
[all …]
H A Drtw8814a_table.c10 0x010, 0x0000007C,
11 0x014, 0x000000DB,
12 0x016, 0x00000002,
13 0x073, 0x00000010,
14 0x420, 0x00000080,
15 0x421, 0x0000000F,
16 0x428, 0x0000000A,
17 0x429, 0x00000010,
18 0x430, 0x00000000,
19 0x431, 0x00000000,
[all …]
/src/sys/dev/cxgbe/common/
H A Dt4_regs.h36 #define MYPF_BASE 0x1b000
39 #define PF0_BASE 0x1e000
42 #define PF1_BASE 0x1e400
45 #define PF2_BASE 0x1e800
48 #define PF3_BASE 0x1ec00
51 #define PF4_BASE 0x1f000
54 #define PF5_BASE 0x1f400
57 #define PF6_BASE 0x1f800
60 #define PF7_BASE 0x1fc00
63 #define PF_STRIDE 0x400
[all …]