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/linux-5.10/Documentation/devicetree/bindings/dma/
Dmmp-dma.txt28 * For example, pxa688 icu register 0x128, bit 0~15 is PDMA channel irq,
33 reg = <0xd4000000 0x10000>;
34 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
46 reg = <0xd4000000 0x10000>;
69 reg = <0xd42a0800 0x100>;
77 reg = <0xd42a0800 0x100>;
/linux-5.10/Documentation/devicetree/bindings/pci/
Dintel-gw-pcie.yaml122 reg = <0xd0e00000 0x1000>,
123 <0xd2000000 0x800000>,
124 <0xd0a41000 0x1000>;
126 linux,pci-domain = <0>;
128 bus-range = <0x00 0x08>;
130 interrupt-map-mask = <0 0 0 0x7>;
131 interrupt-map = <0 0 0 1 &ioapic1 27 1>,
132 <0 0 0 2 &ioapic1 28 1>,
133 <0 0 0 3 &ioapic1 29 1>,
134 <0 0 0 4 &ioapic1 30 1>;
[all …]
/linux-5.10/arch/arm/mach-mmp/
Daddr-map.h15 #define APB_PHYS_BASE 0xd4000000
16 #define APB_VIRT_BASE IOMEM(0xfe000000)
17 #define APB_PHYS_SIZE 0x00200000
19 #define AXI_PHYS_BASE 0xd4200000
20 #define AXI_VIRT_BASE IOMEM(0xfe200000)
21 #define AXI_PHYS_SIZE 0x00200000
23 #define PGU_PHYS_BASE 0xe0000000
24 #define PGU_VIRT_BASE IOMEM(0xfe400000)
25 #define PGU_PHYS_SIZE 0x00100000
27 /* Static Memory Controller - Chip Select 0 and 1 */
[all …]
/linux-5.10/arch/arm/boot/dts/
Dpxa168.dtsi32 reg = <0xd4200000 0x00200000>;
39 reg = <0xd4282000 0x1000>;
49 reg = <0xd4000000 0x00200000>;
54 reg = <0xd4014000 0x100>;
60 reg = <0xd4017000 0x1000>;
70 reg = <0xd4018000 0x1000>;
80 reg = <0xd4026000 0x1000>;
92 reg = <0xd4019000 0x1000>;
104 reg = <0xd4019000 0x4>;
108 reg = <0xd4019004 0x4>;
[all …]
Dpxa910.dtsi30 marvell,tauros2-cache-features = <0x3>;
37 reg = <0xd4200000 0x00200000>;
44 reg = <0xd4282000 0x1000>;
54 reg = <0xd4000000 0x00200000>;
59 reg = <0xd4014000 0x100>;
65 reg = <0xd4016000 0x100>;
72 reg = <0xd4017000 0x1000>;
82 reg = <0xd4018000 0x1000>;
92 reg = <0xd4036000 0x1000>;
104 reg = <0xd4019000 0x1000>;
[all …]
Dmmp2.dtsi32 marvell,tauros2-cache-features = <0x3>;
39 reg = <0xd4200000 0x00200000>;
44 reg = <0xd420d000 0x4000>;
57 reg = <0xd4282000 0x1000>;
66 reg = <0x150 0x4>, <0x168 0x4>;
76 reg = <0x154 0x4>, <0x16c 0x4>;
87 reg = <0x180 0x4>, <0x17c 0x4>;
97 reg = <0x158 0x4>, <0x170 0x4>;
107 reg = <0x15c 0x4>, <0x174 0x4>;
117 reg = <0x160 0x4>, <0x178 0x4>;
[all …]
Dstm32mp157c-odyssey-som.dtsi22 reg = <0xc0000000 0x20000000>;
32 reg = <0x10000000 0x40000>;
38 reg = <0x10040000 0x1000>;
44 reg = <0x10041000 0x1000>;
50 reg = <0x10042000 0x4000>;
56 reg = <0x30000000 0x40000>;
62 reg = <0x38000000 0x10000>;
67 reg = <0xd4000000 0x4000000>;
90 pinctrl-0 = <&i2c2_pins_a>;
100 reg = <0x33>;
[all …]
Dimx27.dtsi47 reg = <0x10040000 0x1000>;
53 #clock-cells = <0>;
59 #size-cells = <0>;
62 cpu: cpu@0 {
64 reg = <0>;
88 reg = <0x10000000 0x20000>;
93 reg = <0x10001000 0x1000>;
104 reg = <0x10002000 0x1000>;
111 reg = <0x10003000 0x1000>;
120 reg = <0x10004000 0x1000>;
[all …]
Dstm32mp15xx-dkx.dtsi13 reg = <0xc0000000 0x20000000>;
23 reg = <0x10000000 0x40000>;
29 reg = <0x10040000 0x1000>;
35 reg = <0x10041000 0x1000>;
41 reg = <0x10042000 0x4000>;
47 reg = <0x30000000 0x40000>;
53 reg = <0x38000000 0x10000>;
58 reg = <0xd4000000 0x4000000>;
95 pinctrl-0 = <&adc12_ain_pins_a>, <&adc12_usb_cc_pins_a>;
100 adc1: adc@0 {
[all …]
Dmmp3.dtsi16 #size-cells = <0>;
19 cpu@0 {
23 reg = <0>;
45 reg = <0xd4200000 0x00200000>;
52 reg = <0xd4282000 0x1000>,
53 <0xd4284000 0x100>;
62 reg = <0x150 0x4>, <0x168 0x4>;
72 reg = <0x154 0x4>, <0x16c 0x4>;
82 reg = <0x1bc 0x4>, <0x1a4 0x4>;
92 reg = <0x1c0 0x4>, <0x1a8 0x4>;
[all …]
/linux-5.10/arch/nios2/boot/dts/
D10m50_devboard.dts16 #size-cells = <0>;
18 cpu: cpu@0 {
21 reg = <0x00000000>;
24 altr,exception-addr = <0xc8000120>;
25 altr,fast-tlb-miss-addr = <0xc0000100>;
32 altr,reset-addr = <0xd4000000>;
46 reg = <0x08000000 0x08000000>,
47 <0x00000000 0x00000400>;
50 sopc0: sopc@0 {
60 reg = <0x18001530 0x00000008>;
[all …]
/linux-5.10/arch/arm64/include/asm/
Dinsn.h23 * 0 0 - - Unallocated
24 * 1 0 0 - Data processing, immediate
25 * 1 0 1 - Branch, exception generation and system instructions
26 * - 1 - 0 Loads and stores
27 * - 1 0 1 Data processing - register
28 * 0 1 1 1 Data processing - SIMD and floating point
43 AARCH64_INSN_HINT_NOP = 0x0 << 5,
44 AARCH64_INSN_HINT_YIELD = 0x1 << 5,
45 AARCH64_INSN_HINT_WFE = 0x2 << 5,
46 AARCH64_INSN_HINT_WFI = 0x3 << 5,
[all …]
/linux-5.10/crypto/
Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/linux-5.10/arch/mips/kernel/
Dtraps.c178 i = 0; in show_stacktrace()
180 if (i && ((i % (64 / field)) == 0)) { in show_stacktrace()
194 pr_cont(" %0*lx", field, stackdata); in show_stacktrace()
209 regs.regs[31] = 0; in show_stack()
210 regs.cp0_epc = 0; in show_stack()
214 regs.regs[31] = 0; in show_stack()
244 pr_cont("%c%0*x%c", (i?' ':'<'), pc16 ? 4 : 8, insn, (i?' ':'>')); in show_code()
261 for (i = 0; i < 32; ) { in __show_regs()
262 if ((i % 4) == 0) in __show_regs()
264 if (i == 0) in __show_regs()
[all …]
/linux-5.10/drivers/scsi/
Ddpt_i2o.c89 FT_HBADRVR, 0, OEM_DPT, OS_LINUX, CAP_OVERLAP, DEV_ALL,
90 ADF_ALL_SC5, 0, 0, DPT_VERSION, DPT_REVISION, DPT_SUBREVISION,
110 static int hba_count = 0;
141 static u32 adpt_post_wait_id = 0;
168 if( readb(host->FwDebugBLEDflag_P) == 0xbc ){ in adpt_read_blink_led()
172 return 0; in adpt_read_blink_led()
184 { 0, }
215 if (adpt_i2o_activate_hba(pHba) < 0) { in adpt_detect()
225 return 0; in adpt_detect()
231 if (adpt_i2o_build_sys_table() < 0) { in adpt_detect()
[all …]
/linux-5.10/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_hsi.h17 #define FW_ENCODE_32BIT_PATTERN 0x1e1e1e1e
23 #define BNX2X_MAX_ISCSI_TRGT_CONN_MASK 0xFFFF
24 #define BNX2X_MAX_ISCSI_TRGT_CONN_SHIFT 0
25 #define BNX2X_MAX_ISCSI_INIT_CONN_MASK 0xFFFF0000
31 #define BNX2X_MAX_FCOE_TRGT_CONN_MASK 0xFFFF
32 #define BNX2X_MAX_FCOE_TRGT_CONN_SHIFT 0
33 #define BNX2X_MAX_FCOE_INIT_CONN_MASK 0xFFFF0000
42 #define PIN_CFG_NA 0x00000000
43 #define PIN_CFG_GPIO0_P0 0x00000001
44 #define PIN_CFG_GPIO1_P0 0x00000002
[all …]
/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_enum.h28 NUMBER_UNORM = 0x0,
29 NUMBER_SNORM = 0x1,
30 NUMBER_USCALED = 0x2,
31 NUMBER_SSCALED = 0x3,
32 NUMBER_UINT = 0x4,
33 NUMBER_SINT = 0x5,
34 NUMBER_SRGB = 0x6,
35 NUMBER_FLOAT = 0x7,
38 SWAP_STD = 0x0,
39 SWAP_ALT = 0x1,
[all …]
Dgfx_8_1_enum.h28 NUMBER_UNORM = 0x0,
29 NUMBER_SNORM = 0x1,
30 NUMBER_USCALED = 0x2,
31 NUMBER_SSCALED = 0x3,
32 NUMBER_UINT = 0x4,
33 NUMBER_SINT = 0x5,
34 NUMBER_SRGB = 0x6,
35 NUMBER_FLOAT = 0x7,
38 SWAP_STD = 0x0,
39 SWAP_ALT = 0x1,
[all …]
/linux-5.10/drivers/gpu/drm/amd/include/
Dvega10_enum.h51 GDS_PERF_SEL_DS_ADDR_CONFL = 0,
184 NO_FORCE_REQUEST = 0x00000000,
185 FORCE_LIGHT_SLEEP_REQUEST = 0x00000001,
186 FORCE_DEEP_SLEEP_REQUEST = 0x00000002,
187 FORCE_SHUT_DOWN_REQUEST = 0x00000003,
195 NO_FORCE_REQ = 0x00000000,
196 FORCE_LIGHT_SLEEP_REQ = 0x00000001,
204 ENABLE_MEM_PWR_CTRL = 0x00000000,
205 DISABLE_MEM_PWR_CTRL = 0x00000001,
213 DYNAMIC_SHUT_DOWN_ENABLE = 0x00000000,
[all …]