/linux-6.8/drivers/pinctrl/mediatek/ |
D | pinctrl-mt8167.c | 18 /* 0E4E8SR 4/8/12/16 */ 20 /* 0E2E4SR 2/4/6/8 */ 23 MTK_DRV_GRP(2, 16, 0, 2, 2) 27 MTK_PIN_DRV_GRP(0, 0xd00, 0, 0), 28 MTK_PIN_DRV_GRP(1, 0xd00, 0, 0), 29 MTK_PIN_DRV_GRP(2, 0xd00, 0, 0), 30 MTK_PIN_DRV_GRP(3, 0xd00, 0, 0), 31 MTK_PIN_DRV_GRP(4, 0xd00, 0, 0), 33 MTK_PIN_DRV_GRP(5, 0xd00, 4, 0), 34 MTK_PIN_DRV_GRP(6, 0xd00, 4, 0), [all …]
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D | pinctrl-mt8516.c | 18 /* 0E4E8SR 4/8/12/16 */ 20 /* 0E2E4SR 2/4/6/8 */ 23 MTK_DRV_GRP(2, 16, 0, 2, 2) 27 MTK_PIN_DRV_GRP(0, 0xd00, 0, 0), 28 MTK_PIN_DRV_GRP(1, 0xd00, 0, 0), 29 MTK_PIN_DRV_GRP(2, 0xd00, 0, 0), 30 MTK_PIN_DRV_GRP(3, 0xd00, 0, 0), 31 MTK_PIN_DRV_GRP(4, 0xd00, 0, 0), 33 MTK_PIN_DRV_GRP(5, 0xd00, 4, 0), 34 MTK_PIN_DRV_GRP(6, 0xd00, 4, 0), [all …]
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/linux-6.8/arch/arm64/boot/dts/qcom/ |
D | pm8550vs.dtsi | 13 polling-delay = <0>; 20 hysteresis = <0>; 26 hysteresis = <0>; 34 polling-delay = <0>; 41 hysteresis = <0>; 47 hysteresis = <0>; 55 polling-delay = <0>; 62 hysteresis = <0>; 68 hysteresis = <0>; 76 polling-delay = <0>; [all …]
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D | sa8775p-pmics.dtsi | 11 pmm8654au_0_thermal: pm8775-0-thermal { 13 polling-delay = <0>; 19 hysteresis = <0>; 25 hysteresis = <0>; 33 polling-delay = <0>; 39 hysteresis = <0>; 45 hysteresis = <0>; 53 polling-delay = <0>; 59 hysteresis = <0>; 65 hysteresis = <0>; [all …]
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D | sc8280xp-pmics.dtsi | 14 polling-delay = <0>; 20 hysteresis = <0>; 26 hysteresis = <0>; 34 polling-delay = <0>; 40 hysteresis = <0>; 46 hysteresis = <0>; 55 pmk8280: pmic@0 { 57 reg = <0x0 SPMI_USID>; 59 #size-cells = <0>; 63 reg = <0x1300>, <0x800>; [all …]
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D | pmr735d_a.dtsi | 13 polling-delay = <0>; 20 hysteresis = <0>; 26 hysteresis = <0>; 38 reg = <0xa SPMI_USID>; 40 #size-cells = <0>; 44 reg = <0xa00>; 45 interrupts = <0xa 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; 46 #thermal-sensor-cells = <0>; 51 reg = <0x8800>; 53 gpio-ranges = <&pmr735d_k_gpios 0 0 2>;
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D | pm8450.dtsi | 13 polling-delay = <0>; 20 hysteresis = <0>; 26 hysteresis = <0>; 38 reg = <0x7 SPMI_USID>; 40 #size-cells = <0>; 44 reg = <0xa00>; 45 interrupts = <0x7 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; 46 #thermal-sensor-cells = <0>; 51 reg = <0x8800>; 53 gpio-ranges = <&pm8450_gpios 0 0 4>;
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D | pmr735d_b.dtsi | 13 polling-delay = <0>; 20 hysteresis = <0>; 26 hysteresis = <0>; 38 reg = <0xb SPMI_USID>; 40 #size-cells = <0>; 44 reg = <0xa00>; 45 interrupts = <0xb 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; 46 #thermal-sensor-cells = <0>; 51 reg = <0x8800>; 53 gpio-ranges = <&pmr735d_l_gpios 0 0 2>;
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D | pm8550ve.dtsi | 13 polling-delay = <0>; 20 hysteresis = <0>; 26 hysteresis = <0>; 40 #size-cells = <0>; 44 reg = <0xa00>; 45 interrupts = <PMK8550VE_SID 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; 46 #thermal-sensor-cells = <0>; 51 reg = <0x8800>; 53 gpio-ranges = <&pm8550ve_gpios 0 0 8>;
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D | pm8550b.dtsi | 13 polling-delay = <0>; 20 hysteresis = <0>; 26 hysteresis = <0>; 38 reg = <0x7 SPMI_USID>; 40 #size-cells = <0>; 44 reg = <0xa00>; 45 interrupts = <0x7 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; 46 #thermal-sensor-cells = <0>; 51 reg = <0x8800>; 53 gpio-ranges = <&pm8550b_gpios 0 0 12>; [all …]
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D | pmr735a.dtsi | 12 reg = <0x4 SPMI_USID>; 14 #size-cells = <0>; 18 reg = <0xa00>; 19 interrupts = <0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; 20 #thermal-sensor-cells = <0>; 25 reg = <0x8800>; 27 gpio-ranges = <&pmr735a_gpios 0 0 4>; 39 polling-delay = <0>; 45 hysteresis = <0>; 51 hysteresis = <0>;
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D | pm7325.dtsi | 12 reg = <0x1 SPMI_USID>; 14 #size-cells = <0>; 18 reg = <0xa00>; 19 interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; 20 #thermal-sensor-cells = <0>; 25 reg = <0x8800>; 27 gpio-ranges = <&pm7325_gpios 0 0 10>; 38 polling-delay = <0>; 44 hysteresis = <0>; 50 hysteresis = <0>;
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D | pm8350.dtsi | 13 polling-delay = <0>; 19 hysteresis = <0>; 25 hysteresis = <0>; 36 reg = <0x1 SPMI_USID>; 38 #size-cells = <0>; 42 reg = <0xa00>; 43 interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; 44 #thermal-sensor-cells = <0>; 49 reg = <0x8800>; 51 gpio-ranges = <&pm8350_gpios 0 0 10>;
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D | pm8350b.dtsi | 13 polling-delay = <0>; 19 hysteresis = <0>; 25 hysteresis = <0>; 36 reg = <0x3 SPMI_USID>; 38 #size-cells = <0>; 42 reg = <0xa00>; 43 interrupts = <0x3 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; 44 #thermal-sensor-cells = <0>; 49 reg = <0x8800>; 51 gpio-ranges = <&pm8350b_gpios 0 0 8>;
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D | pmr735b.dtsi | 13 polling-delay = <0>; 19 hysteresis = <0>; 25 hysteresis = <0>; 36 reg = <0x5 SPMI_USID>; 38 #size-cells = <0>; 42 reg = <0xa00>; 43 interrupts = <0x5 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; 44 #thermal-sensor-cells = <0>; 49 reg = <0x8800>; 51 gpio-ranges = <&pmr735b_gpios 0 0 4>;
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D | pmx75.dtsi | 13 polling-delay = <0>; 20 hysteresis = <0>; 26 hysteresis = <0>; 32 hysteresis = <0>; 45 #size-cells = <0>; 49 reg = <0xa00>; 50 interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; 51 #thermal-sensor-cells = <0>; 56 reg = <0x8800>; 58 gpio-ranges = <&pmx75_gpios 0 0 16>;
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D | pm7550ba.dtsi | 13 polling-delay = <0>; 20 hysteresis = <0>; 26 hysteresis = <0>; 32 hysteresis = <0>; 45 #size-cells = <0>; 49 reg = <0xa00>; 50 interrupts = <0x7 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; 51 #thermal-sensor-cells = <0>; 56 reg = <0x8800>; 58 gpio-ranges = <&pm7550ba_gpios 0 0 8>; [all …]
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D | pm8350c.dtsi | 12 reg = <0x2 SPMI_USID>; 14 #size-cells = <0>; 18 reg = <0xa00>; 19 interrupts = <0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; 20 #thermal-sensor-cells = <0>; 25 reg = <0x8800>; 27 gpio-ranges = <&pm8350c_gpios 0 0 9>; 35 reg = <0xee00>; 51 polling-delay = <0>; 57 hysteresis = <0>; [all …]
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D | pm8550.dtsi | 13 polling-delay = <0>; 20 hysteresis = <0>; 26 hysteresis = <0>; 38 reg = <0x1 SPMI_USID>; 40 #size-cells = <0>; 44 reg = <0xa00>; 45 interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; 46 #thermal-sensor-cells = <0>; 51 reg = <0x8800>; 53 gpio-ranges = <&pm8550_gpios 0 0 12>; [all …]
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/linux-6.8/drivers/pinctrl/samsung/ |
D | pinctrl-exynos.h | 20 #define EXYNOS_PIN_CON_FUNC_EINT 0xf 23 #define EXYNOS_GPIO_ECON_OFFSET 0x700 24 #define EXYNOS_GPIO_EFLTCON_OFFSET 0x800 25 #define EXYNOS_GPIO_EMASK_OFFSET 0x900 26 #define EXYNOS_GPIO_EPEND_OFFSET 0xA00 27 #define EXYNOS_WKUP_ECON_OFFSET 0xE00 28 #define EXYNOS_WKUP_EMASK_OFFSET 0xF00 29 #define EXYNOS_WKUP_EPEND_OFFSET 0xF40 30 #define EXYNOS7_WKUP_ECON_OFFSET 0x700 31 #define EXYNOS7_WKUP_EMASK_OFFSET 0x900 [all …]
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/linux-6.8/arch/arm/boot/dts/qcom/ |
D | pmx65.dtsi | 14 #size-cells = <0>; 18 reg = <0xa00>; 19 interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; 20 #thermal-sensor-cells = <0>; 25 reg = <0x8800>; 27 gpio-ranges = <&pmx65_gpios 0 0 16>;
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/linux-6.8/drivers/clk/rockchip/ |
D | clk.h | 29 #define BOOST_PLL_H_CON(x) ((x) * 0x4) 30 #define BOOST_CLK_CON 0x0008 31 #define BOOST_BOOST_CON 0x000c 32 #define BOOST_SWITCH_CNT 0x0010 33 #define BOOST_HIGH_PERF_CNT0 0x0014 34 #define BOOST_HIGH_PERF_CNT1 0x0018 35 #define BOOST_STATIS_THRESHOLD 0x001c 36 #define BOOST_SHORT_SWITCH_CNT 0x0020 37 #define BOOST_SWITCH_THRESHOLD 0x0024 38 #define BOOST_FSM_STATUS 0x0028 [all …]
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/linux-6.8/arch/openrisc/mm/ |
D | init.c | 43 unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0 }; in zone_sizes_init() 105 for (j = 0; p < e && j < PTRS_PER_PTE; in map_ram() 119 printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__, in map_ram() 132 for (i = 0; i < PTRS_PER_PGD; i++) in paging_init() 133 swapper_pg_dir[i] = __pgd(0); in paging_init() 155 unsigned long *dtlb_vector = __va(0x900); in paging_init() 156 unsigned long *itlb_vector = __va(0xa00); in paging_init() 179 mtspr(SPR_ICBIR, 0x900); in paging_init() 180 mtspr(SPR_ICBIR, 0xa00); in paging_init() 200 memset((void *)empty_zero_page, 0, PAGE_SIZE); in mem_init()
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/linux-6.8/drivers/bus/ |
D | omap_l3_noc.h | 16 #define CUSTOM_ERROR 0x2 17 #define STANDARD_ERROR 0x0 18 #define INBAND_ERROR 0x0 19 #define L3_APPLICATION_ERROR 0x0 20 #define L3_DEBUG_ERROR 0x1 23 #define L3_TARG_STDERRLOG_MAIN 0x48 24 #define L3_TARG_STDERRLOG_HDR 0x4c 25 #define L3_TARG_STDERRLOG_MSTADDR 0x50 26 #define L3_TARG_STDERRLOG_INFO 0x58 27 #define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c [all …]
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/linux-6.8/include/dt-bindings/clock/ |
D | lpc18xx-ccu.h | 13 #define CLK_APB3_BUS 0x100 14 #define CLK_APB3_I2C1 0x108 15 #define CLK_APB3_DAC 0x110 16 #define CLK_APB3_ADC0 0x118 17 #define CLK_APB3_ADC1 0x120 18 #define CLK_APB3_CAN0 0x128 19 #define CLK_APB1_BUS 0x200 20 #define CLK_APB1_MOTOCON_PWM 0x208 21 #define CLK_APB1_I2C0 0x210 22 #define CLK_APB1_I2S 0x218 [all …]
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