| /linux/arch/m68k/ifpsp060/src/ |
| H A D | pfpsp.S | 42 set _off_bsun, 0x00
43 set _off_snan, 0x04
44 set _off_operr, 0x08
45 set _off_ovfl, 0x0c
46 set _off_unfl, 0x10
47 set _off_dz, 0x14
48 set _off_inex, 0x18
49 set _off_fline, 0x1c
50 set _off_fpu_dis, 0x20
51 set _off_trap, 0x2
[all...] |
| /linux/drivers/media/usb/go7007/ |
| H A D | go7007-priv.h | 20 #define GO7007_BOARDID_MATRIX_II 0
37 #define GO7007_BOARD_HAS_AUDIO (1<<0)
42 #define GO7007_SENSOR_VALID_POLAR (1<<0)
49 #define GO7007_SENSOR_CONFIG_MASK 0x7f
66 #define GO7007_CID_CUSTOM_BASE (V4L2_CID_DETECT_CLASS_BASE + 0x1000)
137 #define GO7007_RATIO_1_1 0
270 ((go)->hpi_ops->write_interrupt)((go), (x)|0x8000, (y))
|
| /linux/Documentation/admin-guide/media/ |
| H A D | cx88-cardlist.rst | 11 :stub-columns: 0
17 * - 0
270 - Geniatech X8000-MT DVBT
|
| /linux/drivers/media/usb/dvb-usb/ |
| H A D | m920x.c | 2 /* DVB USB compliant linux driver for MSI Mega Sky 580 DVB-T USB2.0 receiver
36 ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0), in m920x_read()
39 if (ret < 0) { in m920x_read()
49 return 0; in m920x_read()
55 return usb_control_msg(udev, usb_sndctrlpipe(udev, 0), request, in m920x_write()
57 NULL, 0, 2000); in m920x_write()
66 if (ret != 0) in m920x_write_seq()
72 return 0; in m920x_write_seq()
77 int ret, i, epi, flags = 0; in m920x_init()
78 int adap_enabled[M9206_MAX_ADAPTERS] = { 0 }; in m920x_init()
[all...] |
| /linux/drivers/scsi/ |
| H A D | dc395x.h | 34 #if 0
38 #define NORM_REC_LVL 0
45 #define BIT31 0x80000000
46 #define BIT30 0x40000000
47 #define BIT29 0x20000000
48 #define BIT28 0x10000000
49 #define BIT27 0x08000000
50 #define BIT26 0x04000000
51 #define BIT25 0x02000000
52 #define BIT24 0x0100000
[all...] |
| /linux/sound/isa/msnd/ |
| H A D | msnd_pinnacle.c | 95 snd_msnd_DAPQ(chip, 0); in snd_msnd_eval_dsp_msg()
100 chip->playDMAPos = 0; in snd_msnd_eval_dsp_msg()
111 chip->captureDMAPos = 0; in snd_msnd_eval_dsp_msg()
139 ": DSP message %d 0x%02x\n", in snd_msnd_eval_dsp_msg()
146 dev_dbg(chip->card->dev, LOGNAME ": HIMT message %d 0x%02x\n", in snd_msnd_eval_dsp_msg()
170 head = 0; in snd_msnd_interrupt()
193 while (timeout-- > 0) { in snd_msnd_reset_dsp()
195 return 0; in snd_msnd_reset_dsp()
218 if (snd_msnd_reset_dsp(chip, &info) < 0) { in snd_msnd_probe()
227 "I/O 0 in snd_msnd_probe()
[all...] |
| /linux/drivers/mmc/host/ |
| H A D | via-sdmmc.c | 19 #define PCI_DEVICE_ID_VIA_9530 0x9530
21 #define VIA_CRDR_SDC_OFF 0x200
22 #define VIA_CRDR_DDMA_OFF 0x400
23 #define VIA_CRDR_PCICTRL_OFF 0x600
32 #define VIA_CRDR_PCI_WORK_MODE 0x40
33 #define VIA_CRDR_PCI_DBG_MODE 0x41
39 #define VIA_CRDR_SDCTRL 0x0
40 #define VIA_CRDR_SDCTRL_START 0x01
41 #define VIA_CRDR_SDCTRL_WRITE 0x04
42 #define VIA_CRDR_SDCTRL_SINGLE_WR 0x1
[all...] |
| /linux/drivers/net/phy/ |
| H A D | marvell10g.c | 34 #define MV_PHY_ALASKA_NBT_QUIRK_MASK 0xfffffffe
35 #define MV_PHY_ALASKA_NBT_QUIRK_REV (MARVELL_PHY_ID_88X3310 | 0xa)
40 MV_PMA_FW_VER0 = 0xc011,
41 MV_PMA_FW_VER1 = 0xc012,
42 MV_PMA_21X0_PORT_CTRL = 0xc04a,
44 MV_PMA_21X0_PORT_CTRL_MACTYPE_MASK = 0x7,
45 MV_PMA_21X0_PORT_CTRL_MACTYPE_USXGMII = 0x0,
46 MV_PMA_2180_PORT_CTRL_MACTYPE_DXGMII = 0x1,
47 MV_PMA_2180_PORT_CTRL_MACTYPE_QXGMII = 0x2,
48 MV_PMA_21X0_PORT_CTRL_MACTYPE_5GBASER = 0x
[all...] |
| /linux/arch/arm/boot/dts/st/ |
| H A D | spear13xx.dtsi | 15 #size-cells = <0>;
17 cpu@0 {
20 reg = <0>;
36 reg = < 0xec801000 0x1000 >,
37 < 0xec800100 0x0100 >;
42 interrupts = <0 6 0x04>,
43 <0
[all...] |
| /linux/arch/mips/include/asm/txx9/ |
| H A D | tx4938.h | 19 #define TX4938_REG_BASE 0xffffffffff1f0000UL /* == TX4937_REG_BASE */
21 #define TX4938_REG_BASE 0xff1f0000UL /* == TX4937_REG_BASE */
23 #define TX4938_REG_SIZE 0x00010000 /* == TX4937_REG_SIZE */
26 #define TX4938_NDFMC_REG (TX4938_REG_BASE + 0x5000)
27 #define TX4938_SRAMC_REG (TX4938_REG_BASE + 0x6000)
28 #define TX4938_PCIC1_REG (TX4938_REG_BASE + 0x7000)
29 #define TX4938_SDRAMC_REG (TX4938_REG_BASE + 0x8000)
30 #define TX4938_EBUSC_REG (TX4938_REG_BASE + 0x9000)
31 #define TX4938_DMA_REG(ch) (TX4938_REG_BASE + 0xb00
[all...] |
| /linux/Documentation/devicetree/bindings/soc/ti/ |
| H A D | keystone-navigator-qmss.txt | 27 external link ram entries. If the address is specified as "0"
83 0 : None, i.e interrupt on list full only
123 queue-range = <0 0x4000>;
124 linkram0 = <0x100000 0x8000>;
125 linkram1 = <0x0 0x10000>;
132 managed-queues = <0
[all...] |
| /linux/arch/powerpc/boot/dts/fsl/ |
| H A D | mpc8568si-post.dtsi | 39 interrupts = <19 2 0 0>;
40 sleep = <&pmc 0x08000000>;
43 /* controller at 0x8000 */
47 interrupts = <24 0x2 0 0>;
48 bus-range = <0 0xf
[all...] |
| /linux/arch/arm64/boot/dts/marvell/mmp/ |
| H A D | pxa1908.dtsi | 16 #size-cells = <0>;
18 cpu0: cpu@0 {
21 reg = <0 0>;
28 reg = <0 1>;
35 reg = <0 2>;
42 reg = <0 3>;
77 reg = <0 0xc0010000 0
[all...] |
| /linux/arch/arm64/boot/dts/broadcom/bcmbca/ |
| H A D | bcm6858.dtsi | 18 #size-cells = <0>;
20 B53_0: cpu@0 {
23 reg = <0x0 0x0>;
31 reg = <0x0 0x1>;
39 reg = <0x0 0x2>;
47 reg = <0x0 0x
[all...] |
| H A D | bcm63158.dtsi | 19 #size-cells = <0>;
21 B53_0: cpu@0 {
24 reg = <0x0 0x0>;
32 reg = <0x0 0x1>;
40 reg = <0x0 0x2>;
48 reg = <0x0 0x
[all...] |
| /linux/sound/mips/ |
| H A D | hal2.h | 15 #define H2_ISR_TSTATUS 0x01 /* RO: transaction status 1=busy */
16 #define H2_ISR_USTATUS 0x02 /* RO: utime status bit 1=armed */
17 #define H2_ISR_QUAD_MODE 0x04 /* codec mode 0=indigo 1=quad */
18 #define H2_ISR_GLOBAL_RESET_N 0x08 /* chip global reset 0=reset */
19 #define H2_ISR_CODEC_RESET_N 0x10 /* codec/synth reset 0=reset */
23 #define H2_REV_AUDIO_PRESENT 0x8000 /* R
[all...] |
| /linux/drivers/net/ethernet/apple/ |
| H A D | mace.h | 47 #define DRTRY 0x80 /* don't retry transmission after collision */
48 #define DXMTFCS 0x08 /* don't append FCS to transmitted frame */
49 #define AUTO_PAD_XMIT 0x01 /* auto-pad short packets on transmission */
52 #define XMTSV 0x80 /* transmit status (i.e. XMTFS) valid */
53 #define UFLO 0x40 /* underflow - xmit fifo ran dry */
54 #define LCOL 0x20 /* late collision (transmission aborted) */
55 #define MORE 0x10 /* 2 or more retries needed to xmit frame */
56 #define ONE 0x08 /* 1 retry needed to xmit frame */
57 #define DEFER 0x04 /* MACE had to defer xmission (enet busy) */
58 #define LCAR 0x0
[all...] |
| /linux/drivers/regulator/ |
| H A D | mt6380-regulator.c | 16 #define MT6380_ALDO_CON_0 0x0000
17 #define MT6380_BTLDO_CON_0 0x0004
18 #define MT6380_COMP_CON_0 0x0008
19 #define MT6380_CPUBUCK_CON_0 0x000C
20 #define MT6380_CPUBUCK_CON_1 0x0010
21 #define MT6380_CPUBUCK_CON_2 0x0014
22 #define MT6380_DDRLDO_CON_0 0x0018
23 #define MT6380_MLDO_CON_0 0x001C
24 #define MT6380_PALDO_CON_0 0x0020
25 #define MT6380_PHYLDO_CON_0 0x002
[all...] |
| /linux/include/uapi/linux/ |
| H A D | mtio.h | 26 #define MTRESET 0 /* +reset drive in case of problems */
93 #define MT_ISUNKNOWN 0x01
94 #define MT_ISQIC02 0x02 /* Generic QIC-02 tape streamer */
95 #define MT_ISWT5150 0x03 /* Wangtek 5150EQ, QIC-150, QIC-02 */
96 #define MT_ISARCHIVE_5945L2 0x04 /* Archive 5945L-2, QIC-24, QIC-02? */
97 #define MT_ISCMSJ500 0x05 /* CMS Jumbo 500 (QIC-02?) */
98 #define MT_ISTDC3610 0x06 /* Tandberg 6310, QIC-24 */
99 #define MT_ISARCHIVE_VP60I 0x07 /* Archive VP60i, QIC-02 */
100 #define MT_ISARCHIVE_2150L 0x08 /* Archive Viper 2150L */
101 #define MT_ISARCHIVE_2060L 0x0
[all...] |
| /linux/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
| H A D | g84.c | 39 nvkm_wr32(device, 0x002600 + (chan->id * 4), chan->ramfc->addr >> 8); in g84_chan_bind()
49 ret = nvkm_gpuobj_new(device, 0x0200, 0, true, chan->inst, &chan->eng); in g84_chan_ramfc_write()
53 ret = nvkm_gpuobj_new(device, 0x4000, 0, false, chan->inst, &chan->pgd); in g84_chan_ramfc_write()
57 ret = nvkm_gpuobj_new(device, 0x1000, 0x400, true, chan->inst, &chan->cache); in g84_chan_ramfc_write()
61 ret = nvkm_gpuobj_new(device, 0x100, 0x100, true, chan->inst, &chan->ramfc); in g84_chan_ramfc_write()
65 ret = nvkm_ramht_new(device, 0x800 in g84_chan_ramfc_write()
[all...] |
| /linux/include/linux/net/intel/libie/ |
| H A D | adminq.h | 29 * struct libie_aqc_get_ver - Used in command get version (direct 0x0001)
57 * (indirect 0x0002)
94 #define LIBIE_AQ_RES_GLBL_SUCCESS 0
110 * request resource ownership (direct 0x0008)
111 * request resource ownership (direct 0x0009)
134 * get function capabilities (indirect 0x000A)
135 * get device capabilities (indirect 0x000B)
148 #define LIBIE_AQC_CAPS_SWITCH_MODE 0x0001
149 #define LIBIE_AQC_CAPS_MNG_MODE 0x0002
150 #define LIBIE_AQC_CAPS_NPAR_ACTIVE 0x000
[all...] |
| /linux/Documentation/devicetree/bindings/mtd/ |
| H A D | atmel-nand.txt | 38 device (always 0)
39 3rd entry: the memory region size (always 0x800000)
67 reg = <0x70000000 0x8000000>;
72 reg = <0xffffc070 0x490>,
73 <0xffffc500 0x100>;
81 reg = <0x10000000 0x1000000
[all...] |
| /linux/drivers/hid/ |
| H A D | hid-wiimote.h | 27 #define WIIPROTO_FLAG_LED1 0x01
28 #define WIIPROTO_FLAG_LED2 0x02
29 #define WIIPROTO_FLAG_LED3 0x04
30 #define WIIPROTO_FLAG_LED4 0x08
31 #define WIIPROTO_FLAG_RUMBLE 0x10
32 #define WIIPROTO_FLAG_ACCEL 0x20
33 #define WIIPROTO_FLAG_IR_BASIC 0x40
34 #define WIIPROTO_FLAG_IR_EXT 0x80
35 #define WIIPROTO_FLAG_IR_FULL 0xc0 /* IR_BASIC | IR_EXT */
36 #define WIIPROTO_FLAG_EXT_PLUGGED 0x010
[all...] |
| /linux/drivers/infiniband/ulp/ipoib/ |
| H A D | ipoib_vlan.c | 116 if (pkey == 0 || pkey == 0x8000) { in __ipoib_vlan_add()
156 return 0; in __ipoib_vlan_add()
288 rc = 0; in ipoib_vlan_delete()
|
| /linux/fs/jfs/ |
| H A D | jfs_filsys.h | 21 #define JFS_UNICODE 0x00000001 /* unicode name */
24 #define JFS_ERR_REMOUNT_RO 0x00000002 /* remount read-only */
25 #define JFS_ERR_CONTINUE 0x00000004 /* continue */
26 #define JFS_ERR_PANIC 0x00000008 /* panic */
30 #define JFS_USRQUOTA 0x00000010
31 #define JFS_GRPQUOTA 0x00000020
34 #define JFS_NOINTEGRITY 0x00000040
37 #define JFS_DISCARD 0x00000080
40 #define JFS_COMMIT 0x00000f00 /* commit option mask */
41 #define JFS_GROUPCOMMIT 0x0000010
[all...] |