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/linux/drivers/net/wireless/broadcom/b43legacy/
H A Dphy.c33 0x4D, 0x4C, 0x4B, 0x4A,
34 0x4A, 0x49, 0x48, 0x47,
35 0x47, 0x4
[all...]
H A Dxmit.c29 switch (plcp->raw[0]) { in b43legacy_plcp_get_bitrate_idx_cck()
30 case 0x0A: in b43legacy_plcp_get_bitrate_idx_cck()
31 return 0; in b43legacy_plcp_get_bitrate_idx_cck()
32 case 0x14: in b43legacy_plcp_get_bitrate_idx_cck()
34 case 0x37: in b43legacy_plcp_get_bitrate_idx_cck()
36 case 0x6E: in b43legacy_plcp_get_bitrate_idx_cck()
47 int base = aphy ? 0 : 4; in b43legacy_plcp_get_bitrate_idx_ofdm()
49 switch (plcp->raw[0] & 0xF) { in b43legacy_plcp_get_bitrate_idx_ofdm()
50 case 0x in b43legacy_plcp_get_bitrate_idx_ofdm()
[all...]
/linux/drivers/regulator/
H A Dqcom_spmi-regulator.c25 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_NONE 0x00
26 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN0 0x01
27 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN1 0x02
28 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN2 0x04
29 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN3 0x08
30 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT 0x10
33 #define SPMI_REGULATOR_PIN_CTRL_HPM_NONE 0x00
34 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN0 0x01
35 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN1 0x02
36 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN2 0x0
[all...]
/linux/drivers/clk/qcom/
H A Dcamcc-sm8450.c50 { 249600000, 2000000000, 0 },
54 { 864000000, 1056000000, 0 },
58 { 864000000, 1075000000, 0 },
64 .l = 0x3e,
65 .alpha = 0x8000,
66 .config_ctl_val = 0x20485699,
67 .config_ctl_hi_val = 0x00182261,
68 .config_ctl_hi1_val = 0x32aa299c,
69 .user_ctl_val = 0x0000840
[all...]
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_processpptables.c80 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0, in check_powerplay_tables()
82 PP_ASSERT_WITH_CODE(state_arrays->ucNumEntries > 0, in check_powerplay_tables()
85 return 0; in check_powerplay_tables()
92 0 != (powerplay_caps & ATOM_VEGA10_PP_PLATFORM_CAP_POWERPLAY), in set_platform_caps()
97 0 != (powerplay_caps & ATOM_VEGA10_PP_PLATFORM_CAP_SBIOSPOWERSOURCE), in set_platform_caps()
102 0 != (powerplay_caps & ATOM_VEGA10_PP_PLATFORM_CAP_HARDWAREDC), in set_platform_caps()
107 0 != (powerplay_caps & ATOM_VEGA10_PP_PLATFORM_CAP_BACO), in set_platform_caps()
112 0 != (powerplay_caps & ATOM_VEGA10_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL), in set_platform_caps()
115 return 0; in set_platform_caps()
132 PP_ASSERT_WITH_CODE((powerplay_table->usThermalControllerOffset != 0), in init_thermal_controller()
[all...]
/linux/Documentation/networking/device_drivers/ethernet/3com/
H A Dvortex.rst91 Where N is a number from 0 to 7. Anything above 3 produces a lot
98 them with option 0x204 you would use::
100 options=0x204,0x204
108 0 10baseT
125 0x8000 Set driver debugging level to 7
126 0x4000 Set driver debugging level to 2
127 0x0400 Enable Wake-on-LAN
128 0x020
[all...]
/linux/drivers/media/usb/gspca/
H A Dsn9c2028.c37 unsigned char to_read; /* length to read. 0 means no reply requested */
46 .priv = 0},
55 .priv = 0},
64 command[0], command[1], command[2], in sn9c2028_command()
69 usb_sndctrlpipe(gspca_dev->dev, 0), in sn9c2028_command()
72 2, 0, gspca_dev->usb_buf, 6, 500); in sn9c2028_command()
73 if (rc < 0) { in sn9c2028_command()
75 gspca_dev->usb_buf[0], rc); in sn9c2028_command()
79 return 0; in sn9c2028_command()
87 usb_rcvctrlpipe(gspca_dev->dev, 0), in sn9c2028_read1()
[all...]
/linux/arch/arm64/boot/dts/apple/
H A Dt600x-die0.dtsi3 * Devices used on die 0 on the Apple T6002 "M1 Ultra" SoC and present on
12 reg = <0x2 0x8e03c000 0x0 0x14000>;
21 reg = <0x2 0x8e100000 0x0 0xc000>,
22 <0x
[all...]
/linux/drivers/media/usb/dvb-usb/
H A Dopera1.c15 #define OPERA_READ_MSG 0
17 #define OPERA_I2C_TUNER 0xd1
19 #define READ_FX2_REG_REQ 0xba
20 #define READ_MAC_ADDR 0x08
21 #define OPERA_WRITE_FX2 0xbb
22 #define OPERA_TUNER_REQ 0xb1
23 #define REG_1F_SYMBOLRATE_BYTE0 0x1f
24 #define REG_20_SYMBOLRATE_BYTE1 0x20
25 #define REG_21_SYMBOLRATE_BYTE2 0x21
27 #define ADDR_B600_VOLTAGE_13V (0x0
[all...]
/linux/drivers/clk/imx/
H A Dclk-imx93.c20 #define PLAT_IMX93 BIT(0)
65 { IMX93_CLK_A55_PERIPH, "a55_periph_root", 0x0000, FAST_SEL, CLK_IS_CRITICAL },
66 { IMX93_CLK_A55_MTR_BUS, "a55_mtr_bus_root", 0x0080, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL },
67 { IMX93_CLK_A55, "a55_alt_root", 0x0100, FAST_SEL, CLK_IS_CRITICAL },
68 { IMX93_CLK_M33, "m33_root", 0x0180, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL },
69 { IMX93_CLK_BUS_WAKEUP, "bus_wakeup_root", 0x0280, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL },
70 { IMX93_CLK_BUS_AON, "bus_aon_root", 0x0300, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL },
71 { IMX93_CLK_WAKEUP_AXI, "wakeup_axi_root", 0x0380, FAST_SEL, CLK_IS_CRITICAL },
72 { IMX93_CLK_SWO_TRACE, "swo_trace_root", 0x0400, LOW_SPEED_IO_SEL, },
73 { IMX93_CLK_M33_SYSTICK, "m33_systick_root", 0x048
[all...]
/linux/drivers/net/ethernet/3com/
H A Dtyphoon.h153 #define TYPHOON_TYPE_MASK 0x07
154 #define TYPHOON_FRAG_DESC 0x00
155 #define TYPHOON_TX_DESC 0x01
156 #define TYPHOON_CMD_DESC 0x02
157 #define TYPHOON_OPT_DESC 0x03
158 #define TYPHOON_RX_DESC 0x04
159 #define TYPHOON_RESP_DESC 0x05
160 #define TYPHOON_OPT_TYPE_MASK 0xf0
161 #define TYPHOON_OPT_IPSEC 0x00
162 #define TYPHOON_OPT_TCP_SEG 0x1
[all...]
/linux/sound/soc/codecs/
H A Drt700-sdw.c25 case 0x00e0: in rt700_readable_register()
26 case 0x00f0: in rt700_readable_register()
27 case 0x2000 ... 0x200e: in rt700_readable_register()
28 case 0x2012 ... 0x2016: in rt700_readable_register()
29 case 0x201a ... 0x2027: in rt700_readable_register()
30 case 0x2029 ... 0x202 in rt700_readable_register()
[all...]
/linux/tools/testing/selftests/kvm/include/arm64/
H A Dgic_v3.h13 #define GICD_CTLR 0x0000
14 #define GICD_TYPER 0x0004
15 #define GICD_IIDR 0x0008
16 #define GICD_TYPER2 0x000C
17 #define GICD_STATUSR 0x0010
18 #define GICD_SETSPI_NSR 0x0040
19 #define GICD_CLRSPI_NSR 0x0048
20 #define GICD_SETSPI_SR 0x0050
21 #define GICD_CLRSPI_SR 0x0058
22 #define GICD_IGROUPR 0x008
[all...]
/linux/arch/arm/boot/dts/synaptics/
H A Dberlin2q.dtsi22 #size-cells = <0>;
25 cpu0: cpu@0 {
29 reg = <0>;
113 #clock-cells = <0>;
122 ranges = <0 0xf7000000 0x1000000>;
127 reg = <0xab0000 0x200>;
136 reg = <0xab080
[all...]
/linux/drivers/net/wireless/marvell/libertas/
H A Dhost.h15 #define CMD_OPTION_WAITFORRSP 0x0002
23 #define CMD_RET(cmd) (0x8000 | cmd)
26 #define CMD_RET_802_11_ASSOCIATE 0x8012
29 #define CMD_GET_HW_SPEC 0x0003
30 #define CMD_EEPROM_UPDATE 0x0004
31 #define CMD_802_11_RESET 0x0005
32 #define CMD_802_11_SCAN 0x0006
33 #define CMD_802_11_GET_LOG 0x000b
34 #define CMD_MAC_MULTICAST_ADR 0x001
[all...]
/linux/arch/powerpc/perf/
H A Dppc970-pmu.c18 #define PM_PMC_MSK 0xf
20 #define PM_UNIT_MSK 0xf
25 #define PM_PMCSEL_MSK 0xf
28 #define PM_NONE 0
45 #define MMCR_PMCSEL_MSK 0x1f
92 * 48-49: SPCSEL value 0x3_0000_0000_0000
95 * 46-47: TTM0SEL value (0=FPU, 2=IFU, 3=VPU) 0xC000_0000_0000
98 * 44-45: TTM1SEL value (0=IDU, 3=STS) 0x3000_0000_000
[all...]
/linux/drivers/scsi/
H A Dsun3_scsi.c91 #define UDC_MODE 0x38
92 #define UDC_CSR 0x2e /* command/status */
93 #define UDC_CHN_HI 0x26 /* chain high word */
94 #define UDC_CHN_LO 0x22 /* chain lo word */
95 #define UDC_CURA_HI 0x1a /* cur reg A high */
96 #define UDC_CURA_LO 0x0a /* cur reg A low */
97 #define UDC_CURB_HI 0x12 /* cur reg B high */
98 #define UDC_CURB_LO 0x02 /* cur reg B low */
99 #define UDC_MODE_HI 0x56 /* mode reg high */
100 #define UDC_MODE_LO 0x5
[all...]
/linux/drivers/clk/uniphier/
H A Dclk-uniphier-sys.c29 UNIPHIER_CLK_GATE("nand", (idx), "nand-50m", 0x2104, 2)
33 UNIPHIER_CLK_GATE("nand", (idx), "nand-50m", 0x2104, 2)
37 UNIPHIER_CLK_GATE("nand", (idx), "nand-50m", 0x210c, 0)
43 UNIPHIER_CLK_GATE("emmc", (idx), NULL, 0x210c, 2)
46 UNIPHIER_CLK_GATE("stdmac", (idx), NULL, 0x2104, 10)
49 UNIPHIER_CLK_GATE("stdmac", (idx), NULL, 0x210c, 8)
52 UNIPHIER_CLK_GATE("hsc", (idx), NULL, 0x210c, 9)
55 UNIPHIER_CLK_GATE("gio", (idx), NULL, 0x2104, 6)
58 UNIPHIER_CLK_GATE("usb3" #ch, (idx), NULL, 0x210
[all...]
/linux/arch/csky/kernel/
H A Dptrace.c31 #define TRACE_MODE_RUN 0
32 #define TRACE_MODE_MASK ~(0x3 << 14)
97 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &regs, 0, -1); in gpr_set()
101 /* BIT(0) of regs.sr is Condition Code/Carry bit */ in gpr_set()
102 regs.sr = (regs.sr & BIT(0)) | (task_pt_regs(target)->sr & ~BIT(0)); in gpr_set()
110 return 0; in gpr_set()
123 for (i = 0; i < 16; i++) { in fpr_get()
128 for (i = 0; i < 32; i++) in fpr_get()
149 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tmp, 0, in fpr_set()
[all...]
/linux/drivers/media/i2c/
H A Dmt9v011.c22 module_param(debug, int, 0);
23 MODULE_PARM_DESC(debug, "Debug level (0-2)");
25 #define R00_MT9V011_CHIP_VERSION 0x00
26 #define R01_MT9V011_ROWSTART 0x01
27 #define R02_MT9V011_COLSTART 0x02
28 #define R03_MT9V011_HEIGHT 0x03
29 #define R04_MT9V011_WIDTH 0x04
30 #define R05_MT9V011_HBLANK 0x05
31 #define R06_MT9V011_VBLANK 0x06
32 #define R07_MT9V011_OUT_CTRL 0x0
[all...]
/linux/arch/x86/include/asm/
H A Dperf_event.h17 #define MSR_ARCH_PERFMON_PERFCTR0 0xc1
18 #define MSR_ARCH_PERFMON_PERFCTR1 0xc2
20 #define MSR_ARCH_PERFMON_EVENTSEL0 0x186
21 #define MSR_ARCH_PERFMON_EVENTSEL1 0x187
23 #define ARCH_PERFMON_EVENTSEL_EVENT 0x000000FFULL
24 #define ARCH_PERFMON_EVENTSEL_UMASK 0x0000FF00ULL
33 #define ARCH_PERFMON_EVENTSEL_CMASK 0xFF000000ULL
36 #define ARCH_PERFMON_EVENTSEL_UMASK2 (0xFFULL << 40)
38 #define INTEL_FIXED_BITS_MASK 0xFULL
40 #define INTEL_FIXED_0_KERNEL (1ULL << 0)
[all...]
/linux/sound/sh/
H A Daica.c62 .end = SPU_MEMORY_BASE + 0x200000 - 1,
71 time_count = 0; in spu_write_wait()
73 if (!(readl(G2_FIFO) & 0x11)) in spu_write_wait()
77 if (time_count > 0x10000) { in spu_write_wait()
91 for (i = 0; i < length; i++) { in spu_memset()
111 for (i = 0; i < length; i++) { in spu_memload()
136 for (i = 0; i < 64; i++) { in spu_disable()
138 regval = readl(SPU_REGISTER_BASE + (i * 0x80)); in spu_disable()
139 regval = (regval & ~0x4000) | 0x800 in spu_disable()
[all...]
/linux/arch/arm/mach-omap2/
H A Dsleep34xx.S26 #define SDRC_SCRATCHPAD_SEM_OFFS 0xc
40 #define SCRATCHPAD_MEM_OFFS 0x310
74 mov r1, #0x1
93 mov r1, #0 @ set task id for ROM code in r1
95 mov r6, #0xff
135 * 0 - No context lost
147 cmp r0, #0x0 @ If no context save required,
171 mrc p15, 0, r0, c1, c0, 0
173 mcr p15, 0, r
[all...]
/linux/drivers/net/wan/
H A Dn2.c45 #define MAX_RAM_SIZE 0x80000 /* 512 KB */
50 #define N2_IOPORTS 0x10
60 #define N2_PCR 0
71 #define WIN16K 0x00
72 #define WIN32K 0x20
73 #define WIN64K 0x40
74 #define PSR_WINBITS 0x60
75 #define PSR_DMAEN 0x80
76 #define PSR_PAGEBITS 0x0F
80 #define CLOCK_OUT_PORT1 0x8
[all...]
/linux/drivers/gpu/drm/gma500/
H A Dpsb_drv.h31 #define DRIVER_MINOR 0
32 #define DRIVER_PATCHLEVEL 0
37 #define IS_PSB(drm) ((to_pci_dev((drm)->dev)->device & 0xfffe) == 0x8108)
38 #define IS_MRST(drm) ((to_pci_dev((drm)->dev)->device & 0xfff0) == 0x4100)
39 #define IS_CDV(drm) ((to_pci_dev((drm)->dev)->device & 0xfff0) == 0x0be0)
42 #define PSB_VDC_OFFSET 0x00000000
43 #define PSB_VDC_SIZE 0x00008000
[all...]

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