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Searched +full:0 +full:x40050000 (Results 1 – 14 of 14) sorted by relevance

/linux/Documentation/devicetree/bindings/input/ !
H A Dlpc32xx-key.txt25 reg = <0x40050000 0x1000>;
33 linux,keymap = <0x00000002>;
/linux/Documentation/devicetree/bindings/timer/ !
H A Dsprd,sc9860-timer.yaml63 reg = <0 0x40050000 0 0x20>;
/linux/Documentation/devicetree/bindings/media/xilinx/ !
H A Dxlnx,v-tpg.txt22 The TPG has a single output port numbered 0.
40 reg = <0x40050000 0x10000>;
48 #size-cells = <0>;
50 port@0 {
51 reg = <0>;
/linux/Documentation/devicetree/bindings/clock/ !
H A Dnxp,lpc1850-cgu.yaml38 specific LPC part. Base clocks are numbered from 0 to 27.
41 0 BASE_SAFE_CLK Base safe clock (always on) for WWDT
47 and APB peripheral blocks #0 and #2
95 reg = <0x40050000 0x1000>;
/linux/arch/m68k/fpsp040/ !
H A Dget_op.S9 | determines the opclass (0, 2, or 3) and branches to the
17 | - For unnormalized numbers (opclass 0, 2, or 3) the
23 | - For denormalized numbers (opclass 0 or 2) the number(s) is not
71 .long 0x40000000,0xc90fdaa2,0x2168c235 |pi
73 .long 0x40000000,0xc90fdaa2,0x2168c234 |pi
75 .long 0x40000000,0xc90fdaa2,0x2168c235 |pi
79 .long 0x3ffd0000,0x9a209a84,0xfbcff798 |log10(2)
80 .long 0x40000000,0xadf85458,0xa2bb4a9a |e
81 .long 0x3fff0000,0xb8aa3b29,0x5c17f0bc |log2(e)
82 .long 0x3ffd0000,0xde5bd8a9,0x37287195 |log10(e)
[all …]
/linux/arch/arm64/boot/dts/sprd/ !
H A Dwhale2.dtsi23 reg = <0 0x20210000 0 0x10000>;
28 reg = <0 0x402b0000 0 0x10000>;
33 reg = <0 0x402e0000 0 0x10000>;
38 reg = <0 0x40400000 0 0x10000>;
43 reg = <0 0x415e0000 0 0x1000000>;
48 reg = <0 0x61100000 0 0x10000>;
53 reg = <0 0x62100000 0 0x10000>;
58 reg = <0 0x63100000 0 0x10000>;
63 reg = <0 0x70b00000 0 0x40000>;
70 ranges = <0 0x0 0x70000000 0x10000000>;
[all …]
/linux/arch/arm/boot/dts/nxp/lpc/ !
H A Dlpc32xx.dtsi20 #size-cells = <0>;
22 cpu@0 {
25 reg = <0x0>;
32 #clock-cells = <0>;
39 #clock-cells = <0>;
49 ranges = <0x00000000 0x00000000 0x10000000>,
50 <0x20000000 0x20000000 0x30000000>,
51 <0xe0000000 0xe0000000 0x04000000>;
55 reg = <0x08000000 0x20000>;
59 ranges = <0x00000000 0x08000000 0x20000>;
[all …]
/linux/arch/arm/mach-lpc32xx/ !
H A Dlpc32xx.h17 * AHB 0 physical base addresses
19 #define LPC32XX_SLC_BASE 0x20020000
20 #define LPC32XX_SSP0_BASE 0x20084000
21 #define LPC32XX_SPI1_BASE 0x20088000
22 #define LPC32XX_SSP1_BASE 0x2008C000
23 #define LPC32XX_SPI2_BASE 0x20090000
24 #define LPC32XX_I2S0_BASE 0x20094000
25 #define LPC32XX_SD_BASE 0x20098000
26 #define LPC32XX_I2S1_BASE 0x2009C000
27 #define LPC32XX_MLC_BASE 0x200A8000
[all …]
/linux/arch/arm/boot/dts/nxp/vf/ !
H A Dvfxxx.dtsi33 #clock-cells = <0>;
39 #clock-cells = <0>;
46 offset = <0x0>;
47 mask = <0x1000>;
66 reg = <0x40000000 0x00070000>;
71 reg = <0x40001000 0x800>;
76 reg = <0x40001800 0x400>;
85 reg = <0x40018000 0x2000>,
86 <0x40024000 0x1000>,
87 <0x40025000 0x1000>;
[all …]
/linux/arch/m68k/ifpsp060/ !
H A Dfpsp.sa1 .long 0x60ff0000,0x17400000,0x60ff0000,0x15f40000
2 .long 0x60ff0000,0x02b60000,0x60ff0000,0x04700000
3 .long 0x60ff0000,0x1b100000,0x60ff0000,0x19aa0000
4 .long 0x60ff0000,0x1b5a0000,0x60ff0000,0x062e0000
5 .long 0x60ff0000,0x102c0000,0x51fc51fc,0x51fc51fc
6 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
7 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
8 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
9 .long 0x2f00203a,0xff2c487b,0x0930ffff,0xfef8202f
10 .long 0x00044e74,0x00042f00,0x203afef2,0x487b0930
[all …]
/linux/arch/arm64/boot/dts/st/ !
H A Dstm32mp251.dtsi18 #size-cells = <0>;
20 cpu0: cpu@0 {
23 reg = <0>;
39 arm,smc-id = <0xb200005a>;
45 #clock-cells = <0>;
47 clock-frequency = <0>;
51 #clock-cells = <0>;
68 #size-cells = <0>;
69 linaro,optee-channel-id = <0>;
72 reg = <0x14>;
[all …]
/linux/arch/m68k/ifpsp060/src/ !
H A Dfpsp.S43 set _off_bsun, 0x00
44 set _off_snan, 0x04
45 set _off_operr, 0x08
46 set _off_ovfl, 0x0c
47 set _off_unfl, 0x10
48 set _off_dz, 0x14
49 set _off_inex, 0x18
50 set _off_fline, 0x1c
51 set _off_fpu_dis, 0x20
52 set _off_trap, 0x24
[all …]
H A Dpfpsp.S42 set _off_bsun, 0x00
43 set _off_snan, 0x04
44 set _off_operr, 0x08
45 set _off_ovfl, 0x0c
46 set _off_unfl, 0x10
47 set _off_dz, 0x14
48 set _off_inex, 0x18
49 set _off_fline, 0x1c
50 set _off_fpu_dis, 0x20
51 set _off_trap, 0x24
[all …]
/linux/drivers/net/wireless/realtek/rtw88/ !
H A Drtw8822c_table.c16 0x83000000, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]