Searched +full:0 +full:x40011000 (Results 1 – 6 of 6) sorted by relevance
87 reg = <0x40011000 0x400>;89 clocks = <&rcc 0 164>;90 dmas = <&dma2 2 4 0x414 0x0>,91 <&dma2 7 4 0x414 0x0>;
54 #clock-cells = <0>;56 clock-frequency = <0>;60 #clock-cells = <0>;66 #clock-cells = <0>;68 clock-frequency = <0>;75 reg = <0x40000c00 0x400>;82 #size-cells = <0>;84 reg = <0x40002400 0x400>;95 trigger@0 {97 reg = <0>;[all …]
53 #clock-cells = <0>;55 clock-frequency = <0>;59 #clock-cells = <0>;65 #clock-cells = <0>;71 #clock-cells = <0>;80 reg = <0x40000000 0x400>;82 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;88 #size-cells = <0>;90 reg = <0x40000000 0x400>;91 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;[all …]
58 #clock-cells = <0>;60 clock-frequency = <0>;64 #clock-cells = <0>;70 #clock-cells = <0>;76 #clock-cells = <0>;78 clock-frequency = <0>;85 reg = <0x1fff7800 0x400>;89 reg = <0x22c 0x2>;92 reg = <0x22e 0x2>;98 reg = <0x40000000 0x400>;[all …]
16 #size-cells = <0>;18 cpu0: cpu@0 {22 reg = <0>;42 reg = <0xa0021000 0x1000>,43 <0xa0022000 0x2000>;57 #clock-cells = <0>;63 #clock-cells = <0>;69 #clock-cells = <0>;75 #clock-cells = <0>;81 #clock-cells = <0>;[all …]
138 0x80000000 | 0xf0000000 | UART0139 0x80004000 | 0xf0004000 | UART1140 0x80008000 | 0xf0008000 | UART2141 0x8000c000 | 0xf000c000 | UART3142 0x80010000 | 0xf0010000 | UART4143 0x80014000 | 0xf0014000 | UART5144 0x80018000 | 0xf0018000 | UART6145 0x8001c000 | 0xf001c000 | UART7146 0x80020000 | 0xf0020000 | UART8147 0x80024000 | 0xf0024000 | UART9[all …]