Searched +full:0 +full:x40001000 (Results 1 – 23 of 23) sorted by relevance
/linux-6.8/Documentation/devicetree/bindings/arm/freescale/ |
D | fsl,vf610-mscm-cpucfg.txt | 13 reg = <0x40001000 0x800>;
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/linux-6.8/Documentation/devicetree/bindings/timer/ |
D | arm,mps2-timer.txt | 18 reg = <0x40000000 0x1000>; 25 reg = <0x40001000 0x1000>;
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/linux-6.8/arch/m68k/configs/ |
D | stmark2_defconfig | 20 CONFIG_RAMBASE=0x40000000 21 CONFIG_RAMSIZE=0x8000000 22 CONFIG_VECTORBASE=0x40000000 23 CONFIG_KERNELBASE=0x40001000
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/linux-6.8/Documentation/devicetree/bindings/pci/ |
D | qcom,pcie-ep.yaml | 187 reg = <0x01c00000 0x3000>, 188 <0x40000000 0xf1d>, 189 <0x40000f20 0xc8>, 190 <0x40001000 0x1000>, 191 <0x40002000 0x1000>, 192 <0x01c03000 0x3000>; 206 qcom,perst-regs = <&tcsr 0xb258 0xb270>;
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/linux-6.8/arch/arm64/boot/dts/qcom/ |
D | sa8540p.dtsi | 181 linux,pci-domain = <0>; 198 reg = <0x0 0x01c10000 0x0 0x3000>, 199 <0x0 0x40000000 0x0 0xf1d>, 200 <0x0 0x40000f20 0x0 0xa8>, 201 <0x0 0x40001000 0x0 0x1000>, 202 <0x0 0x40100000 0x0 0x100000>; 205 ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>, 206 <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1d00000>; 213 interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>, 214 <0 0 0 2 &intc 0 0 GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>, [all …]
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D | sa8775p.dtsi | 25 #clock-cells = <0>; 30 #clock-cells = <0>; 36 #size-cells = <0>; 38 CPU0: cpu@0 { 41 reg = <0x0 0x0>; 43 qcom,freq-domain = <&cpufreq_hw 0>; 61 reg = <0x0 0x100>; 63 qcom,freq-domain = <&cpufreq_hw 0>; 76 reg = <0x0 0x200>; 78 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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D | sc8180x.dtsi | 28 #clock-cells = <0>; 34 #clock-cells = <0>; 42 #size-cells = <0>; 44 CPU0: cpu@0 { 47 reg = <0x0 0x0>; 51 qcom,freq-domain = <&cpufreq_hw 0>; 58 clocks = <&cpufreq_hw 0>; 76 reg = <0x0 0x100>; 80 qcom,freq-domain = <&cpufreq_hw 0>; 87 clocks = <&cpufreq_hw 0>; [all …]
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D | sm8350.dtsi | 37 #clock-cells = <0>; 45 #clock-cells = <0>; 51 #size-cells = <0>; 53 CPU0: cpu@0 { 56 reg = <0x0 0x0>; 57 clocks = <&cpufreq_hw 0>; 60 qcom,freq-domain = <&cpufreq_hw 0>; 80 reg = <0x0 0x100>; 81 clocks = <&cpufreq_hw 0>; 84 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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D | sm8150.dtsi | 32 #clock-cells = <0>; 39 #clock-cells = <0>; 47 #size-cells = <0>; 49 CPU0: cpu@0 { 52 reg = <0x0 0x0>; 53 clocks = <&cpufreq_hw 0>; 58 qcom,freq-domain = <&cpufreq_hw 0>; 60 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 81 reg = <0x0 0x100>; 82 clocks = <&cpufreq_hw 0>; [all …]
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D | sm8450.dtsi | 39 #clock-cells = <0>; 45 #clock-cells = <0>; 52 #size-cells = <0>; 54 CPU0: cpu@0 { 57 reg = <0x0 0x0>; 62 qcom,freq-domain = <&cpufreq_hw 0>; 64 clocks = <&cpufreq_hw 0>; 81 reg = <0x0 0x100>; 86 qcom,freq-domain = <&cpufreq_hw 0>; 88 clocks = <&cpufreq_hw 0>; [all …]
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D | sm8650.dtsi | 38 #clock-cells = <0>; 43 #clock-cells = <0>; 48 #clock-cells = <0>; 57 #clock-cells = <0>; 66 #clock-cells = <0>; 72 #size-cells = <0>; 74 CPU0: cpu@0 { 77 reg = <0 0>; 79 clocks = <&cpufreq_hw 0>; 89 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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D | sm8550.dtsi | 38 #clock-cells = <0>; 43 #clock-cells = <0>; 47 #clock-cells = <0>; 55 #clock-cells = <0>; 64 #clock-cells = <0>; 70 #size-cells = <0>; 72 CPU0: cpu@0 { 75 reg = <0 0>; 76 clocks = <&cpufreq_hw 0>; 81 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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D | sm8250.dtsi | 82 #clock-cells = <0>; 90 #clock-cells = <0>; 96 #size-cells = <0>; 98 CPU0: cpu@0 { 101 reg = <0x0 0x0>; 102 clocks = <&cpufreq_hw 0>; 109 qcom,freq-domain = <&cpufreq_hw 0>; 111 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 117 cache-size = <0x20000>; 123 cache-size = <0x400000>; [all …]
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D | sc7280.dtsi | 80 #clock-cells = <0>; 86 #clock-cells = <0>; 97 reg = <0x0 0x004cd000 0x0 0x1000>; 101 reg = <0x0 0x80000000 0x0 0x600000>; 106 reg = <0x0 0x80600000 0x0 0x200000>; 111 reg = <0x0 0x80800000 0x0 0x60000>; 116 reg = <0x0 0x80860000 0x0 0x20000>; 122 reg = <0x0 0x80884000 0x0 0x10000>; 127 reg = <0x0 0x808ff000 0x0 0x1000>; 132 reg = <0x0 0x80900000 0x0 0x200000>; [all …]
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/linux-6.8/arch/arm/boot/dts/qcom/ |
D | qcom-sdx55.dtsi | 20 qcom,msm-id = <357 0x10000>, <368 0x10000>, <418 0x10000>; 25 reg = <0 0>; 31 #clock-cells = <0>; 38 #clock-cells = <0>; 44 #clock-cells = <0>; 51 #size-cells = <0>; 53 cpu0: cpu@0 { 56 reg = <0x0>; 108 reg = <0x8fc00000 0x80000>; 113 reg = <0x8fc80000 0x40000>; [all …]
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D | qcom-sdx65.dtsi | 20 qcom,msm-id = <458 0x10000>, <483 0x10000>, <509 0x10000>; 25 reg = <0 0>; 33 #clock-cells = <0>; 40 #clock-cells = <0>; 46 #clock-cells = <0>; 52 #size-cells = <0>; 54 cpu0: cpu@0 { 57 reg = <0x0>; 115 reg = <0x8fcad000 0x40000>; 120 reg = <0x8fcfd000 0x1000>; [all …]
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/linux-6.8/drivers/input/touchscreen/ |
D | imagis.c | 14 #define IST3038C_HIB_ACCESS (0x800B << 16) 16 #define IST3038C_REG_CHIPID 0x40001000 17 #define IST3038C_REG_HIB_BASE 0x30000100 19 #define IST3038C_REG_TOUCH_COORD (IST3038C_REG_HIB_BASE | IST3038C_HIB_ACCESS | 0x8) 20 #define IST3038C_REG_INTR_MESSAGE (IST3038C_REG_HIB_BASE | IST3038C_HIB_ACCESS | 0x4) 21 #define IST3038C_WHOAMI 0x38c 27 #define IST3038C_Y_MASK GENMASK(11, 0) 32 #define IST3038C_FINGER_STATUS_MASK GENMASK(9, 0) 49 .flags = 0, in imagis_i2c_read_reg() 67 return 0; in imagis_i2c_read_reg() [all …]
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/linux-6.8/arch/arm/boot/dts/st/ |
D | stm32f746.dtsi | 53 #clock-cells = <0>; 55 clock-frequency = <0>; 59 #clock-cells = <0>; 65 #clock-cells = <0>; 71 #clock-cells = <0>; 80 #size-cells = <0>; 82 reg = <0x40000000 0x400>; 83 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>; 102 #size-cells = <0>; 104 reg = <0x40000400 0x400>; [all …]
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D | stm32f429.dtsi | 58 #clock-cells = <0>; 60 clock-frequency = <0>; 64 #clock-cells = <0>; 70 #clock-cells = <0>; 76 #clock-cells = <0>; 78 clock-frequency = <0>; 85 reg = <0x1fff7800 0x400>; 89 reg = <0x22c 0x2>; 92 reg = <0x22e 0x2>; 98 #size-cells = <0>; [all …]
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D | stm32mp131.dtsi | 16 #size-cells = <0>; 18 cpu0: cpu@0 { 21 reg = <0>; 43 #size-cells = <0>; 44 linaro,optee-channel-id = <0>; 47 reg = <0x14>; 52 reg = <0x16>; 57 reg = <0x17>; 61 #size-cells = <0>; 63 scmi_reg11: regulator@0 { [all …]
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D | stm32mp151.dtsi | 16 #size-cells = <0>; 18 cpu0: cpu@0 { 22 reg = <0>; 42 reg = <0xa0021000 0x1000>, 43 <0xa0022000 0x2000>; 57 #clock-cells = <0>; 63 #clock-cells = <0>; 69 #clock-cells = <0>; 75 #clock-cells = <0>; 81 #clock-cells = <0>; [all …]
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/linux-6.8/arch/arm/boot/dts/nxp/vf/ |
D | vfxxx.dtsi | 33 #clock-cells = <0>; 39 #clock-cells = <0>; 46 offset = <0x0>; 47 mask = <0x1000>; 66 reg = <0x40000000 0x00070000>; 71 reg = <0x40001000 0x800>; 76 reg = <0x40001800 0x400>; 85 reg = <0x40018000 0x2000>, 86 <0x40024000 0x1000>, 87 <0x40025000 0x1000>; [all …]
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/linux-6.8/lib/crypto/ |
D | des.c | 31 0x00, 0x00, 0x40, 0x04, 0x10, 0x10, 0x50, 0x14, 32 0x04, 0x40, 0x44, 0x44, 0x14, 0x50, 0x54, 0x54, 33 0x02, 0x02, 0x42, 0x06, 0x12, 0x12, 0x52, 0x16, 34 0x06, 0x42, 0x46, 0x46, 0x16, 0x52, 0x56, 0x56, 35 0x80, 0x08, 0xc0, 0x0c, 0x90, 0x18, 0xd0, 0x1c, 36 0x84, 0x48, 0xc4, 0x4c, 0x94, 0x58, 0xd4, 0x5c, 37 0x82, 0x0a, 0xc2, 0x0e, 0x92, 0x1a, 0xd2, 0x1e, 38 0x86, 0x4a, 0xc6, 0x4e, 0x96, 0x5a, 0xd6, 0x5e, 39 0x20, 0x20, 0x60, 0x24, 0x30, 0x30, 0x70, 0x34, 40 0x24, 0x60, 0x64, 0x64, 0x34, 0x70, 0x74, 0x74, [all …]
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