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/linux-5.10/drivers/net/wireless/realtek/rtw88/
Drtw8822c_table.c16 0x80000015, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]
Drtw8822b_table.c10 0x029, 0x000000F9,
11 0x420, 0x00000080,
12 0x421, 0x0000001F,
13 0x428, 0x0000000A,
14 0x429, 0x00000010,
15 0x430, 0x00000000,
16 0x431, 0x00000000,
17 0x432, 0x00000000,
18 0x433, 0x00000001,
19 0x434, 0x00000004,
[all …]
Drtw8821c_table.c10 0x010, 0x00000043,
11 0x025, 0x0000001D,
12 0x026, 0x000000CE,
13 0x04F, 0x00000001,
14 0x029, 0x000000F9,
15 0x420, 0x00000080,
16 0x421, 0x0000000F,
17 0x428, 0x0000000A,
18 0x429, 0x00000010,
19 0x430, 0x00000000,
[all …]
/linux-5.10/arch/arm64/boot/dts/freescale/
Dfsl-ls2088a.dtsi15 cpu0: cpu@0 {
18 reg = <0x0>;
19 clocks = <&clockgen 1 0>;
28 reg = <0x1>;
29 clocks = <&clockgen 1 0>;
38 reg = <0x100>;
48 reg = <0x101>;
58 reg = <0x200>;
68 reg = <0x201>;
78 reg = <0x300>;
[all …]
Dfsl-ls2080a.dtsi15 cpu0: cpu@0 {
18 reg = <0x0>;
19 clocks = <&clockgen 1 0>;
28 reg = <0x1>;
29 clocks = <&clockgen 1 0>;
38 reg = <0x100>;
48 reg = <0x101>;
58 reg = <0x200>;
68 reg = <0x201>;
78 reg = <0x300>;
[all …]
/linux-5.10/arch/mips/boot/dts/loongson/
Drs780e-pch.dtsi8 ranges = <0 0x10000000 0 0x10000000 0 0x10000000
9 0 0x40000000 0 0x40000000 0 0x40000000
10 0xfd 0xfe000000 0xfd 0xfe000000 0 0x2000000 /* PCI Config Space */>;
18 reg = <0 0x1a000000 0 0x02000000>;
20 ranges = <0x01000000 0 0x00004000 0 0x18004000 0 0x0000c000>,
21 <0x02000000 0 0x40000000 0 0x40000000 0 0x40000000>;
28 ranges = <1 0 0 0x18000000 0x4000>;
32 reg = <1 0x70 0x8>;
39 reg = <1 0x800 0x100>;
Dloongson64v_4core_virtio.dts12 #address-cells = <0>;
22 ranges = <0 0x1fe00000 0 0x1fe00000 0x100000
23 0 0x3ff00000 0 0x3ff00000 0x100000
24 0xefd 0xfb000000 0xefd 0xfb000000 0x10000000>;
28 reg = <0 0x3ff01400 0x64>;
37 loongson,parent_int_map = <0x00000001>, /* int0 */
38 <0xfffffffe>, /* int1 */
39 <0x00000000>, /* int2 */
40 <0x00000000>; /* int3 */
46 reg = <0 0x1fe001e0 0x8>;
[all …]
/linux-5.10/drivers/gpu/drm/msm/adreno/
Da6xx_hfi.c34 return 0; in a6xx_hfi_queue_read()
50 for (i = 0; i < HFI_HEADER_SIZE(hdr); i++) { in a6xx_hfi_queue_read()
78 for (i = 0; i < dwords; i++) { in a6xx_hfi_queue_write()
86 queue->data[index] = 0xfafafafa; in a6xx_hfi_queue_write()
92 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 0x01); in a6xx_hfi_queue_write()
93 return 0; in a6xx_hfi_queue_write()
161 return 0; in a6xx_hfi_wait_for_ack()
172 seqnum = atomic_inc_return(&queue->seqnum) % 0xfff; in a6xx_hfi_send_msg()
190 struct a6xx_hfi_msg_gmu_init_cmd msg = { 0 }; in a6xx_hfi_send_gmu_init()
197 NULL, 0); in a6xx_hfi_send_gmu_init()
[all …]
/linux-5.10/arch/sh/kernel/cpu/sh4a/
Dsetup-sh7757.c30 DEFINE_RES_MEM(0xfe4b0000, 0x100), /* SCIF2 */
31 DEFINE_RES_IRQ(evt2irq(0x700)),
36 .id = 0,
50 DEFINE_RES_MEM(0xfe4c0000, 0x100), /* SCIF3 */
51 DEFINE_RES_IRQ(evt2irq(0xb80)),
70 DEFINE_RES_MEM(0xfe4d0000, 0x100), /* SCIF4 */
71 DEFINE_RES_IRQ(evt2irq(0xf00)),
89 DEFINE_RES_MEM(0xfe430000, 0x20),
90 DEFINE_RES_IRQ(evt2irq(0x580)),
91 DEFINE_RES_IRQ(evt2irq(0x5a0)),
[all …]
/linux-5.10/arch/arm/boot/dts/
Dbcm7445-bcm97445svmb.dts9 memory@0 {
11 reg = <0x00 0x00000000 0x00 0x40000000>,
12 <0x00 0x40000000 0x00 0x40000000>,
13 <0x00 0x80000000 0x00 0x40000000>;
30 flash1.rootfs0@0 {
31 reg = <0x0 0x0 0x0 0x80000000>;
35 reg = <0x0 0x80000000 0x0 0x80000000>;
Dr8a7743-sk-rzg1m.dts26 reg = <0 0x40000000 0 0x40000000>;
31 reg = <2 0x00000000 0 0x40000000>;
57 pinctrl-0 = <&scif0_pins>;
64 pinctrl-0 = <&ether_pins &phy1_pins>;
74 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
/linux-5.10/drivers/gpu/drm/etnaviv/
Dcommon.xml.h7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
43 #define PIPE_ID_PIPE_3D 0x00000000
44 #define PIPE_ID_PIPE_2D 0x00000001
45 #define SYNC_RECIPIENT_FE 0x00000001
46 #define SYNC_RECIPIENT_RA 0x00000005
47 #define SYNC_RECIPIENT_PE 0x00000007
48 #define SYNC_RECIPIENT_DE 0x0000000b
49 #define SYNC_RECIPIENT_BLT 0x00000010
50 #define ENDIAN_MODE_NO_SWAP 0x00000000
[all …]
/linux-5.10/drivers/of/unittest-data/
Dtests-address.dtsi17 ranges = <0x70000000 0x70000000 0x40000000>,
18 <0x00000000 0xd0000000 0x20000000>;
19 dma-ranges = <0x0 0x20000000 0x40000000>;
22 reg = <0x70000000 0x1000>;
28 ranges = <0x0 0x0 0x80000000 0x0 0x100000>;
29 dma-ranges = <0x1 0x0 0x0 0x20 0x0>;
32 reg = <0x0 0x1000 0x0 0x1000>;
40 reg = <0x90000000 0x1000>;
41 ranges = <0x42000000 0x0 0x40000000 0x40000000 0x0 0x10000000>;
42 dma-ranges = <0x42000000 0x0 0x80000000 0x00000000 0x0 0x10000000>,
[all …]
/linux-5.10/drivers/net/wireless/ath/ath9k/
Dar9565_1p1_initvals.h57 {0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
58 {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
59 {0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
60 {0x0001610c, 0x40000000, 0x40000000, 0x40000000, 0x40000000},
61 {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
/linux-5.10/arch/arm64/boot/dts/renesas/
Dr8a77950-ulcb.dts20 reg = <0x0 0x48000000 0x0 0x38000000>;
25 reg = <0x5 0x00000000 0x0 0x40000000>;
30 reg = <0x6 0x00000000 0x0 0x40000000>;
35 reg = <0x7 0x00000000 0x0 0x40000000>;
Dr8a77951-ulcb.dts20 reg = <0x0 0x48000000 0x0 0x38000000>;
25 reg = <0x5 0x00000000 0x0 0x40000000>;
30 reg = <0x6 0x00000000 0x0 0x40000000>;
35 reg = <0x7 0x00000000 0x0 0x40000000>;
48 clock-names = "du.0", "du.1", "du.2", "du.3",
49 "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
/linux-5.10/Documentation/devicetree/bindings/pci/
Dpci-rcar-gen2.txt42 defaults to 1GiB at 0x40000000. Note there are hardware restrictions on the
50 reg = <0x0 0xee090000 0x0 0xc00>,
51 <0x0 0xee080000 0x0 0x1100>;
52 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
55 bus-range = <0 0>;
59 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
60 interrupt-map-mask = <0xff00 0 0 0x7>;
61 interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
62 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
63 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
[all …]
Drcar-pci.txt55 reg = <0 0xfe000000 0 0x80000>;
58 bus-range = <0x00 0xff>;
60 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
61 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
62 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
63 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
64 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000
65 0x42000000 2 0x00000000 2 0x00000000 0 0x40000000>;
66 interrupts = <0 116 4>, <0 117 4>, <0 118 4>;
68 interrupt-map-mask = <0 0 0 0>;
[all …]
Dloongson.yaml57 reg = <0x0 0x1a000000 0x0 0x2000000>;
60 ranges = <0x01000000 0x0 0x00004000 0x0 0x00004000 0x0 0x00004000>,
61 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
/linux-5.10/arch/mips/sgi-ip32/
Dip32-dma.c10 * 1. CPU sees memory as two chunks: 0-256M@0x0, and the rest @0x40000000+256M
11 * 2. PCI sees memory as one big chunk @0x0 (or we could use 0x40000000 for
13 * 3. All other devices see memory as one big chunk at 0x40000000
19 #define RAM_OFFSET_MASK 0x3fffffffUL
/linux-5.10/arch/powerpc/include/asm/
Ddcr-regs.h29 #define DCRN_CPR0_CONFIG_ADDR 0xc
30 #define DCRN_CPR0_CONFIG_DATA 0xd
33 #define DCRN_SDR0_CONFIG_ADDR 0xe
34 #define DCRN_SDR0_CONFIG_DATA 0xf
36 #define SDR0_PFC0 0x4100
37 #define SDR0_PFC1 0x4101
38 #define SDR0_PFC1_EPS 0x1c00000
40 #define SDR0_PFC1_RMII 0x02000000
41 #define SDR0_MFR 0x4300
42 #define SDR0_MFR_TAH0 0x80000000 /* TAHOE0 Enable */
[all …]
Dreg_a2.h13 #define SPRN_TENSR 0x1b5
14 #define SPRN_TENS 0x1b6 /* Thread ENable Set */
15 #define SPRN_TENC 0x1b7 /* Thread ENable Clear */
17 #define SPRN_A2_CCR0 0x3f0 /* Core Configuration Register 0 */
18 #define SPRN_A2_CCR1 0x3f1 /* Core Configuration Register 1 */
19 #define SPRN_A2_CCR2 0x3f2 /* Core Configuration Register 2 */
20 #define SPRN_MMUCR0 0x3fc /* MMU Control Register 0 */
21 #define SPRN_MMUCR1 0x3fd /* MMU Control Register 1 */
22 #define SPRN_MMUCR2 0x3fe /* MMU Control Register 2 */
23 #define SPRN_MMUCR3 0x3ff /* MMU Control Register 3 */
[all …]
/linux-5.10/drivers/net/wireless/broadcom/b43/
Ddma.h19 #define B43_DMA32_TXCTL 0x00
20 #define B43_DMA32_TXENABLE 0x00000001
21 #define B43_DMA32_TXSUSPEND 0x00000002
22 #define B43_DMA32_TXLOOPBACK 0x00000004
23 #define B43_DMA32_TXFLUSH 0x00000010
24 #define B43_DMA32_TXPARITYDISABLE 0x00000800
25 #define B43_DMA32_TXADDREXT_MASK 0x00030000
27 #define B43_DMA32_TXRING 0x04
28 #define B43_DMA32_TXINDEX 0x08
29 #define B43_DMA32_TXSTATUS 0x0C
[all …]
/linux-5.10/drivers/net/ethernet/intel/igb/
De1000_82575.h26 #define E1000_SW_SYNCH_MB 0x00000100
27 #define E1000_STAT_DEV_RST_SET 0x00100000
28 #define E1000_CTRL_DEV_RST 0x20000000
33 #define E1000_SRRCTL_DESCTYPE_ADV_ONEBUF 0x02000000
34 #define E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS 0x0A000000
35 #define E1000_SRRCTL_DROP_EN 0x80000000
36 #define E1000_SRRCTL_TIMESTAMP 0x40000000
39 #define E1000_MRQC_ENABLE_RSS_MQ 0x00000002
40 #define E1000_MRQC_ENABLE_VMDQ 0x00000003
41 #define E1000_MRQC_RSS_FIELD_IPV4_UDP 0x00400000
[all …]
/linux-5.10/drivers/net/usb/
Dsmsc75xx.h12 #define TX_CMD_A_LSO (0x08000000)
13 #define TX_CMD_A_IPE (0x04000000)
14 #define TX_CMD_A_TPE (0x02000000)
15 #define TX_CMD_A_IVTG (0x01000000)
16 #define TX_CMD_A_RVTG (0x00800000)
17 #define TX_CMD_A_FCS (0x00400000)
18 #define TX_CMD_A_LEN (0x000FFFFF)
20 #define TX_CMD_B_MSS (0x3FFF0000)
23 #define TX_CMD_B_VTAG (0x0000FFFF)
26 #define RX_CMD_A_ICE (0x80000000)
[all …]

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