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/linux-5.10/arch/powerpc/boot/
Dcuboot-hotfoot.c26 u32 uart = mfdcr(DCRN_CPC0_UCR) & 0x7f; in hotfoot_fixups()
30 dt_fixup_cpu_clocks(bd.bi_procfreq, bd.bi_procfreq, 0); in hotfoot_fixups()
41 if ((bd.bi_enet1addr[0] == 0) && in hotfoot_fixups()
42 (bd.bi_enet1addr[1] == 0) && in hotfoot_fixups()
43 (bd.bi_enet1addr[2] == 0) && in hotfoot_fixups()
44 (bd.bi_enet1addr[3] == 0) && in hotfoot_fixups()
45 (bd.bi_enet1addr[4] == 0) && in hotfoot_fixups()
46 (bd.bi_enet1addr[5] == 0)) { in hotfoot_fixups()
62 ibm4xx_quiesce_eth((u32 *)0xef600800, (u32 *)0xef600900); in hotfoot_fixups()
65 if (bd.bi_flashsize < 0x800000) { in hotfoot_fixups()
[all …]
/linux-5.10/arch/mips/txx9/rbtx4939/
Dsetup.c40 tx4939_time_init(0); in rbtx4939_time_init()
46 ((((unsigned long)(addr) - IO_BASE) & 0xfff00000) == TXX9_CE(1))
73 c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000); in rbtx4939_pci_setup()
75 tx4927_pcic_setup(tx4939_pcic1ptr, c, 0); in rbtx4939_pci_setup()
83 0x01c0000000007608ULL, /* 64M ROM */
84 0x017f000000007049ULL, /* 1M IOC */
85 0x0180000000408608ULL, /* ISA */
86 0,
95 sp = TX4939_EBUSC_CR(0) & 0x30; in rbtx4939_ebusc_setup()
96 default_ebccr[0] |= sp; in rbtx4939_ebusc_setup()
[all …]
/linux-5.10/drivers/mtd/chips/
Dfwh_lock.h7 FWH_UNLOCKED = 0,
37 if (chip->start < 0x400000) { in fwh_xxlock_oneblock()
38 pr_debug( "MTD %s(): chip->start: %lx wanted >= 0x400000\n", in fwh_xxlock_oneblock()
49 * which is 0 at the start of the chip, and then the offset of in fwh_xxlock_oneblock()
53 adr = (adr & ~0xffffUL) | 0x2; in fwh_xxlock_oneblock()
54 adr += chip->start - 0x400000; in fwh_xxlock_oneblock()
76 return 0; in fwh_xxlock_oneblock()
/linux-5.10/arch/powerpc/kernel/
Dvecemu.c25 0x800000,
26 0x8b95c2,
27 0x9837f0,
28 0xa5fed7,
29 0xb504f3,
30 0xc5672a,
31 0xd744fd,
32 0xeac0c7
45 exp = ((s >> 23) & 0xff) - 127; in eexp2()
48 if (exp == 128 && (s & 0x7fffff) != 0) in eexp2()
[all …]
/linux-5.10/arch/powerpc/boot/dts/fsl/
Dqoriq-fman3l-0.dtsi2 * QorIQ FMan v3 device tree stub [ controller @ offset 0x400000 ]
38 cell-index = <0>;
40 ranges = <0 0x400000 0xfe000>;
41 reg = <0x400000 0xfe000>;
42 interrupts = <96 2 0 0>, <16 2 1 1>;
43 clocks = <&clockgen 3 0>;
45 fsl,qman-channel-range = <0x800 0x10>;
48 muram@0 {
50 reg = <0x0 0x30000>;
54 cell-index = <0x2>;
[all …]
Dqoriq-fman-0.dtsi2 * QorIQ FMan device tree stub [ controller @ offset 0x400000 ]
38 cell-index = <0>;
40 ranges = <0 0x400000 0xfe000>;
41 reg = <0x400000 0xfe000>;
42 interrupts = <96 2 0 0>, <16 2 1 1>;
43 clocks = <&clockgen 3 0>;
45 fsl,qman-channel-range = <0x40 0xc>;
48 muram@0 {
50 reg = <0x0 0x28000>;
54 cell-index = <0x1>;
[all …]
Dqoriq-fman3-0.dtsi2 * QorIQ FMan v3 device tree stub [ controller @ offset 0x400000 ]
38 cell-index = <0>;
40 ranges = <0 0x400000 0xfe000>;
41 reg = <0x400000 0xfe000>;
42 interrupts = <96 2 0 0>, <16 2 1 1>;
43 clocks = <&clockgen 3 0>;
45 fsl,qman-channel-range = <0x800 0x10>;
48 muram@0 {
50 reg = <0x0 0x60000>;
54 cell-index = <0x2>;
[all …]
Dcyrus_p5020.dts30 size = <0 0x1000000>;
31 alignment = <0 0x1000000>;
34 size = <0 0x400000>;
35 alignment = <0 0x400000>;
38 size = <0 0x2000000>;
39 alignment = <0 0x2000000>;
44 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
48 ranges = <0x0 0xf 0xf4000000 0x200000>;
52 ranges = <0x0 0xf 0xf4200000 0x200000>;
56 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
[all …]
/linux-5.10/drivers/misc/habanalabs/include/goya/asic_reg/
Dpsoc_global_conf_masks.h23 #define PSOC_GLOBAL_CONF_NON_RST_FLOPS_VAL_SHIFT 0
24 #define PSOC_GLOBAL_CONF_NON_RST_FLOPS_VAL_MASK 0xFFFFFFFF
27 #define PSOC_GLOBAL_CONF_PCI_FW_FSM_EN_SHIFT 0
28 #define PSOC_GLOBAL_CONF_PCI_FW_FSM_EN_MASK 0x1
31 #define PSOC_GLOBAL_CONF_BOOT_SEQ_RE_START_IND_SHIFT 0
32 #define PSOC_GLOBAL_CONF_BOOT_SEQ_RE_START_IND_MASK 0x1
35 #define PSOC_GLOBAL_CONF_BTM_FSM_STATE_SHIFT 0
36 #define PSOC_GLOBAL_CONF_BTM_FSM_STATE_MASK 0xF
39 #define PSOC_GLOBAL_CONF_SW_BTM_FSM_CTRL_SHIFT 0
40 #define PSOC_GLOBAL_CONF_SW_BTM_FSM_CTRL_MASK 0xF
[all …]
/linux-5.10/arch/arm/boot/dts/
Darmada-370-mirabox.dts20 memory@0 {
22 reg = <0x00000000 0x20000000>; /* 512 MB */
26 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
27 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
28 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
42 pinctrl-0 = <&pwr_led_pin &stat_led_pins>;
52 gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
64 pinctrl-0 = <&ge0_rgmii_pins>;
71 pinctrl-0 = <&ge1_rgmii_pins>;
83 pinctrl-0 = <&sdio_pins3>;
[all …]
Darmada-398-db.dts23 reg = <0x00000000 0x80000000>; /* 2 GB */
27 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
28 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
32 pinctrl-0 = <&i2c0_pins>;
39 pinctrl-0 = <&uart0_pins>;
45 pinctrl-0 = <&uart1_pins>;
62 pcie@1,0 {
66 pcie@2,0 {
70 pcie@3,0 {
79 pinctrl-0 = <&spi1_pins>;
[all …]
Darmada-390-db.dts24 reg = <0x00000000 0x80000000>; /* 2 GB */
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
29 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
38 reg = <0x50>;
62 pcie@1,0 {
67 pcie@2,0 {
72 pcie@3,0 {
81 pinctrl-0 = <&spi1_pins>;
89 reg = <0>; /* Chip select 0 */
97 partition@0 {
[all …]
/linux-5.10/arch/c6x/boot/dts/
Ddsk6455.dts25 reg = <0xE0000000 0x08000000>;
34 flash@3,0 {
38 reg = <0x3 0x0 0x400000>;
41 partition@0 {
42 reg = <0x0 0x400000>;
/linux-5.10/Documentation/devicetree/bindings/c6x/
Demifa.txt35 reg = <0x70000000 0x100>;
36 ranges = <0x2 0x0 0xa0000000 0x00000008
37 0x3 0x0 0xb0000000 0x00400000
38 0x4 0x0 0xc0000000 0x10000000
39 0x5 0x0 0xD0000000 0x10000000>;
43 ti,emifa-ce-config = <0x00240120
44 0x00240120
45 0x00240122
46 0x00240122>;
48 flash@3,0 {
[all …]
/linux-5.10/Documentation/devicetree/bindings/bus/
Dallwinner,sun50i-a64-de2.yaml15 pattern: "^bus(@[0-9a-f]+)?$"
44 "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-fA-F]+$":
67 reg = <0x1000000 0x400000>;
71 ranges = <0 0x1000000 0x400000>;
73 display_clocks: clock@0 {
75 reg = <0x0 0x100000>;
/linux-5.10/tools/perf/tests/
Dhists_common.h12 #define FAKE_MAP_PERF 0x400000
13 #define FAKE_MAP_BASH 0x400000
14 #define FAKE_MAP_LIBC 0x500000
15 #define FAKE_MAP_KERNEL 0xf00000
16 #define FAKE_MAP_LENGTH 0x100000
/linux-5.10/arch/h8300/boot/dts/
Dh8300h_sim.dts19 #clock-cells = <0>;
27 #clock-cells = <0>;
28 reg = <0xfee01b 2>;
34 #clock-cells = <0>;
41 reg = <0x400000 0x400000>;
46 #size-cells = <0>;
47 cpu@0 {
57 reg = <0xfee012 7>;
62 reg = <0xfee01e 8>;
67 reg = <0xffff80 10>;
[all …]
/linux-5.10/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/
Darcx,anybus-controller.txt14 index 0: bus memory area where the cpld registers are located.
21 index 0: interrupt connected to the first host
42 <0> for the first host on the controller
54 controller@0,0 {
56 reg = <0 0 0x100>, <0 0x400000 0x800>, <1 0x400000 0x800>;
61 fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100
62 0x00000000 0xa0000240 0x00000000>;
65 #size-cells = <0>;
66 card@0 {
67 reg = <0>;
/linux-5.10/drivers/mtd/maps/
Dsolutionengine.c24 .size = 0x400000,
30 .size = 0x400000,
38 /* First probe at offset 0 */ in init_soleng_maps()
39 soleng_flash_map.phys = 0; in init_soleng_maps()
40 soleng_flash_map.virt = (void __iomem *)P2SEGADDR(0); in init_soleng_maps()
41 soleng_eprom_map.phys = 0x01000000; in init_soleng_maps()
42 soleng_eprom_map.virt = (void __iomem *)P1SEGADDR(0x01000000); in init_soleng_maps()
46 printk(KERN_NOTICE "Probing for flash chips at 0x00000000:\n"); in init_soleng_maps()
50 printk(KERN_NOTICE "Probing for flash chips at 0x01000000:\n"); in init_soleng_maps()
51 soleng_flash_map.phys = 0x01000000; in init_soleng_maps()
[all …]
/linux-5.10/arch/mips/txx9/rbtx4938/
Dsetup.c54 writeb(0, rbtx4938_pcireset_addr); in rbtx4938_pci_setup()
70 txx9_pci66_check(c, 0, 0)) { in rbtx4938_pci_setup()
72 writeb(0, rbtx4938_pcireset_addr); in rbtx4938_pci_setup()
90 /* PCI1DMD==0 => PCI1CLK==GBUSCLK/2 => PCI66 */ in rbtx4938_pci_setup()
100 c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000); in rbtx4938_pci_setup()
102 tx4927_pcic_setup(tx4938_pcic1ptr, c, 0); in rbtx4938_pci_setup()
112 #define SEEPROM2_CS 0 /* IOC */
115 #define SPI_BUSNO 0
124 /* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */ in rbtx4938_ethaddr_init()
125 if (spi_eeprom_read(SPI_BUSNO, SEEPROM1_CS, 0, dat, sizeof(dat))) { in rbtx4938_ethaddr_init()
[all …]
/linux-5.10/arch/mips/boot/dts/lantiq/
Deasy50712.dts11 memory@0 {
13 reg = <0x0 0x2000000>;
19 localbus@0 {
22 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
23 1 0 0x4000000 0x4000010>; /* addsel1 */
26 nor-boot@0 {
29 reg = <0 0x0 0x2000000>;
33 partition@0 {
35 reg = <0x00000 0x10000>; /* 64 KB */
40 reg = <0x10000 0x10000>; /* 64 KB */
[all …]
/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8mm.dtsi44 #size-cells = <0>;
51 arm,psci-suspend-param = <0x0010033>;
59 A53_0: cpu@0 {
62 reg = <0x0>;
77 reg = <0x1>;
90 reg = <0x2>;
103 reg = <0x3>;
125 opp-supported-hw = <0xe>, <0x7>;
133 opp-supported-hw = <0xc>, <0x7>;
141 opp-supported-hw = <0x8>, <0x3>;
[all …]
Dimx8mq.dtsi46 #clock-cells = <0>;
53 #clock-cells = <0>;
60 #clock-cells = <0>;
67 #clock-cells = <0>;
74 #clock-cells = <0>;
81 #clock-cells = <0>;
88 #clock-cells = <0>;
95 #size-cells = <0>;
97 A53_0: cpu@0 {
100 reg = <0x0>;
[all …]
/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/bif/
Dbif_5_1_sh_mask.h27 #define MM_INDEX__MM_OFFSET_MASK 0x7fffffff
28 #define MM_INDEX__MM_OFFSET__SHIFT 0x0
29 #define MM_INDEX__MM_APER_MASK 0x80000000
30 #define MM_INDEX__MM_APER__SHIFT 0x1f
31 #define MM_INDEX_HI__MM_OFFSET_HI_MASK 0xffffffff
32 #define MM_INDEX_HI__MM_OFFSET_HI__SHIFT 0x0
33 #define MM_DATA__MM_DATA_MASK 0xffffffff
34 #define MM_DATA__MM_DATA__SHIFT 0x0
35 #define BIF_MM_INDACCESS_CNTL__MM_INDACCESS_DIS_MASK 0x2
36 #define BIF_MM_INDACCESS_CNTL__MM_INDACCESS_DIS__SHIFT 0x1
[all …]
/linux-5.10/Documentation/devicetree/bindings/soc/ti/
Dk3-ringacc.yaml85 reg = <0x0 0x3c000000 0x0 0x400000>,
86 <0x0 0x38000000 0x0 0x400000>,
87 <0x0 0x31120000 0x0 0x100>,
88 <0x0 0x33000000 0x0 0x40000>;
91 ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */

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