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/linux-5.10/kernel/bpf/preload/iterators/
Diterators.skel.h124 s->maps[0].name = "iterator.rodata"; in iterators_bpf__create_skeleton()
125 s->maps[0].map = &obj->maps.rodata; in iterators_bpf__create_skeleton()
126 s->maps[0].mmaped = (void **)&obj->rodata; in iterators_bpf__create_skeleton()
135 s->progs[0].name = "dump_bpf_map"; in iterators_bpf__create_skeleton()
136 s->progs[0].prog = &obj->progs.dump_bpf_map; in iterators_bpf__create_skeleton()
137 s->progs[0].link = &obj->links.dump_bpf_map; in iterators_bpf__create_skeleton()
145 \x7f\x45\x4c\x46\x02\x01\x01\0\0\0\0\0\0\0\0\0\x01\0\xf7\0\x01\0\0\0\0\0\0\0\0\ in iterators_bpf__create_skeleton()
146 \0\0\0\0\0\0\0\0\0\0\0\x48\x18\0\0\0\0\0\0\0\0\0\0\x40\0\0\0\0\0\x40\0\x0f\0\ in iterators_bpf__create_skeleton()
147 \x0e\0\x79\x12\0\0\0\0\0\0\x79\x26\0\0\0\0\0\0\x79\x17\x08\0\0\0\0\0\x15\x07\ in iterators_bpf__create_skeleton()
148 \x1a\0\0\0\0\0\x79\x21\x10\0\0\0\0\0\x55\x01\x08\0\0\0\0\0\xbf\xa4\0\0\0\0\0\0\ in iterators_bpf__create_skeleton()
[all …]
/linux-5.10/Documentation/hwmon/
Dw83627hf.rst35 Use 'init=0' to bypass initializing the chip.
56 same pins as GPIO[0:4]. Technically, the `w83627_THF_` does not support a
80 isaset -y -f 0x2e 0x87
81 isaset -y -f 0x2e 0x87
85 isaset -y 0x2e 0x2f 0x07 0x0b
87 # Set the base I/O address (to 0x290 in this example)::
89 isaset -y 0x2e 0x2f 0x60 0x02
90 isaset -y 0x2e 0x2f 0x61 0x90
94 isaset -y -f 0x2e 0xaa
96 The above sequence assumes a Super-I/O config space at 0x2e/0x2f, but
[all …]
Dlm85.rst10 Addresses scanned: I2C 0x2c, 0x2d, 0x2e
18 Addresses scanned: I2C 0x2c, 0x2d, 0x2e
26 Addresses scanned: I2C 0x2c, 0x2d, 0x2e
34 Addresses scanned: I2C 0x2c, 0x2d, 0x2e
42 Addresses scanned: I2C 0x2c, 0x2d, 0x2e
50 Addresses scanned: I2C 0x2c, 0x2d, 0x2e
58 Addresses scanned: I2C 0x2c, 0x2d, 0x2e
66 Addresses scanned: I2C 0x2c, 0x2d, 0x2e
74 Addresses scanned: I2C 0x2c, 0x2d, 0x2e
235 temperature. (PWM value from 0 to 255)
[all …]
Dadt7475.rst10 Addresses scanned: I2C 0x2C, 0x2D, 0x2E
18 Addresses scanned: I2C 0x2E
26 Addresses scanned: I2C 0x2C, 0x2D, 0x2E
34 Addresses scanned: I2C 0x2C, 0x2D, 0x2E
137 fan speed) is applied. PWM values range from 0 (off) to 255 (full speed).
142 At Tmin - hysteresis the PWM output can either be off (0% duty cycle) or at the
144 `pwm[1-*]_stall_disable sysfs attribute`. A value of 0 means the fans will shut
Dadm1031.rst9 Addresses scanned: I2C 0x2c to 0x2e
13 https://www.analog.com/en/prod/0%2C2877%2CADM1030%2C00.html
19 Addresses scanned: I2C 0x2c to 0x2e
23 https://www.analog.com/en/prod/0%2C2877%2CADM1031%2C00.html
Dthmc50.rst10 Addresses scanned: I2C 0x2c - 0x2e
12 Datasheet: http://www.analog.com/en/prod/0,2877,ADM1022,00.html
18 Addresses scanned: I2C 0x2c - 0x2e
81 - fan speed (0 = stop, 255 = full)
83 - always 0 (DC mode)
85 The value of 0 for pwm1 also forces FAN_OFF signal from the chip,
86 so it stops fans even if the value 0 into the ANALOG_OUT register does not.
Dlm87.rst10 Addresses scanned: I2C 0x2c - 0x2e
18 Addresses scanned: I2C 0x2c - 0x2e
20 Datasheet: https://www.analog.com/en/prod/0,2877,ADM1024,00.html
/linux-5.10/tools/perf/pmu-events/arch/x86/bonnell/
Dcache.json3 "EventCode": "0x21",
4 "Counter": "0,1",
5 "UMask": "0x40",
11 "EventCode": "0x22",
12 "Counter": "0,1",
13 "UMask": "0x40",
19 "EventCode": "0x23",
20 "Counter": "0,1",
21 "UMask": "0x40",
27 "EventCode": "0x24",
[all …]
/linux-5.10/crypto/
Dtestmgr.h33 * @ksize: Length of @key in bytes (0 if no key)
101 * @crypt_error: When @novrfy=0, the expected error from encrypt(). When
190 "\x90\xEF\xA0\x0D\xF3\x77\x4A\x25\x9F\x2E\x62\xB4\xC5\xD9\x9C\xB5"
209 "\x5e\x32\x39\x6d\xc1\x1d\x7d\x50\x3b\x9f\x7a\xad\xf0\x2e\x25\x53"
233 "\xD6\x87\x0D\xA2\xC0\x82\xA9\x39\xE3\x7F\xDC\xB8\x2E\xC9\x3E\xDA"
377 "\xA2\xE2\xAC\x78\xF4\x53\x14\xCE\xF7\x19\x2E\xD7\xF7\xE6\x0C\xB9"
453 "\x88\x04\x4A\x78\x62\x18\x2E\xF5\xFB\x9B\xEF\x15\xD8\x16\x47\xC6"
469 "\xAF\x88\x9A\x6F\xCC\x25\x2E\x74\x06\x72\xCE\x9E\xDB\xE0\x9D\x30"
479 "\x42\x46\xCB\x2E\x5E\x2C\xF4\x3A\x32\x77\x77\xED\xAF\xBA\x02\x17"
541 "\xfc\xf4\xc5\x01\xe8\x00\x70\x4d\x28\x26\xcc\x2e\xfe\x0e\x58\x41"
[all …]
/linux-5.10/drivers/net/ieee802154/
Dat86rf230.h15 #define RG_TRX_STATUS (0x01)
16 #define SR_TRX_STATUS 0x01, 0x1f, 0
17 #define SR_RESERVED_01_3 0x01, 0x20, 5
18 #define SR_CCA_STATUS 0x01, 0x40, 6
19 #define SR_CCA_DONE 0x01, 0x80, 7
20 #define RG_TRX_STATE (0x02)
21 #define SR_TRX_CMD 0x02, 0x1f, 0
22 #define SR_TRAC_STATUS 0x02, 0xe0, 5
23 #define RG_TRX_CTRL_0 (0x03)
24 #define SR_CLKM_CTRL 0x03, 0x07, 0
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/linux-5.10/drivers/net/wireless/mediatek/mt76/mt76x0/
Dinitvals_phy.h12 { MT_RF(0, 1), 0x01 },
13 { MT_RF(0, 2), 0x11 },
15 { MT_RF(0, 3), 0x73 }, /* VCO Freq Cal */
16 { MT_RF(0, 4), 0x30 }, /* R4 b<7>=1, VCO cal */
17 { MT_RF(0, 5), 0x00 },
18 { MT_RF(0, 6), 0x41 },
19 { MT_RF(0, 7), 0x00 },
20 { MT_RF(0, 8), 0x00 },
21 { MT_RF(0, 9), 0x00 },
22 { MT_RF(0, 10), 0x0C },
[all …]
/linux-5.10/drivers/staging/media/meson/vdec/
Dcodec_h264.c15 #define SIZE_WORKSPACE 0x1ee000
22 #define WORKSPACE_BUF_OFFSET 0x1000000
25 #define CMD_MASK GENMASK(7, 0)
43 #define PIC_STRUCT_MASK GENMASK(2, 0)
44 #define BUF_IDX_MASK GENMASK(4, 0)
47 #define OFFSET_MASK GENMASK(15, 0)
51 #define MB_TOTAL_MASK GENMASK(15, 0)
52 #define MB_WIDTH_MASK GENMASK(7, 0)
54 #define MAX_REF_MASK GENMASK(6, 0)
56 #define AR_IDC_MASK GENMASK(7, 0)
[all …]
/linux-5.10/drivers/media/dvb-frontends/
Dstv0900_init.h24 { 0, 11101 }, /*C/N=-0dB*/
83 { -5, 0xCAA1 }, /*-5dBm*/
84 { -10, 0xC229 }, /*-10dBm*/
85 { -15, 0xBB08 }, /*-15dBm*/
86 { -20, 0xB4BC }, /*-20dBm*/
87 { -25, 0xAD5A }, /*-25dBm*/
88 { -30, 0xA298 }, /*-30dBm*/
89 { -35, 0x98A8 }, /*-35dBm*/
90 { -40, 0x8389 }, /*-40dBm*/
91 { -45, 0x59BE }, /*-45dBm*/
[all …]
Ds5h1432.c40 } while (0)
48 struct i2c_msg msg = {.addr = addr, .flags = 0, .buf = buf, .len = 2 }; in s5h1432_writereg()
53 printk(KERN_ERR "%s: writereg error 0x%02x 0x%02x 0x%04x, ret == %i)\n", in s5h1432_writereg()
56 return (ret != 1) ? -1 : 0; in s5h1432_writereg()
63 u8 b1[] = { 0 }; in s5h1432_readreg()
66 {.addr = addr, .flags = 0, .buf = b0, .len = 1}, in s5h1432_readreg()
75 return b1[0]; in s5h1432_readreg()
80 return 0; in s5h1432_sleep()
88 u8 reg = 0; in s5h1432_set_channel_bandwidth()
90 /* Register [0x2E] bit 3:2 : 8MHz = 0; 7MHz = 1; 6MHz = 2 */ in s5h1432_set_channel_bandwidth()
[all …]
/linux-5.10/drivers/media/i2c/
Dsaa7110.c33 module_param(debug, int, 0);
34 MODULE_PARM_DESC(debug, "Debug level (0-1)");
39 #define SAA7110_NR_REG 0x35
97 if (ret < 0) in saa7110_write_block()
116 #define FRESP_06H_COMPST 0x03 /*0x13*/
117 #define FRESP_06H_SVIDEO 0x83 /*0xC0*/
123 /* mode 0 */ in saa7110_selmux()
124 {FRESP_06H_COMPST, 0xD9, 0x17, 0x40, 0x03, in saa7110_selmux()
125 0x44, 0x75, 0x16}, in saa7110_selmux()
127 {FRESP_06H_COMPST, 0xD8, 0x17, 0x40, 0x03, in saa7110_selmux()
[all …]
/linux-5.10/drivers/usb/misc/sisusbvga/
Dsisusb_tables.h58 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
59 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
60 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
61 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
62 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
63 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
64 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
65 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F
69 0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15,
70 0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15,
[all …]
/linux-5.10/arch/arm64/boot/dts/sprd/
Dwhale2.dtsi24 reg = <0 0x20210000 0 0x10000>;
29 reg = <0 0x402b0000 0 0x10000>;
34 reg = <0 0x402e0000 0 0x10000>;
39 reg = <0 0x40400000 0 0x10000>;
44 reg = <0 0x415e0000 0 0x1000000>;
49 reg = <0 0x61100000 0 0x10000>;
54 reg = <0 0x62100000 0 0x10000>;
59 reg = <0 0x63100000 0 0x10000>;
64 reg = <0 0x70b00000 0 0x40000>;
71 ranges = <0 0x0 0x70000000 0x10000000>;
[all …]
/linux-5.10/sound/soc/codecs/
Dtas571x.h12 #define TAS571X_CLK_CTRL_REG 0x00
13 #define TAS571X_DEV_ID_REG 0x01
14 #define TAS571X_ERR_STATUS_REG 0x02
15 #define TAS571X_SYS_CTRL_1_REG 0x03
16 #define TAS571X_SDI_REG 0x04
17 #define TAS571X_SDI_FMT_MASK 0x0f
19 #define TAS571X_SYS_CTRL_2_REG 0x05
20 #define TAS571X_SYS_CTRL_2_SDN_MASK 0x40
22 #define TAS571X_SOFT_MUTE_REG 0x06
23 #define TAS571X_SOFT_MUTE_CH1_SHIFT 0
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/linux-5.10/drivers/regulator/
Dpv88080-regulator.h11 #define PV88080_REG_EVENT_A 0x04
12 #define PV88080_REG_MASK_A 0x09
13 #define PV88080_REG_MASK_B 0x0A
14 #define PV88080_REG_MASK_C 0x0B
17 #define PV88080AA_REG_HVBUCK_CONF1 0x2D
18 #define PV88080AA_REG_HVBUCK_CONF2 0x2E
19 #define PV88080AA_REG_BUCK1_CONF0 0x27
20 #define PV88080AA_REG_BUCK1_CONF1 0x28
21 #define PV88080AA_REG_BUCK1_CONF2 0x59
22 #define PV88080AA_REG_BUCK1_CONF5 0x5C
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Dhi655x-regulator.c74 unsigned int value = 0; in hi655x_is_enabled()
151 HI655X_LDO_LINEAR(LDO2, 0x72, 0x07, 0x29, 0x2a, 0x2b, 0x01,
153 HI655X_LDO(LDO7, 0x78, 0x07, 0x29, 0x2a, 0x2b, 0x06, ldo7_voltages),
154 HI655X_LDO(LDO10, 0x78, 0x07, 0x29, 0x2a, 0x2b, 0x01, ldo7_voltages),
155 HI655X_LDO_LINEAR(LDO13, 0x7e, 0x07, 0x2c, 0x2d, 0x2e, 0x04,
157 HI655X_LDO_LINEAR(LDO14, 0x7f, 0x07, 0x2c, 0x2d, 0x2e, 0x05,
159 HI655X_LDO_LINEAR(LDO15, 0x80, 0x07, 0x2c, 0x2d, 0x2e, 0x06,
161 HI655X_LDO_LINEAR(LDO17, 0x82, 0x07, 0x2f, 0x30, 0x31, 0x00,
163 HI655X_LDO(LDO19, 0x84, 0x07, 0x2f, 0x30, 0x31, 0x02, ldo19_voltages),
164 HI655X_LDO_LINEAR(LDO21, 0x86, 0x07, 0x2f, 0x30, 0x31, 0x04,
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/linux-5.10/drivers/watchdog/
Dibmasr.c37 #define TOPAZ_ASR_TOGGLE 0x40
38 #define TOPAZ_ASR_DISABLE 0x80
41 #define PEARL_BASE 0xe04
42 #define PEARL_WRITE 0xe06
43 #define PEARL_READ 0xe07
45 #define PEARL_ASR_DISABLE_MASK 0x80 /* bit 7: disable = 1, enable = 0 */
46 #define PEARL_ASR_TOGGLE_MASK 0x40 /* bit 6: 0, then 1, then 0 */
49 #define JASPER_ASR_REG_OFFSET 0x38
51 #define JASPER_ASR_DISABLE_MASK 0x01 /* bit 0: disable = 1, enable = 0 */
52 #define JASPER_ASR_TOGGLE_MASK 0x02 /* bit 1: 0, then 1, then 0 */
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/linux-5.10/Documentation/devicetree/bindings/mmc/
Dsdhci-sprd.txt23 - pinctrl-0: should contain default/high speed pin control
47 reg = <0 0x20600000 0 0x1000>;
57 pinctrl-0 = <&sd0_pins_default>;
60 sprd,phy-delay-sd-uhs-sdr104 = <0x3f 0x7f 0x2e 0x2e>;
/linux-5.10/drivers/staging/fbtft/
Dfb_ili9486.c22 -1, 0xb0, 0x0,
26 -1, MIPI_DCS_SET_PIXEL_FORMAT, 0x55,
28 -1, 0xC2, 0x44,
30 -1, 0xC5, 0x00, 0x00, 0x00, 0x00,
32 -1, 0xE0, 0x0F, 0x1F, 0x1C, 0x0C, 0x0F, 0x08, 0x48, 0x98,
33 0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x00,
35 -1, 0xE1, 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
36 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00,
38 -1, 0xE2, 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
39 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00,
[all …]
/linux-5.10/include/video/
Dmipi_display.h15 MIPI_DSI_V_SYNC_START = 0x01,
16 MIPI_DSI_V_SYNC_END = 0x11,
17 MIPI_DSI_H_SYNC_START = 0x21,
18 MIPI_DSI_H_SYNC_END = 0x31,
20 MIPI_DSI_COMPRESSION_MODE = 0x07,
21 MIPI_DSI_END_OF_TRANSMISSION = 0x08,
23 MIPI_DSI_COLOR_MODE_OFF = 0x02,
24 MIPI_DSI_COLOR_MODE_ON = 0x12,
25 MIPI_DSI_SHUTDOWN_PERIPHERAL = 0x22,
26 MIPI_DSI_TURN_ON_PERIPHERAL = 0x32,
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/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
Dtiming.c33 u32 timing = 0; in nvbios_timingTe()
43 *ver = nvbios_rd08(bios, timing + 0); in nvbios_timingTe()
45 case 0x10: in nvbios_timingTe()
49 *snr = 0; in nvbios_timingTe()
50 *ssz = 0; in nvbios_timingTe()
52 case 0x20: in nvbios_timingTe()
65 return 0; in nvbios_timingTe()
81 return 0; in nvbios_timingEe()
92 case 0x10: in nvbios_timingEp()
93 p->timing_10_WR = nvbios_rd08(bios, data + 0x00); in nvbios_timingEp()
[all …]

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