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/linux-5.10/Documentation/devicetree/bindings/sound/
Dqcom,lpass-cpu.yaml66 const: 0
69 "^dai-link@[0-9a-f]$":
187 reg = <0 0x62d87000 0 0x68000>,
188 <0 0x62f00000 0 0x29000>;
191 iommus = <&apps_smmu 0x1020 0>,
192 <&apps_smmu 0x1032 0>;
193 power-domains = <&lpass_hm 0>;
206 interrupts = <0 160 1>,
207 <0 268 1>;
213 #size-cells = <0>;
[all …]
/linux-5.10/drivers/net/wireless/mediatek/mt76/mt7615/
Dmmio.c12 [MT_TOP_CFG_BASE] = 0x01000,
13 [MT_HW_BASE] = 0x01000,
14 [MT_PCIE_REMAP_2] = 0x02504,
15 [MT_ARB_BASE] = 0x20c00,
16 [MT_HIF_BASE] = 0x04000,
17 [MT_CSR_BASE] = 0x07000,
18 [MT_PLE_BASE] = 0x08000,
19 [MT_PSE_BASE] = 0x0c000,
20 [MT_CFG_BASE] = 0x20200,
21 [MT_AGG_BASE] = 0x20a00,
[all …]
/linux-5.10/arch/arm/boot/dts/
Dbcm-nsp.dtsi54 #size-cells = <0>;
56 cpu0: cpu@0 {
60 reg = <0x0>;
68 secondary-boot-reg = <0xffff0fec>;
69 reg = <0x1>;
82 ranges = <0x00000000 0x19000000 0x00023000>;
86 a9pll: arm_clk@0 {
87 #clock-cells = <0>;
90 reg = <0x00000 0x1000>;
95 reg = <0x20200 0x100>;
[all …]
Domap4-l4.dtsi2 &l4_cfg { /* 0x4a000000 */
4 reg = <0x4a000000 0x800>,
5 <0x4a000800 0x800>,
6 <0x4a001000 0x1000>;
10 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
11 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
12 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
13 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
14 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
15 <0x00280000 0x4a280000 0x080000>, /* segment 5 */
[all …]
/linux-5.10/drivers/rapidio/devices/
Dtsi721.h13 DBG_NONE = 0,
14 DBG_INIT = BIT(0), /* driver init */
26 DBG_ALL = ~0,
36 } while (0)
53 #define DEFAULT_HOPCOUNT 0xff
54 #define DEFAULT_DESTID 0xff
57 #define PCI_DEVICE_ID_TSI721 0x80ab
59 #define BAR_0 0
67 #define TSI721_MAINT_WIN 0 /* Window for outbound maintenance requests */
68 #define IDB_QUEUE 0 /* Inbound Doorbell Queue to use */
[all …]
/linux-5.10/drivers/net/wireless/intersil/orinoco/
Dhw.c34 {110, 1, 3, 15}, /* Entry 0 is the default */
35 {10, 0, 1, 1},
37 {20, 0, 2, 2},
39 {55, 0, 4, 4},
41 {110, 0, 5, 8},
52 if (nic_id->id < 0x8000) in determine_firmware_type()
54 else if (nic_id->id == 0x8000 && nic_id->major == 0) in determine_firmware_type()
96 *hw_ver = (((nic_id.id & 0xff) << 24) | in determine_fw_capabilities()
97 ((nic_id.variant & 0xff) << 16) | in determine_fw_capabilities()
98 ((nic_id.major & 0xff) << 8) | in determine_fw_capabilities()
[all …]
/linux-5.10/drivers/clk/qcom/
Dgcc-msm8998.c39 { P_XO, 0 },
53 { P_XO, 0 },
65 { P_XO, 0 },
81 { P_XO, 0 },
93 { P_XO, 0 },
107 { P_XO, 0 },
132 { 250000000, 2000000000, 0 },
137 .offset = 0x0,
142 .enable_reg = 0x52000,
143 .enable_mask = BIT(0),
[all …]
Dgcc-msm8916.c46 { P_XO, 0 },
56 { P_XO, 0 },
68 { P_XO, 0 },
82 { P_XO, 0 },
94 { P_XO, 0 },
104 { P_XO, 0 },
118 { P_XO, 0 },
130 { P_XO, 0, },
140 { P_XO, 0 },
152 { P_XO, 0 },
[all …]
Dgcc-msm8996.c50 { P_XO, 0 },
60 { P_XO, 0 },
70 { P_XO, 0 },
82 { P_XO, 0 },
94 { P_XO, 0 },
106 { P_XO, 0 },
120 { P_XO, 0 },
134 { P_XO, 0 },
152 { P_XO, 0 },
183 .offset = 0x00000,
[all …]
Dgcc-msm8939.c54 .l_reg = 0x21004,
55 .m_reg = 0x21008,
56 .n_reg = 0x2100c,
57 .config_reg = 0x21010,
58 .mode_reg = 0x21000,
59 .status_reg = 0x2101c,
72 .enable_reg = 0x45000,
73 .enable_mask = BIT(0),
85 .l_reg = 0x20004,
86 .m_reg = 0x20008,
[all …]
Dgcc-ipq8074.c58 { P_XO, 0 },
69 { P_XO, 0 },
81 { P_XO, 0 },
94 { P_XO, 0 },
107 { P_XO, 0 },
120 { P_XO, 0 },
131 { P_USB3PHY_0_PIPE, 0 },
141 { P_USB3PHY_1_PIPE, 0 },
151 { P_PCIE20_PHY0_PIPE, 0 },
161 { P_PCIE20_PHY1_PIPE, 0 },
[all …]
Dgcc-ipq6018.c53 .offset = 0x21000,
56 .enable_reg = 0x0b000,
57 .enable_mask = BIT(0),
83 .offset = 0x21000,
103 { P_XO, 0 },
109 .offset = 0x25000,
113 .enable_reg = 0x0b000,
127 .offset = 0x25000,
141 .offset = 0x37000,
144 .enable_reg = 0x0b000,
[all …]
/linux-5.10/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_dump.h22 #define DRV_DUMP_XSTORM_WAITP_ADDRESS 0x2b8a80
23 #define DRV_DUMP_TSTORM_WAITP_ADDRESS 0x1b8a80
24 #define DRV_DUMP_USTORM_WAITP_ADDRESS 0x338a80
25 #define DRV_DUMP_CSTORM_WAITP_ADDRESS 0x238a80
45 #define BNX2X_DUMP_VERSION 0x61111111
65 static const u32 page_vals_e2[] = {0, 128};
68 {0x58000, 4608, DUMP_CHIP_E2, 0x30}
74 static const u32 page_vals_e3[] = {0, 128};
77 {0x58000, 4608, DUMP_CHIP_E3A0 | DUMP_CHIP_E3B0, 0x30}
81 { 0x2000, 1, 0x1f, 0xfff},
[all …]
/linux-5.10/drivers/gpu/drm/radeon/
Devergreen.c42 #define DC_HPDx_CONTROL(x) (DC_HPD1_CONTROL + (x * 0xc))
43 #define DC_HPDx_INT_CONTROL(x) (DC_HPD1_INT_CONTROL + (x * 0xc))
44 #define DC_HPDx_INT_STATUS_REG(x) (DC_HPD1_INT_STATUS + (x * 0xc))
55 WREG32(EVERGREEN_CG_IND_ADDR, ((reg) & 0xffff)); in eg_cg_rreg()
66 WREG32(EVERGREEN_CG_IND_ADDR, ((reg) & 0xffff)); in eg_cg_wreg()
77 WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff)); in eg_pif_phy0_rreg()
88 WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff)); in eg_pif_phy0_wreg()
99 WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff)); in eg_pif_phy1_rreg()
110 WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff)); in eg_pif_phy1_wreg()
129 0x98fc,
[all …]