/linux-6.15/arch/arm64/boot/dts/qcom/ |
D | sc7180.dtsi | 66 #clock-cells = <0>; 72 #clock-cells = <0>; 78 #size-cells = <0>; 80 cpu0: cpu@0 { 83 reg = <0x0 0x0>; 84 clocks = <&cpufreq_hw 0>; 95 qcom,freq-domain = <&cpufreq_hw 0>; 112 reg = <0x0 0x100>; 113 clocks = <&cpufreq_hw 0>; 124 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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D | ipq6018.dtsi | 23 #clock-cells = <0>; 29 #clock-cells = <0>; 35 #size-cells = <0>; 37 cpu0: cpu@0 { 40 reg = <0x0>; 54 reg = <0x1>; 67 reg = <0x2>; 80 reg = <0x3>; 99 qcom,dload-mode = <&tcsr 0x6100>; 111 opp-supported-hw = <0xf>; [all …]
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/linux-6.15/Documentation/networking/ |
D | arcnet-hardware.rst | 269 values in the Linux ARCnet driver are only from 0x200 through 0x3F0. (If 272 a doc I got from Novell, MS Windows prefers values of 0x300 or more, 274 this may be because, if your card is at 0x2E0, probing for a serial port 275 at 0x2E8 will reset the card and probably mess things up royally. 277 - Avery's favourite: 0x300. 292 IRQ 0 Timer 0 (Not on bus) 340 Anything less than 0xA0000 is, well, a BAD idea since it isn't above 343 - Avery's favourite: 0xD0000 346 address from 0 to 255. Unlike Ethernet, you can set this address 349 on a network. DON'T use 0 or 255, since these are reserved (although [all …]
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/linux-6.15/drivers/net/ethernet/renesas/ |
D | ravb.h | 39 #define RAVB_TXTSTAMP_VALID 0x00000001 /* TX timestamp valid */ 40 #define RAVB_TXTSTAMP_ENABLED 0x00000010 /* Enable TX timestamping */ 42 #define RAVB_RXTSTAMP_VALID 0x00000001 /* RX timestamp valid */ 43 #define RAVB_RXTSTAMP_TYPE 0x00000006 /* RX type mask */ 44 #define RAVB_RXTSTAMP_TYPE_V2_L2_EVENT 0x00000002 45 #define RAVB_RXTSTAMP_TYPE_ALL 0x00000006 46 #define RAVB_RXTSTAMP_ENABLED 0x00000010 /* Enable RX timestamping */ 50 CCC = 0x0000, 51 DBAT = 0x0004, 52 DLR = 0x0008, [all …]
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/linux-6.15/drivers/scsi/ |
D | myrb.h | 38 MYRB_CMD_READ_EXTENDED = 0x33, 39 MYRB_CMD_WRITE_EXTENDED = 0x34, 40 MYRB_CMD_READAHEAD_EXTENDED = 0x35, 41 MYRB_CMD_READ_EXTENDED_SG = 0xB3, 42 MYRB_CMD_WRITE_EXTENDED_SG = 0xB4, 43 MYRB_CMD_READ = 0x36, 44 MYRB_CMD_READ_SG = 0xB6, 45 MYRB_CMD_WRITE = 0x37, 46 MYRB_CMD_WRITE_SG = 0xB7, 47 MYRB_CMD_DCDB = 0x04, [all …]
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/linux-6.15/drivers/media/dvb-frontends/ |
D | s5h1409.c | 37 #define QAM_STATE_UNTUNED 0 57 { 0x00, 0x0071, }, 58 { 0x01, 0x3213, }, 59 { 0x09, 0x0025, }, 60 { 0x1c, 0x001d, }, 61 { 0x1f, 0x002d, }, 62 { 0x20, 0x001d, }, 63 { 0x22, 0x0022, }, 64 { 0x23, 0x0020, }, 65 { 0x29, 0x110f, }, [all …]
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D | dib3000mc.c | 23 MODULE_PARM_DESC(debug, "turn on debugging (default: 0)"); 27 MODULE_PARM_DESC(buggy_sfn_workaround, "Enable work-around for buggy SFNs (default: 0)"); 33 } while (0) 56 { .addr = state->i2c_addr >> 1, .flags = 0, .len = 2 }, in dib3000mc_read_word() 64 return 0; in dib3000mc_read_word() 66 b[0] = (reg >> 8) | 0x80; in dib3000mc_read_word() 68 b[2] = 0; in dib3000mc_read_word() 69 b[3] = 0; in dib3000mc_read_word() 71 msg[0].buf = b; in dib3000mc_read_word() 86 .addr = state->i2c_addr >> 1, .flags = 0, .len = 4 in dib3000mc_write_word() [all …]
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/linux-6.15/drivers/net/ethernet/cortina/ |
D | gemini.h | 15 #define TOE_NONTOE_QUE_HDR_BASE 0x2000 16 #define TOE_TOE_QUE_HDR_BASE 0x3000 19 #define TOE_SW_FREE_QID 0x00 20 #define TOE_HW_FREE_QID 0x01 21 #define TOE_GMAC0_SW_TXQ0_QID 0x02 22 #define TOE_GMAC0_SW_TXQ1_QID 0x03 23 #define TOE_GMAC0_SW_TXQ2_QID 0x04 24 #define TOE_GMAC0_SW_TXQ3_QID 0x05 25 #define TOE_GMAC0_SW_TXQ4_QID 0x06 26 #define TOE_GMAC0_SW_TXQ5_QID 0x07 [all …]
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/linux-6.15/drivers/mmc/host/ |
D | sdhci.h | 26 #define SDHCI_DMA_ADDRESS 0x00 30 #define SDHCI_BLOCK_SIZE 0x04 31 #define SDHCI_MAKE_BLKSZ(dma, blksz) (((dma & 0x7) << 12) | (blksz & 0xFFF)) 33 #define SDHCI_BLOCK_COUNT 0x06 35 #define SDHCI_ARGUMENT 0x08 37 #define SDHCI_TRANSFER_MODE 0x0C 38 #define SDHCI_TRNS_DMA 0x01 39 #define SDHCI_TRNS_BLK_CNT_EN 0x02 40 #define SDHCI_TRNS_AUTO_CMD12 0x04 41 #define SDHCI_TRNS_AUTO_CMD23 0x08 [all …]
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/linux-6.15/drivers/net/wan/ |
D | wanxlfw.S | 2 .psize 0 14 0x000 - 0x050 TX#0 0x050 - 0x140 RX#0 15 0x140 - 0x190 TX#1 0x190 - 0x280 RX#1 16 0x280 - 0x2D0 TX#2 0x2D0 - 0x3C0 RX#2 17 0x3C0 - 0x410 TX#3 0x410 - 0x500 RX#3 43 PCI9060_VECTOR = 0x0000006C 44 CPM_IRQ_BASE = 0x40 46 SCC1_VECTOR = (CPM_IRQ_BASE + 0x1E) * 4 47 SCC2_VECTOR = (CPM_IRQ_BASE + 0x1D) * 4 48 SCC3_VECTOR = (CPM_IRQ_BASE + 0x1C) * 4 [all …]
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/linux-6.15/drivers/net/ethernet/intel/ixgbe/ |
D | ixgbe_type_e610.h | 13 #define E610_SR_SW_CHECKSUM_WORD 0x3F 19 #define GL_FWSTS 0x00083048 /* Reset Source: POR */ 24 #define GLNVM_GENS 0x000B6100 /* Reset Source: POR */ 28 #define IXGBE_GLNVM_FLA 0x000B6108 /* Reset Source: POR */ 33 #define IXGBE_PF_HIDA(_i) (0x00085000 + ((_i) * 4)) 34 #define IXGBE_PF_HIDA_2(_i) (0x00085020 + ((_i) * 4)) 35 #define IXGBE_PF_HIBA(_i) (0x00084000 + ((_i) * 4)) 36 #define IXGBE_PF_HICR 0x00082048 38 #define IXGBE_PF_HICR_EN BIT(0) 62 * |0 |1 |2 |3 |4 |5 |6 |7 |8 |9 |10 |11 |12 |13 |14 |15 | [all …]
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/linux-6.15/drivers/spi/ |
D | spi-pci1xxxx.c | 41 #define SPI_MST_CTL_GO (BIT(0)) 43 #define SPI_PERI_ADDR_BASE (0x160000) 44 #define SPI_SYSTEM_ADDR_BASE (0x2000) 45 #define SPI_MST1_ADDR_BASE (0x800) 47 #define DEV_REV_REG (SPI_SYSTEM_ADDR_BASE + 0x00) 48 #define SPI_SYSLOCK_REG (SPI_SYSTEM_ADDR_BASE + 0xA0) 49 #define SPI_CONFIG_PERI_ENABLE_REG (SPI_SYSTEM_ADDR_BASE + 0x108) 52 #define DEV_REV_MASK (GENMASK(7, 0)) 55 #define SPI0 (0) 59 #define SPI_DMA_ADDR_BASE (0x1000) [all …]
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/linux-6.15/drivers/crypto/intel/qat/qat_common/ |
D | adf_gen4_ras.h | 11 #define ADF_GEN4_ERRSOU0_BIT BIT(0) 14 #define ADF_GEN4_HIAECORERRLOG_CPP0 0x41A308 17 #define ADF_GEN4_HIAECORERRLOGENABLE_CPP0 0x41A318 18 #define ADF_GEN4_ERRSOU1_HIAEUNCERRLOG_CPP0_BIT BIT(0) 32 #define ADF_GEN4_HIAEUNCERRLOG_CPP0 0x41A300 35 #define ADF_GEN4_HIAEUNCERRLOGENABLE_CPP0 0x41A320 38 #define ADF_GEN4_HICPPAGENTCMDPARERRLOG 0x41A310 41 #define ADF_GEN4_HICPPAGENTCMDPARERRLOGENABLE 0x41A314 44 #define ADF_GEN4_RIMEM_PARERR_STS 0x41B128 47 #define ADF_GEN4_RI_MEM_PAR_ERR_EN0 0x41B12C [all …]
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/linux-6.15/include/uapi/linux/ |
D | cdrom.h | 52 * will commandeer byte 0x53, or 'S'. 54 #define CDROMPAUSE 0x5301 /* Pause Audio Operation */ 55 #define CDROMRESUME 0x5302 /* Resume paused Audio Operation */ 56 #define CDROMPLAYMSF 0x5303 /* Play Audio MSF (struct cdrom_msf) */ 57 #define CDROMPLAYTRKIND 0x5304 /* Play Audio Track/index 59 #define CDROMREADTOCHDR 0x5305 /* Read TOC header 61 #define CDROMREADTOCENTRY 0x5306 /* Read TOC entry 63 #define CDROMSTOP 0x5307 /* Stop the cdrom drive */ 64 #define CDROMSTART 0x5308 /* Start the cdrom drive */ 65 #define CDROMEJECT 0x5309 /* Ejects the cdrom media */ [all …]
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/linux-6.15/drivers/iommu/amd/ |
D | amd_iommu_types.h | 36 #define MMIO_CAP_HDR_OFFSET 0x00 37 #define MMIO_RANGE_OFFSET 0x0c 38 #define MMIO_MISC_OFFSET 0x10 41 #define MMIO_RANGE_LD_MASK 0xff000000 42 #define MMIO_RANGE_FD_MASK 0x00ff0000 43 #define MMIO_RANGE_BUS_MASK 0x0000ff00 50 #define MMIO_MSI_NUM(x) ((x) & 0x1f) 53 #define MMIO_EXCL_ENABLE_MASK 0x01ULL 54 #define MMIO_EXCL_ALLOW_MASK 0x02ULL 57 #define MMIO_DEV_TABLE_OFFSET 0x0000 [all …]
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/linux-6.15/drivers/scsi/aic94xx/ |
D | aic94xx_reg_def.h | 22 #define CSEQ_MODE_PAGE_SIZE 0x200 /* CSEQ mode page size */ 23 #define LmSEQ_MODE_PAGE_SIZE 0x200 /* LmSEQ mode page size */ 24 #define LmSEQ_HOST_REG_SIZE 0x4000 /* LmSEQ Host Register size */ 32 * CHIM Registers, Address Range : (0x00-0xFF) 34 #define COMBIST (REG_BASE_ADDR + 0x00) 37 #define L7BLKRST 0x80000000 38 #define L6BLKRST 0x40000000 39 #define L5BLKRST 0x20000000 40 #define L4BLKRST 0x10000000 41 #define L3BLKRST 0x08000000 [all …]
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/linux-6.15/drivers/media/i2c/ |
D | hi846.c | 22 #define HI846_REG_FLL 0x0006 23 #define HI846_FLL_MAX 0xffff 26 #define HI846_REG_LLP 0x0008 29 #define HI846_REG_BINNING_MODE 0x000c 31 #define HI846_REG_IMAGE_ORIENTATION 0x000e 33 #define HI846_REG_UNKNOWN_0022 0x0022 35 #define HI846_REG_Y_ADDR_START_VACT_H 0x0026 36 #define HI846_REG_Y_ADDR_START_VACT_L 0x0027 37 #define HI846_REG_UNKNOWN_0028 0x0028 39 #define HI846_REG_Y_ADDR_END_VACT_H 0x002c [all …]
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/linux-6.15/drivers/media/usb/go7007/ |
D | go7007-fw.c | 40 #define SPECIAL_FRM_HEAD 0 58 #define CODE_GEN(name, dest) struct code_gen name = { dest, 0, 32, 0 } 70 } while (0) 169 { 0x01, 1 }, { 0x03, 3 }, { 0x02, 3 }, { 0x03, 4 }, 170 { 0x02, 4 }, { 0x03, 5 }, { 0x02, 5 }, { 0x07, 7 }, 171 { 0x06, 7 }, { 0x0b, 8 }, { 0x0a, 8 }, { 0x09, 8 }, 172 { 0x08, 8 }, { 0x07, 8 }, { 0x06, 8 }, { 0x17, 10 }, 173 { 0x16, 10 }, { 0x15, 10 }, { 0x14, 10 }, { 0x13, 10 }, 174 { 0x12, 10 }, { 0x23, 11 }, { 0x22, 11 }, { 0x21, 11 }, 175 { 0x20, 11 }, { 0x1f, 11 }, { 0x1e, 11 }, { 0x1d, 11 }, [all …]
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/linux-6.15/drivers/mfd/ |
D | cs47l24-tables.c | 21 { 0x80, 0x3 }, 22 { 0x27C, 0x0010 }, 23 { 0x221, 0x0070 }, 24 { 0x80, 0x0 }, 36 [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 }, 37 [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 }, 183 { 0x00000008, 0x0019 }, /* R8 - Ctrl IF SPI CFG 1 */ 184 { 0x00000020, 0x0000 }, /* R32 - Tone Generator 1 */ 185 { 0x00000021, 0x1000 }, /* R33 - Tone Generator 2 */ 186 { 0x00000022, 0x0000 }, /* R34 - Tone Generator 3 */ [all …]
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/linux-6.15/drivers/platform/mellanox/ |
D | nvsw-sn2201.c | 20 #define NVSW_SN2201_CPLD_LPC_I2C_BASE_ADRR 0x2000 21 #define NVSW_SN2201_CPLD_LPC_IO_RANGE 0x100 22 #define NVSW_SN2201_HW_VER_ID_OFFSET 0x00 23 #define NVSW_SN2201_BOARD_ID_OFFSET 0x01 24 #define NVSW_SN2201_CPLD_VER_OFFSET 0x02 25 #define NVSW_SN2201_CPLD_MVER_OFFSET 0x03 26 #define NVSW_SN2201_CPLD_ID_OFFSET 0x04 27 #define NVSW_SN2201_CPLD_PN_OFFSET 0x05 28 #define NVSW_SN2201_CPLD_PN1_OFFSET 0x06 29 #define NVSW_SN2201_PSU_CTRL_OFFSET 0x0a [all …]
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/linux-6.15/drivers/gpu/drm/nouveau/dispnv04/ |
D | hw.c | 31 #define CHIPSET_NFORCE 0x01a0 32 #define CHIPSET_NFORCE2 0x01f0 66 /* CR44 takes values 0 (head A), 3 (head B) and 4 (heads tied) 68 * 0xc{0,2}3c*, 0x60{1,3}3*, and 0x68{1,3}3d* 70 * expected and values can be set for the appropriate head by using a 0x2000 73 * a) pre nv40, the head B range of PRMVIO regs at 0xc23c* was not exposed and 74 * cr44 must be set to 0 or 3 for accessing values on the correct head 75 * through the common 0xc03c* addresses 81 * 0 and 1 are treated as head values and so the set value is (owner * 3) 92 if (drm->client.device.info.chipset == 0x11) { in NVSetOwner() [all …]
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/linux-6.15/drivers/mtd/nand/raw/ |
D | cafe_nand.c | 28 #define CAFE_NAND_CTRL1 0x00 29 #define CAFE_NAND_CTRL2 0x04 30 #define CAFE_NAND_CTRL3 0x08 31 #define CAFE_NAND_STATUS 0x0c 32 #define CAFE_NAND_IRQ 0x10 33 #define CAFE_NAND_IRQ_MASK 0x14 34 #define CAFE_NAND_DATA_LEN 0x18 35 #define CAFE_NAND_ADDR1 0x1c 36 #define CAFE_NAND_ADDR2 0x20 37 #define CAFE_NAND_TIMING1 0x24 [all …]
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/linux-6.15/sound/pci/ |
D | bt87x.c | 27 static int index[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -2}; /* Exclude the first card */ 46 #define REG_INT_STAT 0x100 /* interrupt status */ 47 #define REG_INT_MASK 0x104 /* interrupt mask */ 48 #define REG_GPIO_DMA_CTL 0x10c /* audio control */ 49 #define REG_PACKET_LEN 0x110 /* audio packet lengths */ 50 #define REG_RISC_STRT_ADD 0x114 /* RISC program start address */ 51 #define REG_RISC_COUNT 0x120 /* RISC program counter */ 68 #define CTL_FIFO_ENABLE (1 << 0) /* enable audio data FIFO */ 70 #define CTL_PKTP_4 (0 << 2) /* packet mode FIFO trigger point - 4 DWORDs */ 75 #define CTL_DA_IOM_AFE (0 << 6) /* audio A/D input */ [all …]
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/linux-6.15/drivers/input/touchscreen/ |
D | ili210x.c | 25 #define REG_TOUCHDATA 0x10 26 #define REG_PANEL_INFO 0x20 27 #define REG_FIRMWARE_VERSION 0x40 28 #define REG_PROTOCOL_VERSION 0x42 29 #define REG_KERNEL_VERSION 0x61 30 #define REG_IC_BUSY 0x80 31 #define REG_IC_BUSY_NOT_BUSY 0x50 32 #define REG_GET_MODE 0xc0 33 #define REG_GET_MODE_AP 0x5a 34 #define REG_GET_MODE_BL 0x55 [all …]
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/linux-6.15/arch/powerpc/include/asm/ |
D | guest-state-buffer.h | 17 #define KVMPPC_GSID_BLANK 0x0000 19 #define KVMPPC_GSID_HOST_STATE_SIZE 0x0001 21 #define KVMPPC_GSID_RUN_OUTPUT_MIN_SIZE 0x0002 23 #define KVMPPC_GSID_LOGICAL_PVR 0x0003 25 #define KVMPPC_GSID_TB_OFFSET 0x0004 27 #define KVMPPC_GSID_PARTITION_TABLE 0x0005 29 #define KVMPPC_GSID_PROCESS_TABLE 0x0006 32 #define KVMPPC_GSID_RUN_INPUT 0x0C00 34 #define KVMPPC_GSID_RUN_OUTPUT 0x0C01 35 #define KVMPPC_GSID_VPA 0x0C02 [all …]
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