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/linux/drivers/gpu/drm/tegra/
H A Ddsi.c206 int err = 0; in tegra_dsi_show_regs()
215 for (i = 0; i < ARRAY_SIZE(tegra_dsi_regs); i++) { in tegra_dsi_show_regs()
228 { "regs", tegra_dsi_show_regs, 0, NULL },
244 for (i = 0; i < count; i++) in tegra_dsi_late_register()
249 return 0; in tegra_dsi_late_register()
265 #define PKT_ID0(id) ((((id) & 0x3f) << 3) | (1 << 9))
266 #define PKT_LEN0(len) (((len) & 0x07) << 0)
267 #define PKT_ID1(id) ((((id) & 0x3f) << 13) | (1 << 19))
268 #define PKT_LEN1(len) (((len) & 0x07) << 10)
269 #define PKT_ID2(id) ((((id) & 0x3f) << 23) | (1 << 29))
[all …]
/linux/drivers/net/ethernet/amd/
H A Ddeclance.c93 #define LE_CSR0 0
98 #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
100 #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
101 #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
102 #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
103 #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
104 #define LE_C0_MERR 0x0800 /* ME: Memory error */
105 #define LE_C0_RINT 0x0400 /* Received interrupt */
106 #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
107 #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
[all …]
/linux/drivers/media/platform/samsung/exynos4-is/
H A Dfimc-core.h41 #define FIMC_CAMIF_MAX_HEIGHT 0x2000
93 FIMC_FMT_RGB444 = 0x10,
99 FIMC_FMT_YCBCR420 = 0x20,
105 FIMC_FMT_RAW8 = 0x40,
108 FIMC_FMT_JPEG = 0x80,
109 FIMC_FMT_YUYV_JPEG = 0x100,
112 #define fimc_fmt_is_user_defined(x) (!!((x) & 0x180))
113 #define fimc_fmt_is_rgb(x) (!!((x) & 0x10))
119 #define FIMC_PARAMS (1 << 0)
126 #define FIMC_IN_DMA_ACCESS_TILED (1 << 0)
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_link_encoder.c41 #define DMU_MEM_PWR_CNTL__DMCU_IRAM_MEM_PWR_STATE__SHIFT 0xa
45 #define DMU_MEM_PWR_CNTL__DMCU_IRAM_MEM_PWR_STATE_MASK 0x00000400L
49 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK 0x10000000L
53 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT 0x1c
77 #define DCE110_DIG_FE_SOURCE_SELECT_INVALID 0x0
78 #define DCE110_DIG_FE_SOURCE_SELECT_DIGA 0x1
79 #define DCE110_DIG_FE_SOURCE_SELECT_DIGB 0x2
80 #define DCE110_DIG_FE_SOURCE_SELECT_DIGC 0x4
81 #define DCE110_DIG_FE_SOURCE_SELECT_DIGD 0x08
82 #define DCE110_DIG_FE_SOURCE_SELECT_DIGE 0x10
[all …]
/linux/arch/mips/kvm/
H A Dmips.c38 #define VECTORSPACING 0x100 /* for EI/VI mode */
101 return 0; in kvm_guest_mode_change_trace_reg()
159 return 0; in kvm_arch_init_vm()
165 WARN_ON(!kvm_mips_flush_gpa_pt(kvm, 0, ~0)); in kvm_mips_free_gpa_pt()
184 kvm_mips_flush_gpa_pt(kvm, 0, ~0); in kvm_arch_flush_shadow_all()
209 return 0; in kvm_arch_prepare_memory_region()
267 vcpu->arch.wait = 0; in kvm_mips_comparecount_wakeup()
275 return 0; in kvm_arch_vcpu_precreate()
299 size = 0x200 + VECTORSPACING * 64; in kvm_arch_vcpu_create()
301 size = 0x4000; in kvm_arch_vcpu_create()
[all …]
/linux/drivers/net/ethernet/qlogic/qed/
H A Dqed.h45 #define QED_LLH_DONT_CARE 0
57 QED_GET_MCP_NVM_RESP = 0xFFFFFF00
75 } while (0)
97 #define for_each_hwfn(cdev, i) for (i = 0; i < (cdev)->num_hwfns; i++)
333 #define DMAE_MAX_RW_SIZE 0x2000
463 /* Do not insert a vlan tag with id 0 */
530 (QED_IS_K2((_p_hwfn)->cdev) ? 0 : ((_p_hwfn)->abs_pf_id & 1))
710 #define QED_DEV_ID_MASK 0xff00
711 #define QED_DEV_ID_MASK_BB 0x1600
712 #define QED_DEV_ID_MASK_AH 0x8000
[all …]
/linux/lib/
H A Dtest_maple_tree.c14 #define MTREE_ALLOC_MAX 0x2000000000000Ul
19 #define mt_dump(mt, fmt) do {} while (0)
20 #define mt_validate(mt) do {} while (0)
21 #define mt_cache_shrink() do {} while (0)
22 #define mas_dump(mas) do {} while (0)
23 #define mas_wr_dump(mas) do {} while (0)
39 } while (0)
53 #define mt_set_non_kernel(x) do {} while (0)
54 #define mt_zero_nr_tallocated(x) do {} while (0)
56 #define cond_resched() do {} while (0)
[all …]
/linux/drivers/media/i2c/
H A Dhi847.c25 #define HI847_REG_CHIP_ID 0x0716
26 #define HI847_CHIP_ID 0x0847
28 #define HI847_REG_MODE_SELECT 0x0B00
29 #define HI847_MODE_STANDBY 0x0000
30 #define HI847_MODE_STREAMING 0x0100
32 #define HI847_REG_MODE_TG 0x027E
33 #define HI847_REG_MODE_TG_ENABLE 0x0100
34 #define HI847_REG_MODE_TG_DISABLE 0x0000
37 #define HI847_REG_FLL 0x020E
38 #define HI847_FLL_30FPS 0x0B51
[all …]
H A Dtda1997x_regs.h6 /* Page 0x00 - General Control */
7 #define REG_VERSION 0x0000
8 #define REG_INPUT_SEL 0x0001
9 #define REG_SVC_MODE 0x0002
10 #define REG_HPD_MAN_CTRL 0x0003
11 #define REG_RT_MAN_CTRL 0x0004
12 #define REG_STANDBY_SOFT_RST 0x000A
13 #define REG_HDMI_SOFT_RST 0x000B
14 #define REG_HDMI_INFO_RST 0x000C
15 #define REG_INT_FLG_CLR_TOP 0x000E
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr8a774e1.dtsi19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
31 #clock-cells = <0>;
32 clock-frequency = <0>;
37 #clock-cells = <0>;
38 clock-frequency = <0>;
44 #clock-cells = <0>;
45 clock-frequency = <0>;
48 cluster0_opp: opp-table-0 {
[all …]
H A Dr8a77965.dtsi23 * The external audio clocks are configured as 0 Hz fixed frequency
29 #clock-cells = <0>;
30 clock-frequency = <0>;
35 #clock-cells = <0>;
36 clock-frequency = <0>;
41 #clock-cells = <0>;
42 clock-frequency = <0>;
48 #clock-cells = <0>;
49 clock-frequency = <0>;
52 cluster0_opp: opp-table-0 {
[all …]
H A Dr8a77961.dtsi18 * The external audio clocks are configured as 0 Hz fixed frequency
24 #clock-cells = <0>;
25 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
36 #clock-cells = <0>;
37 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
47 cluster0_opp: opp-table-0 {
[all …]
H A Dr8a77990.dtsi18 * The external audio clocks are configured as 0 Hz fixed frequency
24 #clock-cells = <0>;
25 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
36 #clock-cells = <0>;
37 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
71 #size-cells = <0>;
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8996.dtsi30 #clock-cells = <0>;
37 #clock-cells = <0>;
45 #size-cells = <0>;
47 cpu0: cpu@0 {
50 reg = <0x0 0x0>;
54 clocks = <&kryocc 0>;
69 reg = <0x0 0x1>;
73 clocks = <&kryocc 0>;
83 reg = <0x0 0x100>;
102 reg = <0x0 0x101>;
[all …]
/linux/drivers/net/ethernet/micrel/
H A Dksz884x.c33 #define KS_DMA_TX_CTRL 0x0000
34 #define DMA_TX_ENABLE 0x00000001
35 #define DMA_TX_CRC_ENABLE 0x00000002
36 #define DMA_TX_PAD_ENABLE 0x00000004
37 #define DMA_TX_LOOPBACK 0x00000100
38 #define DMA_TX_FLOW_ENABLE 0x00000200
39 #define DMA_TX_CSUM_IP 0x00010000
40 #define DMA_TX_CSUM_TCP 0x00020000
41 #define DMA_TX_CSUM_UDP 0x00040000
42 #define DMA_TX_BURST_SIZE 0x3F000000
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8195.dtsi51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x000>;
58 performance-domains = <&performance 0>;
75 reg = <0x100>;
77 performance-domains = <&performance 0>;
94 reg = <0x200>;
96 performance-domains = <&performance 0>;
113 reg = <0x300>;
115 performance-domains = <&performance 0>;
[all …]
/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_self_test.c6 #define NA 0xCD
8 #define IDLE_CHK_E1 0x01
9 #define IDLE_CHK_E1H 0x02
10 #define IDLE_CHK_E2 0x04
11 #define IDLE_CHK_E3A0 0x08
12 #define IDLE_CHK_E3B0 0x10
118 /*line 2*/{(0x3), 1, 0x2114,
119 NA, 1, 0, pand_neq,
121 "PCIE: ucorr_err_status is not 0",
122 {NA, NA, 0x0FF010, 0, NA, NA} },
[all …]
/linux/arch/powerpc/boot/dts/
H A Dxpedite5330.dts16 boot-bank = <0x0>; /* 0: Primary flash, 1: Secondary flash */
30 #size-cells = <0>;
32 pmcslot@0 {
33 cell-index = <0>;
44 #size-cells = <0>;
46 xmcslot@0 {
47 cell-index = <0>;
65 #size-cells = <0>;
67 PowerPC,8572@0 {
69 reg = <0x0>;
[all …]
/linux/include/soc/fsl/qe/
H A Dqe.h34 QE_CLK_NONE = 0,
150 return 0; in cpm_muram_dma()
245 return 0; in qe_alive_during_sleep()
291 u8 split; /* 0 = shared I-RAM, 1 = split I-RAM */
304 __be32 traps[16]; /* Trap addresses, 0 == ignore */
348 #define BD_STATUS_MASK 0xffff0000
349 #define BD_LENGTH_MASK 0x0000ffff
357 #define QE_RISC_ALLOCATION_RISC1 0x1 /* RISC 1 */
358 #define QE_RISC_ALLOCATION_RISC2 0x2 /* RISC 2 */
359 #define QE_RISC_ALLOCATION_RISC3 0x4 /* RISC 3 */
[all …]
/linux/include/sound/
H A Dcs42l42.h15 #define CS42L42_PAGE_REGISTER 0x00 /* Page Select Register */
16 #define CS42L42_WIN_START 0x00
17 #define CS42L42_WIN_LEN 0x100
18 #define CS42L42_RANGE_MIN 0x00
19 #define CS42L42_RANGE_MAX 0x7F
21 #define CS42L42_PAGE_10 0x1000
22 #define CS42L42_PAGE_11 0x1100
23 #define CS42L42_PAGE_12 0x1200
24 #define CS42L42_PAGE_13 0x1300
25 #define CS42L42_PAGE_15 0x1500
[all …]
/linux/drivers/usb/core/
H A Dquirks.c49 quirk_count = 0; in quirks_param_set()
55 for (quirk_count = 1, i = 0; val[i]; i++) in quirks_param_set()
67 quirk_count = 0; in quirks_param_set()
73 for (i = 0, p = val; p && *p;) { in quirks_param_set()
94 for (flags = 0; *field; field++) { in quirks_param_set()
159 return 0; in quirks_param_set()
194 { USB_DEVICE(0x0204, 0x6025), .driver_info = USB_QUIRK_RESET_RESUME },
197 { USB_DEVICE(0x0218, 0x0201), .driver_info =
201 { USB_DEVICE(0x0218, 0x0401), .driver_info =
205 { USB_DEVICE(0x03f0, 0x0701), .driver_info =
[all …]
/linux/drivers/scsi/
H A D3w-9xxx.h58 {0x0000, "AEN queue empty"},
59 {0x0001, "Controller reset occurred"},
60 {0x0002, "Degraded unit detected"},
61 {0x0003, "Controller error occurred"},
62 {0x0004, "Background rebuild failed"},
63 {0x0005, "Background rebuild done"},
64 {0x0006, "Incomplete unit detected"},
65 {0x0007, "Background initialize done"},
66 {0x0008, "Unclean shutdown detected"},
67 {0x0009, "Drive timeout detected"},
[all …]
/linux/sound/hda/codecs/cirrus/
H A Dcs420x.c53 #define CS420X_VENDOR_NID 0x11
54 #define CS_DIG_OUT1_PIN_NID 0x10
55 #define CS_DIG_OUT2_PIN_NID 0x15
56 #define CS_DMIC1_PIN_NID 0x0e
57 #define CS_DMIC2_PIN_NID 0x12
60 #define IDX_SPDIF_STAT 0x0000
61 #define IDX_SPDIF_CTL 0x0001
62 #define IDX_ADC_CFG 0x0002
64 * 0 = immediate,
69 #define CS_COEF_ADC_SZC_MASK (3 << 0)
[all …]
/linux/include/uapi/linux/
H A Dhdreg.h15 #define IDE_DRIVE_TASK_NO_DATA 0
27 #define IDE_TASKFILE_STD_IN_FLAGS 0xFE
28 #define IDE_HOB_STD_IN_FLAGS 0x3C
30 #define IDE_TASKFILE_STD_OUT_FLAGS 0xFE
31 #define IDE_HOB_STD_OUT_FLAGS 0x3C
108 #define TASKFILE_NO_DATA 0x0000
110 #define TASKFILE_IN 0x0001
111 #define TASKFILE_MULTI_IN 0x0002
113 #define TASKFILE_OUT 0x0004
114 #define TASKFILE_MULTI_OUT 0x0008
[all …]
/linux/drivers/net/ethernet/sun/
H A Dsunhme.h15 #define GREG_SWRESET 0x000UL /* Software Reset */
16 #define GREG_CFG 0x004UL /* Config Register */
17 #define GREG_STAT 0x100UL /* Status */
18 #define GREG_IMASK 0x104UL /* Interrupt Mask */
19 #define GREG_REG_SIZE 0x108UL
22 #define GREG_RESET_ETX 0x01
23 #define GREG_RESET_ERX 0x02
24 #define GREG_RESET_ALL 0x03
27 #define GREG_CFG_BURSTMSK 0x03
28 #define GREG_CFG_BURST16 0x00
[all …]

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