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/src/sys/contrib/device-tree/Bindings/clock/
H A Dmediatek,mt8188-clock.yaml90 reg = <0x11283000 0x1000>;
/src/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8188.dtsi61 #size-cells = <0>;
63 cpu0: cpu@0 {
66 reg = <0x000>;
78 performance-domains = <&performance 0>;
85 reg = <0x100>;
97 performance-domains = <&performance 0>;
104 reg = <0x200>;
116 performance-domains = <&performance 0>;
123 reg = <0x300>;
135 performance-domains = <&performance 0>;
[all …]