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/linux-6.8/drivers/gpu/drm/i915/gt/
Dgen7_renderstate.c11 0x0000000c,
12 0x00000010,
13 0x00000018,
14 0x000001ec,
19 0x69040000,
20 0x61010008,
21 0x00000000,
22 0x00000001, /* reloc */
23 0x00000001, /* reloc */
24 0x00000000,
[all …]
/linux-6.8/Documentation/devicetree/bindings/pci/
Dmediatek-pcie-gen3.yaml27 |0|1|2|3|4|5|6|7| (PCIe intc)
34 |0|1|...|30|31| |0|1|...|30|31| |0|1|...|30|31| (MSI sets)
75 const: 0
119 const: 0
206 reg = <0x00 0x11230000 0x00 0x4000>;
208 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH 0>;
209 bus-range = <0x00 0xff>;
210 ranges = <0x82000000 0x00 0x12000000 0x00
211 0x12000000 0x00 0x1000000>;
231 interrupt-map-mask = <0 0 0 0x7>;
[all …]
/linux-6.8/Documentation/devicetree/bindings/mmc/
Dmtk-sd.yaml79 pinctrl-0:
98 minimum: 0
99 maximum: 0xffffffff
106 The value is an integer from 0 to 31.
107 minimum: 0
115 The value is an integer from 0 to 31.
116 minimum: 0
130 pad macro, there are 32 stages from 0 to 31.
135 minimum: 0
142 data crc error caused by stop clock(fifo full) Valid range = [0:0x7].
[all …]
/linux-6.8/arch/arm64/boot/dts/mediatek/
Dmt7986a.dtsi22 #clock-cells = <0>;
28 #size-cells = <0>;
29 cpu0: cpu@0 {
33 reg = <0x0>;
41 reg = <0x1>;
49 reg = <0x2>;
57 reg = <0x3>;
73 reg = <0 0x43000000 0 0x30000>;
79 reg = <0 0x4fc00000 0 0x00100000>;
83 reg = <0 0x4fd00000 0 0x40000>;
[all …]
Dmt8365.dtsi22 #size-cells = <0>;
24 cluster0_opp: opp-table-0 {
126 cpu0: cpu@0 {
129 reg = <0x0>;
133 i-cache-size = <0x8000>;
136 d-cache-size = <0x8000>;
149 reg = <0x1>;
153 i-cache-size = <0x8000>;
156 d-cache-size = <0x8000>;
169 reg = <0x2>;
[all …]
Dmt8188.dtsi23 #size-cells = <0>;
25 cpu0: cpu@0 {
28 reg = <0x000>;
46 reg = <0x100>;
64 reg = <0x200>;
82 reg = <0x300>;
100 reg = <0x400>;
118 reg = <0x500>;
136 reg = <0x600>;
154 reg = <0x700>;
[all …]
Dmt7622.dtsi69 #size-cells = <0>;
71 cpu0: cpu@0 {
74 reg = <0x0 0x0>;
89 reg = <0x0 0x1>;
111 #clock-cells = <0>;
116 #clock-cells = <0>;
140 reg = <0 0x43000000 0 0x30000>;
150 thermal-sensors = <&thermal 0>;
216 reg = <0 0x10000000 0 0x1000>;
223 reg = <0 0x10001000 0 0x250>;
[all …]
Dmt6795.dtsi48 #size-cells = <0>;
50 cpu0: cpu@0 {
54 reg = <0x000>;
63 reg = <0x001>;
78 reg = <0x002>;
93 reg = <0x003>;
108 reg = <0x100>;
123 reg = <0x101>;
138 reg = <0x102>;
153 reg = <0x103>;
[all …]
Dmt2712e.dtsi22 cluster0_opp: opp-table-0 {
66 #size-cells = <0>;
85 cpu0: cpu@0 {
88 reg = <0x000>;
100 reg = <0x001>;
113 reg = <0x200>;
126 CPU_SLEEP_0: cpu-sleep-0 {
132 arm,psci-suspend-param = <0x0010000>;
135 CLUSTER_SLEEP_0: cluster-sleep-0 {
141 arm,psci-suspend-param = <0x1010000>;
[all …]
Dmt8173.dtsi53 cluster0_opp: opp-table-0 {
129 #size-cells = <0>;
151 cpu0: cpu@0 {
154 reg = <0x000>;
169 reg = <0x001>;
184 reg = <0x100>;
199 reg = <0x101>;
214 CPU_SLEEP_0: cpu-sleep-0 {
220 arm,psci-suspend-param = <0x0010000>;
242 cpu_suspend = <0x84000001>;
[all …]
Dmt8186.dtsi327 #size-cells = <0>;
365 cpu0: cpu@0 {
368 reg = <0x000>;
392 reg = <0x100>;
416 reg = <0x200>;
440 reg = <0x300>;
464 reg = <0x400>;
488 reg = <0x500>;
512 reg = <0x600>;
536 reg = <0x700>;
[all …]
Dmt8192.dtsi36 #clock-cells = <0>;
45 #clock-cells = <0>;
52 #clock-cells = <0>;
59 #size-cells = <0>;
61 cpu0: cpu@0 {
64 reg = <0x000>;
75 performance-domains = <&performance 0>;
83 reg = <0x100>;
94 performance-domains = <&performance 0>;
102 reg = <0x200>;
[all …]
Dmt8183.dtsi293 #size-cells = <0>;
327 cpu0: cpu@0 {
330 reg = <0x000>;
353 reg = <0x001>;
376 reg = <0x002>;
399 reg = <0x003>;
422 reg = <0x100>;
445 reg = <0x101>;
468 reg = <0x102>;
491 reg = <0x103>;
[all …]
Dmt8195.dtsi51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x000>;
58 performance-domains = <&performance 0>;
75 reg = <0x100>;
77 performance-domains = <&performance 0>;
94 reg = <0x200>;
96 performance-domains = <&performance 0>;
113 reg = <0x300>;
115 performance-domains = <&performance 0>;
[all …]
/linux-6.8/arch/arm/boot/dts/mediatek/
Dmt7623.dtsi73 #size-cells = <0>;
76 cpu0: cpu@0 {
79 reg = <0x0>;
91 reg = <0x1>;
103 reg = <0x2>;
115 reg = <0x3>;
137 #clock-cells = <0>;
142 #clock-cells = <0>;
147 clk26m: oscillator-0 {
149 #clock-cells = <0>;
[all …]