/linux-6.8/drivers/gpu/drm/amd/include/asic_reg/nbio/ |
D | nbio_2_3_default.h | 26 #define mmBIF_BX_PF_MM_INDEX_DEFAULT 0x00000000 27 #define mmBIF_BX_PF_MM_DATA_DEFAULT 0x00000000 28 #define mmBIF_BX_PF_MM_INDEX_HI_DEFAULT 0x00000000 32 #define mmSYSHUB_INDEX_OVLP_DEFAULT 0x00000000 33 #define mmSYSHUB_DATA_OVLP_DEFAULT 0x00000000 34 #define mmPCIE_INDEX_DEFAULT 0x00000000 35 #define mmPCIE_DATA_DEFAULT 0x00000000 36 #define mmPCIE_INDEX2_DEFAULT 0x00000000 37 #define mmPCIE_DATA2_DEFAULT 0x00000000 38 #define mmSBIOS_SCRATCH_0_DEFAULT 0x00000000 [all …]
|
D | nbio_7_0_default.h | 26 #define cfgNB_NBCFG0_NB_VENDOR_ID_DEFAULT 0x00000000 27 #define cfgNB_NBCFG0_NB_DEVICE_ID_DEFAULT 0x00000000 28 #define cfgNB_NBCFG0_NB_COMMAND_DEFAULT 0x00000000 29 #define cfgNB_NBCFG0_NB_STATUS_DEFAULT 0x00000000 30 #define cfgNB_NBCFG0_NB_REVISION_ID_DEFAULT 0x00000000 31 #define cfgNB_NBCFG0_NB_REGPROG_INF_DEFAULT 0x00000000 32 #define cfgNB_NBCFG0_NB_SUB_CLASS_DEFAULT 0x00000000 33 #define cfgNB_NBCFG0_NB_BASE_CODE_DEFAULT 0x00000000 34 #define cfgNB_NBCFG0_NB_CACHE_LINE_DEFAULT 0x00000000 35 #define cfgNB_NBCFG0_NB_LATENCY_DEFAULT 0x00000000 [all …]
|
D | nbio_6_1_default.h | 26 #define cfgPSWUSCFG0_VENDOR_ID_DEFAULT 0x00000000 27 #define cfgPSWUSCFG0_DEVICE_ID_DEFAULT 0x00000000 28 #define cfgPSWUSCFG0_COMMAND_DEFAULT 0x00000000 29 #define cfgPSWUSCFG0_STATUS_DEFAULT 0x00000000 30 #define cfgPSWUSCFG0_REVISION_ID_DEFAULT 0x00000000 31 #define cfgPSWUSCFG0_PROG_INTERFACE_DEFAULT 0x00000000 32 #define cfgPSWUSCFG0_SUB_CLASS_DEFAULT 0x00000000 33 #define cfgPSWUSCFG0_BASE_CLASS_DEFAULT 0x00000000 34 #define cfgPSWUSCFG0_CACHE_LINE_DEFAULT 0x00000000 35 #define cfgPSWUSCFG0_LATENCY_DEFAULT 0x00000000 [all …]
|
/linux-6.8/arch/mips/include/asm/sibyte/ |
D | bigsur.h | 19 #define LEDS_PHYS 0x100a0000 23 #define IDE_PHYS 0x100b0000 30 #define PCMCIA_PHYS 0x11000000
|
D | swarm.h | 18 #define SIBYTE_HAVE_PCMCIA 0 24 #define SIBYTE_HAVE_PCMCIA 0 25 #define SIBYTE_HAVE_IDE 0 30 #define LEDS_PHYS 0x100a0000 34 #define IDE_PHYS 0x100b0000 41 #define PCMCIA_PHYS 0x11000000
|
/linux-6.8/arch/arm/boot/dts/arm/ |
D | integratorap.dts | 17 #size-cells = <0>; 19 cpu@0 { 28 reg = <0>; 37 operating-points = <71000 0 38 66000 0 39 60000 0 40 48000 0 41 36000 0 42 24000 0 43 12000 0>; [all …]
|
/linux-6.8/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/ |
D | phytbl_n.c | 11 0x08004a04, 12 0x00100000, 13 0x01000a05, 14 0x00100020, 15 0x09804506, 16 0x00100030, 17 0x09804507, 18 0x00100030, 19 0x00000000, 20 0x00000000, [all …]
|
/linux-6.8/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
D | ramgp100.c | 47 * (likely selected by 0x9a065c's lower bits?), and the in gp100_ram_init() 52 if (!data || hdr < 0x15) in gp100_ram_init() 55 cnt = nvbios_rd08(bios, data + 0x14); /* guess at count */ in gp100_ram_init() 56 data = nvbios_rd32(bios, data + 0x10); /* guess u32... */ in gp100_ram_init() 58 u32 save = nvkm_rd32(device, 0x9a065c) & 0x000000f0; in gp100_ram_init() 59 for (i = 0; i < cnt; i++, data += 4) { in gp100_ram_init() 61 nvkm_mask(device, 0x9a065c, 0x000000f0, i << 4); in gp100_ram_init() 65 nvkm_mask(device, 0x9a065c, 0x000000f0, save); in gp100_ram_init() 68 nvkm_mask(device, 0x9a0584, 0x11000000, 0x00000000); in gp100_ram_init() 69 nvkm_wr32(device, 0x10ecc0, 0xffffffff); in gp100_ram_init() [all …]
|
/linux-6.8/drivers/net/wireless/broadcom/b43/ |
D | tables_nphy.c | 19 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 20 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 21 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 22 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 23 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 24 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 25 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 26 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 27 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 28 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, [all …]
|
/linux-6.8/arch/arm/mach-versatile/ |
D | integrator-hardware.h | 14 #define IO_BASE 0xF0000000 // VA of IO 15 #define IO_SIZE 0x0B000000 // How much? 19 #define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE) 25 #define INTEGRATOR_BOOT_ROM_LO 0x00000000 26 #define INTEGRATOR_BOOT_ROM_HI 0x20000000 40 #define INTEGRATOR_SSRAM_BASE 0x00000000 41 #define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000 44 #define INTEGRATOR_FLASH_BASE 0x24000000 47 #define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000 53 #define INTEGRATOR_SDRAM_BASE 0x00040000 [all …]
|
/linux-6.8/fs/freevxfs/ |
D | vxfs.h | 20 #define VXFS_SUPER_MAGIC 0xa501FCF5 176 * File modes. File types above 0xf000 are vxfs internal only, they should 181 VXFS_ISUID = 0x00000800, /* setuid */ 182 VXFS_ISGID = 0x00000400, /* setgid */ 183 VXFS_ISVTX = 0x00000200, /* sticky bit */ 184 VXFS_IREAD = 0x00000100, /* read */ 185 VXFS_IWRITE = 0x00000080, /* write */ 186 VXFS_IEXEC = 0x00000040, /* exec */ 188 VXFS_IFIFO = 0x00001000, /* Named pipe */ 189 VXFS_IFCHR = 0x00002000, /* Character device */ [all …]
|
/linux-6.8/Documentation/devicetree/bindings/pinctrl/ |
D | samsung,pinctrl.yaml | 80 "^[a-z]+[0-9]*-gpio-bank$": 145 reg = <0x7f008000 0x1000>; 151 interrupts-extended = <&vic0 0>, 153 <&vic1 0>, 168 samsung,pins = "gpa-0", "gpa-1"; 170 samsung,pin-pud = <0>; 181 reg = <0x11400000 0x1000>; 185 pinctrl-0 = <&sleep0>; 198 samsung,pins = "gpa0-0", "gpa0-1"; 200 samsung,pin-pud = <0>; [all …]
|
/linux-6.8/arch/mips/ath25/ |
D | ar2315_regs.h | 20 #define AR2315_IRQ_MISC (MIPS_CPU_IRQ_BASE + 2) /* C0_CAUSE: 0x0400 */ 21 #define AR2315_IRQ_WLAN0 (MIPS_CPU_IRQ_BASE + 3) /* C0_CAUSE: 0x0800 */ 22 #define AR2315_IRQ_ENET0 (MIPS_CPU_IRQ_BASE + 4) /* C0_CAUSE: 0x1000 */ 23 #define AR2315_IRQ_LCBUS_PCI (MIPS_CPU_IRQ_BASE + 5) /* C0_CAUSE: 0x2000 */ 24 #define AR2315_IRQ_WLAN0_POLL (MIPS_CPU_IRQ_BASE + 6) /* C0_CAUSE: 0x4000 */ 29 #define AR2315_MISC_IRQ_UART0 0 43 #define AR2315_SPI_READ_BASE 0x08000000 /* SPI flash */ 44 #define AR2315_SPI_READ_SIZE 0x01000000 45 #define AR2315_WLAN0_BASE 0x10000000 /* Wireless MMR */ 46 #define AR2315_PCI_BASE 0x10100000 /* PCI MMR */ [all …]
|
/linux-6.8/arch/arm/boot/dts/samsung/ |
D | exynos4210.dtsi | 178 #size-cells = <0>; 194 reg = <0x900>; 213 reg = <0x901>; 230 bus_leftbus_opp_table: opp-table-0 { 249 reg = <0x02020000 0x20000>; 252 ranges = <0 0x02020000 0x20000>; 254 smp-sram@0 { 256 reg = <0x0 0x1000>; 261 reg = <0x1f000 0x1000>; 267 reg = <0x10023ca0 0x20>; [all …]
|
D | exynos4x12.dtsi | 70 #interconnect-cells = <0>; 80 #interconnect-cells = <0>; 120 #interconnect-cells = <0>; 211 reg = <0x11400000 0x1000>; 217 reg = <0x11000000 0x1000>; 229 reg = <0x03860000 0x1000>; 231 interrupts = <10 0>; 236 reg = <0x106e0000 0x1000>; 242 reg = <0x02020000 0x40000>; 245 ranges = <0 0x02020000 0x40000>; [all …]
|
D | exynos3250.dtsi | 199 #size-cells = <0>; 212 cpu0: cpu@0 { 215 reg = <0>; 259 xusbxti: clock-0 { 261 clock-frequency = <0>; 262 #clock-cells = <0>; 268 clock-frequency = <0>; 269 #clock-cells = <0>; 275 clock-frequency = <0>; 276 #clock-cells = <0>; [all …]
|
/linux-6.8/drivers/gpu/drm/amd/include/ |
D | yellow_carp_offset.h | 19 static const struct IP_BASE ACP_BASE = { { { { 0x02403800, 0x00480000, 0, 0, 0, 0 } }, 20 { { 0, 0, 0, 0, 0, 0 } }, 21 { { 0, 0, 0, 0, 0, 0 } }, 22 { { 0, 0, 0, 0, 0, 0 } }, 23 { { 0, 0, 0, 0, 0, 0 } }, 24 { { 0, 0, 0, 0, 0, 0 } }, 25 { { 0, 0, 0, 0, 0, 0 } } } }; 26 static const struct IP_BASE ATHUB_BASE = { { { { 0x00000C00, 0x00013300, 0x02408C00, 0, 0, 0 } }, 27 { { 0, 0, 0, 0, 0, 0 } }, 28 { { 0, 0, 0, 0, 0, 0 } }, [all …]
|
D | vangogh_ip_offset.h | 42 static const struct IP_BASE ACP_BASE = { { { { 0x02403800, 0x00480000, 0, 0, 0, 0 } }, 43 { { 0, 0, 0, 0, 0, 0 } }, 44 { { 0, 0, 0, 0, 0, 0 } }, 45 { { 0, 0, 0, 0, 0, 0 } }, 46 { { 0, 0, 0, 0, 0, 0 } }, 47 { { 0, 0, 0, 0, 0, 0 } }, 48 { { 0, 0, 0, 0, 0, 0 } }, 49 { { 0, 0, 0, 0, 0, 0 } } } }; 50 static const struct IP_BASE ATHUB_BASE = { { { { 0x00000C00, 0x00013300, 0x02408C00, 0, 0, 0 } }, 51 { { 0, 0, 0, 0, 0, 0 } }, [all …]
|
/linux-6.8/arch/arm64/include/asm/ |
D | insn.h | 18 AARCH64_INSN_HINT_NOP = 0x0 << 5, 19 AARCH64_INSN_HINT_YIELD = 0x1 << 5, 20 AARCH64_INSN_HINT_WFE = 0x2 << 5, 21 AARCH64_INSN_HINT_WFI = 0x3 << 5, 22 AARCH64_INSN_HINT_SEV = 0x4 << 5, 23 AARCH64_INSN_HINT_SEVL = 0x5 << 5, 25 AARCH64_INSN_HINT_XPACLRI = 0x07 << 5, 26 AARCH64_INSN_HINT_PACIA_1716 = 0x08 << 5, 27 AARCH64_INSN_HINT_PACIB_1716 = 0x0A << 5, 28 AARCH64_INSN_HINT_AUTIA_1716 = 0x0C << 5, [all …]
|
/linux-6.8/drivers/net/usb/ |
D | lan78xx.h | 9 #define USB_VENDOR_REQUEST_WRITE_REGISTER 0xA0 10 #define USB_VENDOR_REQUEST_READ_REGISTER 0xA1 11 #define USB_VENDOR_REQUEST_GET_STATS 0xA2 32 #define TX_CMD_A_IGE_ (0x20000000) 33 #define TX_CMD_A_ICE_ (0x10000000) 34 #define TX_CMD_A_LSO_ (0x08000000) 35 #define TX_CMD_A_IPE_ (0x04000000) 36 #define TX_CMD_A_TPE_ (0x02000000) 37 #define TX_CMD_A_IVTG_ (0x01000000) 38 #define TX_CMD_A_RVTG_ (0x00800000) [all …]
|
/linux-6.8/arch/hexagon/kernel/ |
D | vm_init_segtable.S | 16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages. 46 /* VA 0x00000000 */ 59 /* VA 0x40000000 */ 68 /* VA 0x80000000 */ 74 /*0xa8*/.word X,X,X,X 77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000) 79 /*0xa9*/.word X,X,X,X 81 /*0xaa*/.word X,X,X,X 82 /*0xab*/.word X,X,X,X 83 /*0xac*/.word X,X,X,X [all …]
|
/linux-6.8/drivers/scsi/ |
D | pmcraid.h | 33 #define PMCRAID_FW_VERSION_1 0x002 38 /* Bit definitions as per firmware, bit position [0][1][2].....[31] */ 44 #define PCI_VENDOR_ID_PMC 0x11F8 45 #define PCI_DEVICE_ID_PMC_MAXRAID 0x5220 92 #define PMCRAID_IOA_BUS_ID 0xfe 93 #define PMCRAID_IOA_TARGET_ID 0xff 94 #define PMCRAID_IOA_LUN_ID 0xff 95 #define PMCRAID_VSET_BUS_ID 0x1 96 #define PMCRAID_VSET_LUN_ID 0x0 97 #define PMCRAID_PHYS_BUS_ID 0x0 [all …]
|
/linux-6.8/arch/mips/include/asm/mach-ath79/ |
D | ar71xx_regs.h | 19 #define AR71XX_APB_BASE 0x18000000 20 #define AR71XX_GE0_BASE 0x19000000 21 #define AR71XX_GE0_SIZE 0x10000 22 #define AR71XX_GE1_BASE 0x1a000000 23 #define AR71XX_GE1_SIZE 0x10000 24 #define AR71XX_EHCI_BASE 0x1b000000 25 #define AR71XX_EHCI_SIZE 0x1000 26 #define AR71XX_OHCI_BASE 0x1c000000 27 #define AR71XX_OHCI_SIZE 0x1000 28 #define AR71XX_SPI_BASE 0x1f000000 [all …]
|
/linux-6.8/crypto/ |
D | aes_generic.c | 67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6, 68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591, 69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56, 70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec, 71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa, 72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb, 73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45, 74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b, 75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c, 76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83, [all …]
|
/linux-6.8/Documentation/devicetree/bindings/cpu/ |
D | idle-states.yaml | 102 between 0 and infinite time, until a wake-up event occurs. 127 wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0) 167 0| 1 time(ms) 172 The graph curve with X-axis values = { x | 0 < x < 1ms } has a steep slope 444 #size-cells = <0>; 447 cpu@0 { 450 reg = <0x0 0x0>; 459 reg = <0x0 0x1>; 468 reg = <0x0 0x100>; 477 reg = <0x0 0x101>; [all …]
|