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/linux/drivers/crypto/caam/ !
H A Dregs.h38 * - MCFG begins at base+0x0000.
39 * - Bits 63-32 are a 32-bit word at base+0x0000 (numerically-lower)
40 * - Bits 31-0 are a 32-bit word at base+0x0004 (numerically-higher)
42 * (and on Power, the convention is 0-31, 32-63, I know...)
45 * would then require a write of 0 to base+0x0000, followed by a
46 * write of 0x80000000 to base+0x0004, which would "execute" the
50 * write 0x8000000 to base+0x0004, and the reset would work fine.
132 * base + 0x0000 : most-significant 32 bits
133 * base + 0x0004 : least-significant 32 bits
135 * The 32-bit version of this core therefore has to write to base + 0x0004
[all …]
/linux/drivers/accel/habanalabs/include/goya/asic_reg/ !
H A Dmme_masks.h23 #define MME_ARCH_STATUS_A_SHIFT 0
24 #define MME_ARCH_STATUS_A_MASK 0x1
26 #define MME_ARCH_STATUS_B_MASK 0x2
28 #define MME_ARCH_STATUS_CIN_MASK 0x4
30 #define MME_ARCH_STATUS_COUT_MASK 0x8
32 #define MME_ARCH_STATUS_TE_MASK 0x10
34 #define MME_ARCH_STATUS_LD_MASK 0x20
36 #define MME_ARCH_STATUS_ST_MASK 0x40
38 #define MME_ARCH_STATUS_SB_A_EMPTY_MASK 0x80
40 #define MME_ARCH_STATUS_SB_B_EMPTY_MASK 0x100
[all …]
/linux/include/dt-bindings/pinctrl/ !
H A Dkeystone.h11 #define MUX_MODE0 0
18 #define BUFFER_CLASS_B (0 << 19)
25 #define PIN_PULLDOWN (0 << 17)
27 #define KEYSTONE_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset))
29 #define K2G_CORE_IOPAD(pa) KEYSTONE_IOPAD_OFFSET((pa), 0x1000)
/linux/sound/soc/codecs/ !
H A Dwm9090.h16 #define WM9090_SOFTWARE_RESET 0x00
17 #define WM9090_POWER_MANAGEMENT_1 0x01
18 #define WM9090_POWER_MANAGEMENT_2 0x02
19 #define WM9090_POWER_MANAGEMENT_3 0x03
20 #define WM9090_CLOCKING_1 0x06
21 #define WM9090_IN1_LINE_CONTROL 0x16
22 #define WM9090_IN2_LINE_CONTROL 0x17
23 #define WM9090_IN1_LINE_INPUT_A_VOLUME 0x18
24 #define WM9090_IN1_LINE_INPUT_B_VOLUME 0x19
25 #define WM9090_IN2_LINE_INPUT_A_VOLUME 0x1A
[all …]
/linux/arch/riscv/boot/dts/sophgo/ !
H A Dcv181x.dtsi13 reg = <0x4300000 0x1000>;
/linux/Documentation/devicetree/bindings/hwinfo/ !
H A Dsamsung,s5pv210-chipid.yaml29 reg = <0xe0000000 0x1000>;
/linux/Documentation/devicetree/bindings/usb/ !
H A Dohci-da8xx.txt18 reg = <0x225000 0x1000>;
/linux/Documentation/devicetree/bindings/nvmem/ !
H A Dlpc1850-otp.txt17 reg = <0x40045000 0x1000>;
/linux/lib/ !
H A Dtest_maple_tree.c14 #define MTREE_ALLOC_MAX 0x2000000000000Ul
19 #define mt_dump(mt, fmt) do {} while (0)
20 #define mt_validate(mt) do {} while (0)
21 #define mt_cache_shrink() do {} while (0)
22 #define mas_dump(mas) do {} while (0)
23 #define mas_wr_dump(mas) do {} while (0)
39 } while (0)
53 #define mt_set_non_kernel(x) do {} while (0)
54 #define mt_zero_nr_tallocated(x) do {} while (0)
56 #define cond_resched() do {} while (0)
[all …]
/linux/Documentation/devicetree/bindings/net/ !
H A Dfsl,fman-dtsec.yaml153 cell-index = <0>;
154 reg = <0xe0000 0x1000>;
163 reg = <0xe8000 0x1000>;
/linux/Documentation/devicetree/bindings/mfd/ !
H A Domap-usb-tll.txt16 * "usb_tll_hs_usb_ch0_clk" - USB TLL channel 0 clock
24 reg = <0x4a062000 0x1000>;
H A Datmel-smc.txt21 reg = <0xffffc000 0x1000>;
/linux/Documentation/devicetree/bindings/mtd/ !
H A Dhisilicon,fmc-spi-nor.txt7 - size-cells : Should be 0.
16 #size-cells = <0>;
17 reg = <0x10000000 0x1000>, <0x14000000 0x1000000>;
20 flash@0 {
22 reg = <0>;
/linux/tools/arch/parisc/include/uapi/asm/ !
H A Dmman.h13 #define MADV_NORMAL 0
19 #define MAP_ANONYMOUS 0x10
20 #define MAP_DENYWRITE 0x0800
21 #define MAP_EXECUTABLE 0x1000
22 #define MAP_FILE 0
23 #define MAP_FIXED 0x04
24 #define MAP_GROWSDOWN 0x8000
25 #define MAP_HUGETLB 0x80000
26 #define MAP_LOCKED 0x2000
27 #define MAP_NONBLOCK 0x20000
[all …]
/linux/arch/mips/boot/dts/img/ !
H A Dboston.dts24 #size-cells = <0>;
26 cpu@0 {
29 reg = <0>;
34 memory@0 {
36 reg = <0x00000000 0x10000000>;
42 reg = <0x10000000 0x2000000>;
51 ranges = <0x02000000 0 0x40000000
52 0x40000000 0 0x40000000>;
54 bus-range = <0x00 0xff>;
56 interrupt-map-mask = <0 0 0 7>;
[all …]
/linux/drivers/net/wireless/realtek/rtl818x/rtl8180/ !
H A Dgrf5101.c27 0x0, 0x8, 0x4, 0xC,
28 0x2, 0xA, 0x6, 0xE,
29 0x1, 0x9, 0x5, 0xD,
30 0x3, 0xB, 0x7, 0xF
38 phy_config = grf5101_encode[(data >> 8) & 0xF]; in write_grf5101()
39 phy_config |= grf5101_encode[(data >> 4) & 0xF] << 4; in write_grf5101()
40 phy_config |= grf5101_encode[data & 0xF] << 8; in write_grf5101()
41 phy_config |= grf5101_encode[(addr >> 1) & 0xF] << 12; in write_grf5101()
43 phy_config |= grf5101_encode[(data & 0xf000) >> 12] << 24; in write_grf5101()
46 phy_config |= 0x90000000; in write_grf5101()
[all …]
/linux/arch/arm/boot/dts/nxp/imx/ !
H A Dimx51-ts4800.dts22 reg = <0x90000000 0x10000000>;
38 pinctrl-0 = <&pinctrl_enable_lcd>;
48 pwms = <&pwm1 0 78770 0>;
49 brightness-levels = <0 150 200 255>;
58 pinctrl-0 = <&pinctrl_lcd>;
69 vback-porch = <0>;
70 vfront-porch = <0>;
85 pinctrl-0 = <&pinctrl_esdhc1>;
86 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
93 pinctrl-0 = <&pinctrl_fec>;
[all …]
/linux/arch/arm/boot/dts/socionext/ !
H A Duniphier-support-card.dtsi10 ranges = <1 0x00000000 0x42000000 0x02000000>;
14 reg = <1 0x01f00000 0x1000>;
22 reg = <1 0x01fb0000 0x20>;
/linux/Documentation/devicetree/bindings/sound/ !
H A Dmarvell,pxa2xx-ac97.txt15 - pinctrl-names, pinctrl-0: refer to pinctrl-bindings.txt
21 reg = < 0x40500000 0x1000 >;
26 pinctrl-0 = < &pmux_ac97_default >;
/linux/arch/arm/boot/dts/intel/ixp/ !
H A Dintel-ixp42x.dtsi12 reg = <0xc4000000 0x30>;
29 reg = <0xc800b000 0x1000>;
/linux/arch/arm/boot/dts/ti/omap/ !
H A Ddra74x.dtsi49 reg = <0x41500000 0x100>;
55 reg = <0x41501000 0x4>,
56 <0x41501010 0x4>,
57 <0x41501014 0x4>;
65 clocks = <&dsp2_clkctrl DRA7_DSP2_MMU0_DSP2_CLKCTRL 0>;
69 ranges = <0x0 0x41501000 0x1000>;
73 mmu0_dsp2: mmu@0 {
75 reg = <0x0 0x100>;
77 #iommu-cells = <0>;
78 ti,syscon-mmuconfig = <&dsp2_system 0x0>;
[all …]
/linux/Documentation/devicetree/bindings/w1/ !
H A Domap-hdq.txt18 reg = <0x480b2000 0x1000>;
/linux/drivers/net/ethernet/amd/ !
H A Da2065.h19 * Publication #16907, Rev. B, Amendment/0, May 1994
50 #define LE_CSR0 0x0000 /* LANCE Controller Status */
51 #define LE_CSR1 0x0001 /* IADR[15:0] */
52 #define LE_CSR2 0x0002 /* IADR[23:16] */
53 #define LE_CSR3 0x0003 /* Misc */
60 #define LE_C0_ERR 0x8000 /* Error */
61 #define LE_C0_BABL 0x4000 /* Babble: Transmitted too many bits */
62 #define LE_C0_CERR 0x2000 /* No Heartbeat (10BASE-T) */
63 #define LE_C0_MISS 0x1000 /* Missed Frame */
64 #define LE_C0_MERR 0x0800 /* Memory Error */
[all …]
/linux/include/linux/qed/ !
H A Diwarp_common.h16 #define IWARP_ACTIVE_MODE 0
19 #define IWARP_SHARED_QUEUE_PAGE_SIZE (0x8000)
20 #define IWARP_SHARED_QUEUE_PAGE_RQ_PBL_OFFSET (0x4000)
21 #define IWARP_SHARED_QUEUE_PAGE_RQ_PBL_MAX_SIZE (0x1000)
22 #define IWARP_SHARED_QUEUE_PAGE_SQ_PBL_OFFSET (0x5000)
23 #define IWARP_SHARED_QUEUE_PAGE_SQ_PBL_MAX_SIZE (0x3000)
/linux/arch/arm64/boot/dts/apple/ !
H A Dt7001.dtsi25 #clock-cells = <0>;
32 #size-cells = <0>;
34 cpu0: cpu@0 {
36 reg = <0x0 0x0>;
37 cpu-release-addr = <0 0>; /* To be filled in by loader */
43 i-cache-size = <0x10000>;
44 d-cache-size = <0x10000>;
49 reg = <0x0 0x1>;
50 cpu-release-addr = <0 0>; /* To be filled in by loader */
56 i-cache-size = <0x10000>;
[all …]

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