Searched +full:0 +full:x0b011000 (Results 1 – 6 of 6) sorted by relevance
76 enum: [0, 1]191 const: 0200 reg = <0x9820000 0x1000>;203 #clock-cells = <0>;210 mboxes = <&apcs_glb 0>;220 reg = <0x0b011000 0x1000>;224 #clock-cells = <0>;
26 #clock-cells = <0>;32 #size-cells = <0>;34 CPU0: cpu@0 {37 reg = <0x0>;48 reg = <0x1>;59 reg = <0x2>;70 reg = <0x3>;81 reg = <0x100>;92 reg = <0x101>;103 reg = <0x102>;[all …]
24 #clock-cells = <0>;30 #clock-cells = <0>;37 #size-cells = <0>;42 reg = <0x100>;56 reg = <0x101>;70 reg = <0x102>;84 reg = <0x103>;104 CPU_SLEEP_0: cpu-sleep-0 {107 arm,psci-suspend-param = <0x40000003>;161 reg = <0 0x80000000 0 0>;[all …]
25 #clock-cells = <0>;31 #clock-cells = <0>;39 #size-cells = <0>;41 CPU0: cpu@0 {44 reg = <0x0>;54 reg = <0x1>;64 reg = <0x2>;74 reg = <0x3>;84 reg = <0x100>;94 reg = <0x101>;[all …]
30 #clock-cells = <0>;36 #clock-cells = <0>;43 #size-cells = <0>;49 reg = <0x100>;67 reg = <0x101>;80 reg = <0x102>;93 reg = <0x103>;102 CPU4: cpu@0 {106 reg = <0x0>;124 reg = <0x1>;[all …]
27 reg = <0 0x80000000 0 0>;36 reg = <0x0 0x86000000 0x0 0x300000>;42 reg = <0x0 0x86300000 0x0 0x100000>;50 reg = <0x0 0x86400000 0x0 0x100000>;55 reg = <0x0 0x86500000 0x0 0x180000>;60 reg = <0x0 0x86680000 0x0 0x80000>;66 reg = <0x0 0x86700000 0x0 0xe0000>;73 reg = <0x0 0x867e0000 0x0 0x20000>;85 * alignment = <0x0 0x400000>;86 * alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;[all …]