Searched +full:0 +full:x0ae97200 (Results 1 – 4 of 4) sorted by relevance
38 "^display-controller@[0-9a-f]+$":44 "^displayport-controller@[0-9a-f]+$":50 "^dsi@[0-9a-f]+$":58 "^phy@[0-9a-f]+$":77 reg = <0x0ae00000 0x1000>;93 iommus = <&apps_smmu 0x1c00 0x2>;101 reg = <0x0ae01000 0x8f000>,102 <0x0aeb0000 0x2008>;123 interrupts = <0>;127 #size-cells = <0>;[all …]
39 "^display-controller@[0-9a-f]+$":47 "^displayport-controller@[0-9a-f]+$":57 "^dsi@[0-9a-f]+$":67 "^phy@[0-9a-f]+$":91 reg = <0x0ae00000 0x1000>;94 interconnects = <&mmss_noc MASTER_MDP 0 &gem_noc SLAVE_LLCC 0>,95 <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>;112 iommus = <&apps_smmu 0x1c00 0x2>;120 reg = <0x0ae01000 0x8f000>,121 <0x0aeb0000 0x2008>;[all …]
38 #clock-cells = <0>;43 #clock-cells = <0>;48 #clock-cells = <0>;57 #clock-cells = <0>;66 #clock-cells = <0>;72 #size-cells = <0>;74 CPU0: cpu@0 {77 reg = <0 0>;79 clocks = <&cpufreq_hw 0>;89 qcom,freq-domain = <&cpufreq_hw 0>;[all …]
38 #clock-cells = <0>;43 #clock-cells = <0>;47 #clock-cells = <0>;55 #clock-cells = <0>;64 #clock-cells = <0>;70 #size-cells = <0>;72 CPU0: cpu@0 {75 reg = <0 0>;76 clocks = <&cpufreq_hw 0>;81 qcom,freq-domain = <&cpufreq_hw 0>;[all …]