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/kvm-unit-tests/lib/x86/
H A Dfwcfg.h7 #define FW_CFG_SIGNATURE 0x00
8 #define FW_CFG_ID 0x01
9 #define FW_CFG_UUID 0x02
10 #define FW_CFG_RAM_SIZE 0x03
11 #define FW_CFG_NOGRAPHIC 0x04
12 #define FW_CFG_NB_CPUS 0x05
13 #define FW_CFG_MACHINE_ID 0x06
14 #define FW_CFG_KERNEL_ADDR 0x07
15 #define FW_CFG_KERNEL_SIZE 0x08
16 #define FW_CFG_KERNEL_CMDLINE 0x09
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H A Dio.c12 static int serial_iobase = 0x3f8;
13 static int serial_inited = 0;
20 lsr = inb(serial_iobase + 0x05); in serial_outb()
21 } while (!(lsr & 0x20)); in serial_outb()
23 outb(ch, serial_iobase + 0x00); in serial_outb()
39 lcr = inb(serial_iobase + 0x03); in serial_init()
40 lcr |= 0x80; in serial_init()
41 outb(lcr, serial_iobase + 0x03); in serial_init()
44 outb(0x01, serial_iobase + 0x00); in serial_init()
45 outb(0x00, serial_iobase + 0x01); in serial_init()
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/kvm-unit-tests/lib/arm64/asm/
H A Desr.h16 #define ESR_EL1_EC_UNKNOWN (0x00)
17 #define ESR_EL1_EC_WFI (0x01)
18 #define ESR_EL1_EC_CP15_32 (0x03)
19 #define ESR_EL1_EC_CP15_64 (0x04)
20 #define ESR_EL1_EC_CP14_MR (0x05)
21 #define ESR_EL1_EC_CP14_LS (0x06)
22 #define ESR_EL1_EC_FP_ASIMD (0x07)
23 #define ESR_EL1_EC_CP10_ID (0x08)
24 #define ESR_EL1_EC_CP14_64 (0x0C)
25 #define ESR_EL1_EC_ILL_ISS (0x0E)
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H A Dgic-v3-its.h65 #define GITS_CTLR 0x0000
66 #define GITS_IIDR 0x0004
67 #define GITS_TYPER 0x0008
68 #define GITS_CBASER 0x0080
69 #define GITS_CWRITER 0x0088
70 #define GITS_CREADR 0x0090
71 #define GITS_BASER 0x0100
73 #define GITS_TYPER_PLPIS BIT(0)
86 #define GITS_CTLR_ENABLE (1U << 0)
95 #define GITS_BASER_ENTRY_SIZE(r) ((((r) >> GITS_BASER_ENTRY_SIZE_SHIFT) & 0x1f) + 1)
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/kvm-unit-tests/arm/
H A Dpl031.c54 uint32_t id[] = { 0x31, 0x10, 0x14, 0x00, 0x0d, 0xf0, 0x05, 0xb1 }; in check_id()
57 for (i = 0; i < ARRAY_SIZE(id); i++) in check_id()
61 return 0; in check_id()
68 offsetof(struct pl031_regs, periph_id[0]), in check_ro()
72 offsetof(struct pl031_regs, pcell_id[0]), in check_ro()
78 for (i = 0; i < ARRAY_SIZE(offs); i++) { in check_ro()
83 uint32_t poison = 0xdeadbeefULL; in check_ro()
101 return 0; in check_ro()
117 return 0; in check_rtc_freq()
141 report(readl(&pl031->ris) == 0, " RTC RIS == 0"); in irq_handler()
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/kvm-unit-tests/lib/s390x/
H A Dsclp-console.c27 0x00, 0x01, 0x02, 0x03, 0x37, 0x2D, 0x2E, 0x2F,
30 0x16, 0x05, 0x15, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
32 0x10, 0x11, 0x12, 0x13, 0x3C, 0x3D, 0x32, 0x26,
35 0x18, 0x19, 0x3F, 0x27, 0x22, 0x1D, 0x1E, 0x1F,
37 0x40, 0x5A, 0x7F, 0x7B, 0x5B, 0x6C, 0x50, 0x7D,
39 0x4D, 0x5D, 0x5C, 0x4E, 0x6B, 0x60, 0x4B, 0x61,
40 /*30 0 1 2 3 4 5 6 7 */
41 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7,
43 0xF8, 0xF9, 0x7A, 0x5E, 0x4C, 0x7E, 0x6E, 0x6F,
45 0x7C, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7,
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/kvm-unit-tests/riscv/
H A Dcstart.S27 REG_S zero, 0(\tmp1)
49 .dword 0x200000 // text offset
51 .dword 0 // flags
52 .word (0 << 16 | 2 << 0) // version
53 .word 0 // res1
54 .dword 0 // res2
55 .ascii "RISCV\0\0\0" // magic
56 .ascii "RSC\x05" // magic2
57 .word 0 // res3
82 REG_S a5, 0(a4) // *addr = val
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/kvm-unit-tests/lib/linux/
H A Dpci_regs.h30 #define PCI_VENDOR_ID 0x00 /* 16 bits */
31 #define PCI_DEVICE_ID 0x02 /* 16 bits */
32 #define PCI_COMMAND 0x04 /* 16 bits */
33 #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
34 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
35 #define PCI_COMMAND_MASTER 0x4 /* Enable bus mastering */
36 #define PCI_COMMAND_SPECIAL 0x8 /* Enable response to special cycles */
37 #define PCI_COMMAND_INVALIDATE 0x10 /* Use memory write and invalidate */
38 #define PCI_COMMAND_VGA_PALETTE 0x20 /* Enable palette snooping */
39 #define PCI_COMMAND_PARITY 0x40 /* Enable parity checking */
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H A Defi.h15 #define EFI_ERROR(a) (((int64_t) a) < 0)
16 #define EFI_SUCCESS 0
62 (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, \
63 (b) & 0xff, ((b) >> 8) & 0xff, \
64 (c) & 0xff, ((c) >> 8) & 0xff, d } }
66 #define ACPI_TABLE_GUID EFI_GUID(0xeb9d2d30, 0x2d88, 0x11d3, 0x9a, 0x16, 0x00, 0x90, 0x27, 0x3f, 0x…
67 #define ACPI_20_TABLE_GUID EFI_GUID(0x8868e871, 0xe4f1, 0x11d3, 0xbc, 0x22, 0x00, 0x80, 0xc7, 0x3c…
69 #define DEVICE_TREE_GUID EFI_GUID(0xb1b621d5, 0xf19c, 0x41a5, 0x83, 0x0b, 0xd9, 0x15, 0x2c, 0x69, …
71 …ine LOADED_IMAGE_PROTOCOL_GUID EFI_GUID(0x5b1b31a1, 0x9562, 0x11d2, 0x8e, 0x3f, 0x00, 0xa0, 0xc9,…
73 …e EFI_LOAD_FILE2_PROTOCOL_GUID EFI_GUID(0x4006c0c1, 0xfcb3, 0x403e, 0x99, 0x6d, 0x4a, 0x6c, 0x87,…
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/kvm-unit-tests/lib/s390x/asm/
H A Darch_def.h20 /* FPRs 0, 2, 4, 6 */
33 /* GRs 0 and 1 */
90 AS_PRIM = 0,
96 #define PSW_MASK_DAT 0x0400000000000000UL
97 #define PSW_MASK_HOME 0x0000C00000000000UL
98 #define PSW_MASK_IO 0x0200000000000000UL
99 #define PSW_MASK_EXT 0x0100000000000000UL
100 #define PSW_MASK_KEY 0x00F0000000000000UL
101 #define PSW_MASK_WAIT 0x0002000000000000UL
102 #define PSW_MASK_PSTATE 0x0001000000000000UL
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/kvm-unit-tests/x86/
H A Demulator64.c1 #define MAGIC_NUM 0xdeadbeefdeadbeefUL
2 #define GS_BASE 0x400000
20 unsigned long memw = 0x123456789abcdeful; in test_push()
22 memset(mem, 0x55, (void *)stack_top - mem); in test_push()
39 report(stack_top[-3] == 0x123456789abcdeful, "push mem"); in test_push()
47 unsigned long memw = 0x123456789abcdeful; in test_pop()
50 memset(mem, 0x55, (void *)stack_top - mem); in test_pop()
90 stack_top[-1] = 0x778899; in test_pop()
101 report(tmp == (ulong)stack_top && tmp3 == 0x778899, "leave"); in test_pop()
103 rbp = 0xaa55aa55bb66bb66ULL; in test_pop()
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H A Drealmode.c7 #define ARRAY_SIZE(_a) (sizeof(_a)/sizeof((_a)[0]))
17 #define NULL ((void*)0)
25 "mov $0x1234, %eax \n\t"
33 for (n = 0; *str; ++str) in strlen()
40 asm volatile("out %0, %1" : : "a"(data), "d"(port)); in outb()
44 static int serial_iobase = 0x3f8;
45 static int serial_inited = 0;
50 asm volatile("in %1, %0" : "=a"(data) : "d"(port)); in inb()
59 lsr = inb(serial_iobase + 0x05); in serial_outb()
60 } while (!(lsr & 0x20)); in serial_outb()
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