Searched +full:0 +full:x00100000 (Results 1 – 25 of 880) sorted by relevance
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| /linux-5.10/include/video/ |
| D | tdfx.h | 9 #define STATUS 0x00
10 #define PCIINIT0 0x04
11 #define SIPMONITOR 0x08
12 #define LFBMEMORYCONFIG 0x0c
13 #define MISCINIT0 0x10
14 #define MISCINIT1 0x14
15 #define DRAMINIT0 0x18
16 #define DRAMINIT1 0x1c
17 #define AGPINIT 0x20
18 #define TMUGBEINIT 0x24
[all …]
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| /linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| D | ctxgv100.c | 30 { 0x00001000, 64, 0x00100000, 0x00000008 },
31 { 0x00000941, 64, 0x00100000, 0x00000000 },
32 { 0x0000097e, 64, 0x00100000, 0x00000000 },
33 { 0x0000097f, 64, 0x00100000, 0x00000100 },
34 { 0x0000035c, 64, 0x00100000, 0x00000000 },
35 { 0x0000035d, 64, 0x00100000, 0x00000000 },
36 { 0x00000a08, 64, 0x00100000, 0x00000000 },
37 { 0x00000a09, 64, 0x00100000, 0x00000000 },
38 { 0x00000a0a, 64, 0x00100000, 0x00000000 },
39 { 0x00000352, 64, 0x00100000, 0x00000000 },
[all …]
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| /linux-5.10/arch/powerpc/boot/dts/fsl/ |
| D | sbc8641d.dts | 20 reg = <0x00000000 0x20000000>; // 512M at 0x0
24 reg = <0xf8005000 0x1000>;
26 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
27 1 0 0xf0000000 0x00010000 // 64KB EEPROM
28 2 0 0xf1000000 0x00100000 // EPLD (1MB)
29 3 0 0xe0000000 0x04000000 // 64MB LB SDRAM (CS3)
30 4 0 0xe4000000 0x04000000 // 64MB LB SDRAM (CS4)
31 6 0 0xf4000000 0x00100000 // LCD display (1MB)
32 7 0 0xe8000000 0x04000000>; // 64MB OneNAND
34 flash@0,0 {
[all …]
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| D | c293pcie.dts | 46 reg = <0xf 0xffe1e000 0 0x2000>;
47 ranges = <0x0 0x0 0xf 0xec000000 0x04000000
48 0x1 0x0 0xf 0xff800000 0x00010000
49 0x2 0x0 0xf 0xffdf0000 0x00010000>;
54 ranges = <0x0 0xf 0xffe00000 0x100000>;
58 reg = <0xf 0xffe0a000 0 0x1000>;
59 ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0x80000000
[all …]
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| D | p1021mds.dts | 23 reg = <0x0 0xffe05000 0x0 0x1000>;
26 ranges = <0x0 0x0 0x0 0xfc000000 0x02000000
27 0x1 0x0 0x0 0xf8000000 0x00008000
28 0x2 0x0 0x0 0xf8010000 0x00020000
29 0x3 0x0 0x0 0xf8020000 0x00020000>;
31 nand@0,0 {
36 reg = <0x0 0x0 0x40000>;
38 partition@0 {
41 reg = <0x0 0x00100000>;
48 reg = <0x00100000 0x00100000>;
[all …]
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| D | p1020rdb-pd.dts | 45 reg = <0x0 0xffe05000 0x0 0x1000>;
48 ranges = <0x0 0x0 0x0 0xec000000 0x04000000
49 0x1 0x0 0x0 0xff800000 0x00040000
50 0x2 0x0 0x0 0xffa00000 0x00020000
51 0x3 0x0 0x0 0xffb00000 0x00020000>;
53 nor@0,0 {
57 reg = <0x0 0x0 0x4000000>;
61 partition@0 {
63 reg = <0x0 0x00020000>;
69 reg = <0x00020000 0x003e0000>;
[all …]
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| D | p1024rdb.dtsi | 36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
60 reg = <0x00080000 0x00380000>;
66 reg = <0x00400000 0x00b00000>;
74 reg = <0x00f00000 0x00100000>;
80 nand@1,0 {
85 reg = <0x1 0x0 0x40000>;
[all …]
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| D | p2020rdb-pc.dtsi | 36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
60 reg = <0x00080000 0x00380000>;
66 reg = <0x00400000 0x00b00000>;
74 reg = <0x00f00000 0x00100000>;
80 nand@1,0 {
85 reg = <0x1 0x0 0x40000>;
[all …]
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| D | p1020rdb-pc.dtsi | 36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
60 reg = <0x00080000 0x00380000>;
66 reg = <0x00400000 0x00b00000>;
74 reg = <0x00f00000 0x00100000>;
80 nand@1,0 {
85 reg = <0x1 0x0 0x40000>;
[all …]
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| D | p1020rdb.dtsi | 36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
61 reg = <0x00080000 0x00380000>;
68 reg = <0x00400000 0x00b00000>;
76 reg = <0x00f00000 0x00100000>;
82 nand@1,0 {
87 reg = <0x1 0x0 0x40000>;
[all …]
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| D | p1010rdb-pa.dtsi | 36 partition@0 {
39 reg = <0x0 0x00100000>;
46 reg = <0x00100000 0x00100000>;
52 reg = <0x00200000 0x00400000>;
58 reg = <0x00600000 0x00400000>;
64 reg = <0x00a00000 0x00f00000>;
70 reg = <0x01900000 0x00700000>;
76 interrupts = <1 1 0 0>;
80 interrupts = <2 1 0 0>;
84 interrupts = <4 1 0 0>;
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| D | p2020rdb.dts | 29 reg = <0 0xffe05000 0 0x1000>;
32 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
33 0x1 0x0 0x0 0xffa00000 0x00040000
34 0x2 0x0 0x0 0xffb00000 0x00020000>;
36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
61 reg = <0x00080000 0x00380000>;
[all …]
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| D | p1021rdb-pc.dtsi | 36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
60 reg = <0x00080000 0x00380000>;
66 reg = <0x00400000 0x00ac0000>;
73 reg = <0x00ec0000 0x00040000>;
82 reg = <0x00f00000 0x00100000>;
87 nand@1,0 {
[all …]
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| D | p1023rdb.dts | 56 size = <0 0x1000000>;
57 alignment = <0 0x1000000>;
60 size = <0 0x400000>;
61 alignment = <0 0x400000>;
64 size = <0 0x2000000>;
65 alignment = <0 0x2000000>;
70 ranges = <0x0 0xf 0xff000000 0x200000>;
74 ranges = <0x0 0xf 0xff200000 0x200000>;
78 ranges = <0x0 0x0 0xff600000 0x200000>;
83 reg = <0x53>;
[all …]
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| /linux-5.10/drivers/gpu/drm/etnaviv/ |
| D | common.xml.h | 7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
43 #define PIPE_ID_PIPE_3D 0x00000000
44 #define PIPE_ID_PIPE_2D 0x00000001
45 #define SYNC_RECIPIENT_FE 0x00000001
46 #define SYNC_RECIPIENT_RA 0x00000005
47 #define SYNC_RECIPIENT_PE 0x00000007
48 #define SYNC_RECIPIENT_DE 0x0000000b
49 #define SYNC_RECIPIENT_BLT 0x00000010
50 #define ENDIAN_MODE_NO_SWAP 0x00000000
[all …]
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| /linux-5.10/arch/arm/mach-pxa/include/mach/ |
| D | addr-map.h | 8 #define PXA_CS0_PHYS 0x00000000
9 #define PXA_CS1_PHYS 0x04000000
10 #define PXA_CS2_PHYS 0x08000000
11 #define PXA_CS3_PHYS 0x0C000000
12 #define PXA_CS4_PHYS 0x10000000
13 #define PXA_CS5_PHYS 0x14000000
15 #define PXA300_CS0_PHYS 0x00000000 /* PXA300/PXA310 _only_ */
16 #define PXA300_CS1_PHYS 0x30000000 /* PXA300/PXA310 _only_ */
17 #define PXA3xx_CS2_PHYS 0x10000000
18 #define PXA3xx_CS3_PHYS 0x14000000
[all …]
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| /linux-5.10/arch/arm/boot/dts/ |
| D | keystone-k2hk.dtsi | 16 #size-cells = <0>;
20 cpu@0 {
23 reg = <0>;
62 reg = <0x0c000000 0x600000>;
63 ranges = <0x0 0x0c000000 0x600000>;
68 reg = <0x5f0000 0x8000>;
78 0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
79 0xa40 8 0xa40 8 0x840 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 1: dsp1 */
80 0xa44 8 0xa44 8 0x844 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 2: dsp2 */
81 0xa48 8 0xa48 8 0x848 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 3: dsp3 */
[all …]
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| D | bcm47189-luxul-xap-810.dts | 18 memory@0 {
20 reg = <0x00000000 0x08000000>;
61 ranges = <0x00000000 0 0 0 0 0x00100000>;
65 bridge@0,0,0 {
66 reg = <0x0000 0 0 0 0>;
67 ranges = <0x00000000 0 0 0 0 0 0 0x00100000>;
71 wifi@0,1,0 {
72 reg = <0x0000 0 0 0 0>;
73 ranges = <0x00000000 0 0 0 0x00100000>;
77 pcie0_chipcommon: chipcommon@0 {
[all …]
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| D | bcm947189acdbmr.dts | 20 memory@0 {
22 reg = <0x00000000 0x08000000>;
63 gpio-sck = <&chipcommon 21 0>;
64 gpio-miso = <&chipcommon 22 0>;
65 gpio-mosi = <&chipcommon 23 0>;
66 cs-gpios = <&chipcommon 24 0>;
68 #size-cells = <0>;
75 ranges = <0x00000000 0 0 0 0 0x00100000>;
79 bridge@0,0,0 {
80 reg = <0x0000 0 0 0 0>;
[all …]
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| D | bcm47189-tenda-ac9.dts | 18 memory@0 {
20 reg = <0x00000000 0x08000000>;
83 ranges = <0x00000000 0 0 0 0 0x00100000>;
87 bridge@0,0,0 {
88 reg = <0x0000 0 0 0 0>;
89 ranges = <0x00000000 0 0 0 0 0 0 0x00100000>;
93 wifi@0,1,0 {
94 reg = <0x0000 0 0 0 0>;
95 ranges = <0x00000000 0 0 0 0x00100000>;
99 pcie0_chipcommon: chipcommon@0 {
[all …]
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| /linux-5.10/arch/arm/mach-footbridge/include/mach/ |
| D | hardware.h | 13 * 0xff800000 0x40000000 1MB X-Bus
14 * 0xff000000 0x7c000000 1MB PCI I/O space
15 * 0xfe000000 0x42000000 1MB CSR
16 * 0xfd000000 0x78000000 1MB Outbound write flush (not supported)
17 * 0xfc000000 0x79000000 1MB PCI IACK/special space
18 * 0xfb000000 0x7a000000 16MB PCI Config type 1
19 * 0xfa000000 0x7b000000 16MB PCI Config type 0
20 * 0xf9000000 0x50000000 1MB Cache flush
21 * 0xf0000000 0x80000000 16MB ISA memory
30 #define XBUS_SIZE 0x00100000
[all …]
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| /linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls2088a.dtsi | 15 cpu0: cpu@0 {
18 reg = <0x0>;
19 clocks = <&clockgen 1 0>;
28 reg = <0x1>;
29 clocks = <&clockgen 1 0>;
38 reg = <0x100>;
48 reg = <0x101>;
58 reg = <0x200>;
68 reg = <0x201>;
78 reg = <0x300>;
[all …]
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| D | fsl-ls2080a.dtsi | 15 cpu0: cpu@0 {
18 reg = <0x0>;
19 clocks = <&clockgen 1 0>;
28 reg = <0x1>;
29 clocks = <&clockgen 1 0>;
38 reg = <0x100>;
48 reg = <0x101>;
58 reg = <0x200>;
68 reg = <0x201>;
78 reg = <0x300>;
[all …]
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| /linux-5.10/arch/mips/include/asm/mach-loongson64/ |
| D | loongson.h | 37 for (x = 0; x < 100000; x++) \
50 #define LOONGSON_FLASH_BASE 0x1c000000
51 #define LOONGSON_FLASH_SIZE 0x02000000 /* 32M */
54 #define LOONGSON_LIO0_BASE 0x1e000000
55 #define LOONGSON_LIO0_SIZE 0x01C00000 /* 28M */
58 #define LOONGSON_BOOT_BASE 0x1fc00000
59 #define LOONGSON_BOOT_SIZE 0x00100000 /* 1M */
61 #define LOONGSON_REG_BASE 0x1fe00000
62 #define LOONGSON_REG_SIZE 0x00100000 /* 256Bytes + 256Bytes + ??? */
65 #define LOONGSON3_REG_BASE 0x3ff00000
[all …]
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| /linux-5.10/arch/x86/include/asm/e820/ |
| D | types.h | 37 E820_TYPE_SOFT_RESERVED = 0xefffffff,
102 #define ISA_START_ADDRESS 0x000a0000
103 #define ISA_END_ADDRESS 0x00100000
105 #define BIOS_BEGIN 0x000a0000
106 #define BIOS_END 0x00100000
108 #define HIGH_MEMORY 0x00100000
110 #define BIOS_ROM_BASE 0xffe00000
111 #define BIOS_ROM_END 0xffffffff
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