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/linux-5.10/arch/arm/boot/dts/
Dkeystone-k2hk.dtsi16 #size-cells = <0>;
20 cpu@0 {
23 reg = <0>;
62 reg = <0x0c000000 0x600000>;
63 ranges = <0x0 0x0c000000 0x600000>;
68 reg = <0x5f0000 0x8000>;
78 0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
79 0xa40 8 0xa40 8 0x840 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 1: dsp1 */
80 0xa44 8 0xa44 8 0x844 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 2: dsp2 */
81 0xa48 8 0xa48 8 0x848 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 3: dsp3 */
[all …]
Dkeystone-k2l.dtsi16 #size-cells = <0>;
20 cpu@0 {
23 reg = <0>;
49 reg = <0x02348400 0x100>;
59 reg = <0x02348800 0x100>;
66 reg = <0x02348000 0x100>;
110 reg = <0x02620690 0xc>;
112 #size-cells = <0>;
116 pinctrl-single,function-mask = <0x1>;
122 0x0 0x0 0xc0
[all …]
Dtegra124-apalis-emc.dtsi94 nvidia,emc-auto-cal-config = <0xa1430000>;
95 nvidia,emc-auto-cal-config2 = <0x00000000>;
96 nvidia,emc-auto-cal-config3 = <0x00000000>;
97 nvidia,emc-auto-cal-interval = <0x001fffff>;
98 nvidia,emc-bgbias-ctl0 = <0x00000008>;
99 nvidia,emc-cfg = <0x73240000>;
100 nvidia,emc-cfg-2 = <0x000008c5>;
101 nvidia,emc-ctt-term-ctrl = <0x00000802>;
102 nvidia,emc-mode-1 = <0x80100003>;
103 nvidia,emc-mode-2 = <0x80200008>;
[all …]
Dtegra124-jetson-tk1-emc.dtsi89 nvidia,emc-auto-cal-config = <0xa1430000>;
90 nvidia,emc-auto-cal-config2 = <0x00000000>;
91 nvidia,emc-auto-cal-config3 = <0x00000000>;
92 nvidia,emc-auto-cal-interval = <0x001fffff>;
93 nvidia,emc-bgbias-ctl0 = <0x00000008>;
94 nvidia,emc-cfg = <0x73240000>;
95 nvidia,emc-cfg-2 = <0x000008c5>;
96 nvidia,emc-ctt-term-ctrl = <0x00000802>;
97 nvidia,emc-mode-1 = <0x80100003>;
98 nvidia,emc-mode-2 = <0x80200008>;
[all …]
Dtegra124-nyan-blaze-emc.dtsi78 nvidia,emc-auto-cal-config = <0xa1430000>;
79 nvidia,emc-auto-cal-config2 = <0x00000000>;
80 nvidia,emc-auto-cal-config3 = <0x00000000>;
81 nvidia,emc-auto-cal-interval = <0x001fffff>;
82 nvidia,emc-bgbias-ctl0 = <0x00000008>;
83 nvidia,emc-cfg = <0x73240000>;
84 nvidia,emc-cfg-2 = <0x000008c5>;
85 nvidia,emc-ctt-term-ctrl = <0x00000802>;
86 nvidia,emc-mode-1 = <0x80100003>;
87 nvidia,emc-mode-2 = <0x80200008>;
[all …]
/linux-5.10/drivers/gpu/drm/etnaviv/
Dcommon.xml.h7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
43 #define PIPE_ID_PIPE_3D 0x00000000
44 #define PIPE_ID_PIPE_2D 0x00000001
45 #define SYNC_RECIPIENT_FE 0x00000001
46 #define SYNC_RECIPIENT_RA 0x00000005
47 #define SYNC_RECIPIENT_PE 0x00000007
48 #define SYNC_RECIPIENT_DE 0x0000000b
49 #define SYNC_RECIPIENT_BLT 0x00000010
50 #define ENDIAN_MODE_NO_SWAP 0x00000000
[all …]
/linux-5.10/drivers/remoteproc/
Dimx_rproc.c18 #define IMX7D_SRC_SCR 0x0C
22 #define IMX7D_SW_M4C_NON_SCLR_RST BIT(0)
32 /* Address: 0x020D8000 */
33 #define IMX6SX_SRC_SCR 0x00
93 { 0x00000000, 0x00180000, 0x00008000, 0 },
95 { 0x00180000, 0x00180000, 0x00008000, ATT_OWN },
97 { 0x00900000, 0x00900000, 0x00020000, 0 },
99 { 0x00920000, 0x00920000, 0x00020000, 0 },
101 { 0x00940000, 0x00940000, 0x00008000, 0 },
103 { 0x1FFF8000, 0x007F8000, 0x00008000, ATT_OWN },
[all …]
/linux-5.10/drivers/net/ethernet/smsc/
Dsmsc911x.h12 #define LAN9115 0x01150000
13 #define LAN9116 0x01160000
14 #define LAN9117 0x01170000
15 #define LAN9118 0x01180000
16 #define LAN9215 0x115A0000
17 #define LAN9216 0x116A0000
18 #define LAN9217 0x117A0000
19 #define LAN9218 0x118A0000
20 #define LAN9210 0x92100000
21 #define LAN9211 0x92110000
[all …]
Dsmsc9420.h22 /* Register set is duplicated for BE at an offset of 0x200 */
23 #define LAN9420_CPSR_ENDIAN_OFFSET (0x200)
25 #define LAN9420_CPSR_ENDIAN_OFFSET (0)
28 #define PCI_VENDOR_ID_9420 (0x1055)
29 #define PCI_DEVICE_ID_9420 (0xE420)
31 #define LAN_REGISTER_EXTENT (0x400)
34 #define SMSC9420_EEPROM_MAGIC (0x9420)
41 #define BUS_MODE (0x00)
42 #define BUS_MODE_SWR_ (BIT(0))
51 #define TX_POLL_DEMAND (0x04)
[all …]
/linux-5.10/arch/powerpc/include/asm/
Dkeylargo.h10 /* "Pangea" chipset has keylargo device-id 0x25 while core99
11 * has device-id 0x22. The rev. of the pangea one is 0, so we
12 * fake an artificial rev. in keylargo_rev by oring 0x100
14 #define KL_PANGEA_REV 0x100
17 #define KEYLARGO_MBCR 0x34 /* KL Only, Media bay control/status */
18 #define KEYLARGO_FCR0 0x38
19 #define KEYLARGO_FCR1 0x3c
20 #define KEYLARGO_FCR2 0x40
21 #define KEYLARGO_FCR3 0x44
22 #define KEYLARGO_FCR4 0x48
[all …]
/linux-5.10/drivers/usb/gadget/udc/
Dmv_udc.h16 #define EP_DIR_OUT 0
18 #define DMA_ADDR_INVALID (~(dma_addr_t)0)
22 #define WAIT_FOR_SETUP 0
28 #define CAPLENGTH_MASK (0xff)
29 #define DCCPARAMS_DEN_MASK (0x1f)
31 #define HCSPARAMS_PPC (0x10)
34 #define USB_FRINDEX_MASKS 0x3fff
37 #define USBCMD_RUN_STOP (0x00000001)
38 #define USBCMD_CTRL_RESET (0x00000002)
39 #define USBCMD_SETUP_TRIPWIRE_SET (0x00002000)
[all …]
/linux-5.10/arch/powerpc/include/asm/nohash/
Dmmu-book3e.h9 #define BOOK3E_PAGESZ_1K 0
44 #define MAS0_TLBSEL_MASK 0x30000000
49 #define MAS0_ESEL_MASK 0x0FFF0000
52 #define MAS0_NV(x) ((x) & 0x00000FFF)
53 #define MAS0_HES 0x00004000
54 #define MAS0_WQ_ALLWAYS 0x00000000
55 #define MAS0_WQ_COND 0x00001000
56 #define MAS0_WQ_CLR_RSRV 0x00002000
58 #define MAS1_VALID 0x80000000
59 #define MAS1_IPROT 0x40000000
[all …]
/linux-5.10/Documentation/devicetree/bindings/remoteproc/
Dti,keystone-rproc.txt121 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
130 reg = <0x10800000 0x00100000>,
131 <0x10e00000 0x00008000>,
132 <0x10f00000 0x00008000>;
135 ti,syscon-dev = <&devctrl 0x40>;
136 resets = <&pscrst 0>;
138 interrupts = <0 8>;
140 kick-gpios = <&dspgpio0 27 0>;
160 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
169 reg = <0x10800000 0x00100000>,
[all …]
Dti,k3-r5f-rproc.yaml58 enum: [0, 1]
61 Should be either a value of 1 (LockStep mode) or 0 (Split mode),
82 either of them can be configured to appear at that R5F's address 0x0.
153 enum: [0, 1]
157 either a value of 1 (enabled) or 0 (disabled), default is disabled
162 enum: [0, 1]
166 either a value of 1 (enabled) or 0 (disabled), default is enabled if
171 enum: [0, 1]
174 address 0 (from core's view). Should be either a value of 1 (ATCM
175 at 0x0) or 0 (BTCM at 0x0), default value is 1 if omitted.
[all …]
/linux-5.10/arch/mips/include/asm/
Dtxx9tmr.h31 #define TXx9_TMTCR_TCE 0x00000080
32 #define TXx9_TMTCR_CCDE 0x00000040
33 #define TXx9_TMTCR_CRE 0x00000020
34 #define TXx9_TMTCR_ECES 0x00000008
35 #define TXx9_TMTCR_CCS 0x00000004
36 #define TXx9_TMTCR_TMODE_MASK 0x00000003
37 #define TXx9_TMTCR_TMODE_ITVL 0x00000000
38 #define TXx9_TMTCR_TMODE_PGEN 0x00000001
39 #define TXx9_TMTCR_TMODE_WDOG 0x00000002
42 #define TXx9_TMTISR_TPIBS 0x00000004
[all …]
/linux-5.10/drivers/net/ethernet/renesas/
Dravb.h38 #define RAVB_TXTSTAMP_VALID 0x00000001 /* TX timestamp valid */
39 #define RAVB_TXTSTAMP_ENABLED 0x00000010 /* Enable TX timestamping */
41 #define RAVB_RXTSTAMP_VALID 0x00000001 /* RX timestamp valid */
42 #define RAVB_RXTSTAMP_TYPE 0x00000006 /* RX type mask */
43 #define RAVB_RXTSTAMP_TYPE_V2_L2_EVENT 0x00000002
44 #define RAVB_RXTSTAMP_TYPE_ALL 0x00000006
45 #define RAVB_RXTSTAMP_ENABLED 0x00000010 /* Enable RX timestamping */
49 CCC = 0x0000,
50 DBAT = 0x0004,
51 DLR = 0x0008,
[all …]
/linux-5.10/arch/m68k/include/asm/
Dmcf8390.h39 #define NE2000_ADDR 0x40000300
40 #define NE2000_ODDOFFSET 0x00010000
41 #define NE2000_ADDRSIZE 0x00020000
42 #define NE2000_IRQ_VECTOR 0xf0
49 #define NE2000_ADDR 0x40000300
50 #define NE2000_ODDOFFSET 0x00010000
51 #define NE2000_ADDRSIZE 0x00020000
52 #define NE2000_IRQ_VECTOR 0x1c
59 #define NE2000_ADDR 0x30000300
60 #define NE2000_ADDRSIZE 0x00001000
[all …]
/linux-5.10/drivers/atm/
DuPD98401.h14 #define uPD98401_PORTS 0x24 /* probably more ? */
21 #define uPD98401_OPEN_CHAN 0x20000000 /* open channel */
22 #define uPD98401_CHAN_ADDR 0x0003fff8 /* channel address */
24 #define uPD98401_CLOSE_CHAN 0x24000000 /* close channel */
25 #define uPD98401_CHAN_RT 0x02000000 /* RX/TX (0 TX, 1 RX) */
26 #define uPD98401_DEACT_CHAN 0x28000000 /* deactivate channel */
27 #define uPD98401_TX_READY 0x30000000 /* TX ready */
28 #define uPD98401_ADD_BAT 0x34000000 /* add batches */
29 #define uPD98401_POOL 0x000f0000 /* pool number */
31 #define uPD98401_POOL_NUMBAT 0x0000ffff /* number of batches */
[all …]
/linux-5.10/drivers/net/wireless/intersil/p54/
Dp54spi.h19 #define SPI_ADRS_READ_BIT_15 0x8000
21 #define SPI_ADRS_ARM_INTERRUPTS 0x00
22 #define SPI_ADRS_ARM_INT_EN 0x04
24 #define SPI_ADRS_HOST_INTERRUPTS 0x08
25 #define SPI_ADRS_HOST_INT_EN 0x0c
26 #define SPI_ADRS_HOST_INT_ACK 0x10
28 #define SPI_ADRS_GEN_PURP_1 0x14
29 #define SPI_ADRS_GEN_PURP_2 0x18
31 #define SPI_ADRS_DEV_CTRL_STAT 0x26 /* high word */
33 #define SPI_ADRS_DMA_DATA 0x28
[all …]
/linux-5.10/drivers/net/usb/
Dlan78xx.h9 #define USB_VENDOR_REQUEST_WRITE_REGISTER 0xA0
10 #define USB_VENDOR_REQUEST_READ_REGISTER 0xA1
11 #define USB_VENDOR_REQUEST_GET_STATS 0xA2
32 #define TX_CMD_A_IGE_ (0x20000000)
33 #define TX_CMD_A_ICE_ (0x10000000)
34 #define TX_CMD_A_LSO_ (0x08000000)
35 #define TX_CMD_A_IPE_ (0x04000000)
36 #define TX_CMD_A_TPE_ (0x02000000)
37 #define TX_CMD_A_IVTG_ (0x01000000)
38 #define TX_CMD_A_RVTG_ (0x00800000)
[all …]
Dsmsc75xx.h12 #define TX_CMD_A_LSO (0x08000000)
13 #define TX_CMD_A_IPE (0x04000000)
14 #define TX_CMD_A_TPE (0x02000000)
15 #define TX_CMD_A_IVTG (0x01000000)
16 #define TX_CMD_A_RVTG (0x00800000)
17 #define TX_CMD_A_FCS (0x00400000)
18 #define TX_CMD_A_LEN (0x000FFFFF)
20 #define TX_CMD_B_MSS (0x3FFF0000)
23 #define TX_CMD_B_VTAG (0x0000FFFF)
26 #define RX_CMD_A_ICE (0x80000000)
[all …]
/linux-5.10/drivers/mmc/host/
Dsdhci-esdhc.h27 #define ESDHC_HOST_CONTROL_LE 0x20
34 #define ESDHC_PRSSTAT 0x24
35 #define ESDHC_CLOCK_GATE_OFF 0x00000080
36 #define ESDHC_CLOCK_STABLE 0x00000008
39 #define ESDHC_PROCTL 0x28
40 #define ESDHC_VOLT_SEL 0x00000400
41 #define ESDHC_CTRL_4BITBUS (0x1 << 1)
42 #define ESDHC_CTRL_8BITBUS (0x2 << 1)
43 #define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1)
44 #define ESDHC_HOST_CONTROL_RES 0x01
[all …]
/linux-5.10/arch/mips/include/asm/sgi/
Dmc.h18 volatile u32 cpuctrl0; /* CPU control register 0, readwrite */
19 #define SGIMC_CCTRL0_REFS 0x0000000f /* REFS mask */
20 #define SGIMC_CCTRL0_EREFRESH 0x00000010 /* Memory refresh enable */
21 #define SGIMC_CCTRL0_EPERRGIO 0x00000020 /* GIO parity error enable */
22 #define SGIMC_CCTRL0_EPERRMEM 0x00000040 /* Main mem parity error enable */
23 #define SGIMC_CCTRL0_EPERRCPU 0x00000080 /* CPU bus parity error enable */
24 #define SGIMC_CCTRL0_WDOG 0x00000100 /* Watchdog timer enable */
25 #define SGIMC_CCTRL0_SYSINIT 0x00000200 /* System init bit */
26 #define SGIMC_CCTRL0_GFXRESET 0x00000400 /* Graphics interface reset */
27 #define SGIMC_CCTRL0_EISALOCK 0x00000800 /* Lock CPU from memory for EISA */
[all …]
/linux-5.10/drivers/net/wireless/ralink/rt2x00/
Drt2400pci.h20 #define RF2420 0x0000
21 #define RF2421 0x0001
32 #define CSR_REG_BASE 0x0000
33 #define CSR_REG_SIZE 0x014c
34 #define EEPROM_BASE 0x0000
35 #define EEPROM_SIZE 0x0100
36 #define BBP_BASE 0x0000
37 #define BBP_SIZE 0x0020
38 #define RF_BASE 0x0004
39 #define RF_SIZE 0x000c
[all …]
/linux-5.10/arch/sparc/include/uapi/asm/
Dtermbits.h64 #define VINTR 0
93 #define IGNBRK 0x00000001
94 #define BRKINT 0x00000002
95 #define IGNPAR 0x00000004
96 #define PARMRK 0x00000008
97 #define INPCK 0x00000010
98 #define ISTRIP 0x00000020
99 #define INLCR 0x00000040
100 #define IGNCR 0x00000080
101 #define ICRNL 0x00000100
[all …]

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