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/linux-5.10/arch/arm/boot/dts/
Dtegra124-nyan-blaze-emc.dtsi78 nvidia,emc-auto-cal-config = <0xa1430000>;
79 nvidia,emc-auto-cal-config2 = <0x00000000>;
80 nvidia,emc-auto-cal-config3 = <0x00000000>;
81 nvidia,emc-auto-cal-interval = <0x001fffff>;
82 nvidia,emc-bgbias-ctl0 = <0x00000008>;
83 nvidia,emc-cfg = <0x73240000>;
84 nvidia,emc-cfg-2 = <0x000008c5>;
85 nvidia,emc-ctt-term-ctrl = <0x00000802>;
86 nvidia,emc-mode-1 = <0x80100003>;
87 nvidia,emc-mode-2 = <0x80200008>;
[all …]
Dtegra124-apalis-emc.dtsi94 nvidia,emc-auto-cal-config = <0xa1430000>;
95 nvidia,emc-auto-cal-config2 = <0x00000000>;
96 nvidia,emc-auto-cal-config3 = <0x00000000>;
97 nvidia,emc-auto-cal-interval = <0x001fffff>;
98 nvidia,emc-bgbias-ctl0 = <0x00000008>;
99 nvidia,emc-cfg = <0x73240000>;
100 nvidia,emc-cfg-2 = <0x000008c5>;
101 nvidia,emc-ctt-term-ctrl = <0x00000802>;
102 nvidia,emc-mode-1 = <0x80100003>;
103 nvidia,emc-mode-2 = <0x80200008>;
[all …]
Dtegra124-jetson-tk1-emc.dtsi89 nvidia,emc-auto-cal-config = <0xa1430000>;
90 nvidia,emc-auto-cal-config2 = <0x00000000>;
91 nvidia,emc-auto-cal-config3 = <0x00000000>;
92 nvidia,emc-auto-cal-interval = <0x001fffff>;
93 nvidia,emc-bgbias-ctl0 = <0x00000008>;
94 nvidia,emc-cfg = <0x73240000>;
95 nvidia,emc-cfg-2 = <0x000008c5>;
96 nvidia,emc-ctt-term-ctrl = <0x00000802>;
97 nvidia,emc-mode-1 = <0x80100003>;
98 nvidia,emc-mode-2 = <0x80200008>;
[all …]
Dtegra124-nyan-big-emc.dtsi229 nvidia,emc-auto-cal-config = <0xa1430000>;
230 nvidia,emc-auto-cal-config2 = <0x00000000>;
231 nvidia,emc-auto-cal-config3 = <0x00000000>;
232 nvidia,emc-auto-cal-interval = <0x001fffff>;
233 nvidia,emc-bgbias-ctl0 = <0x00000008>;
234 nvidia,emc-cfg = <0x73240000>;
235 nvidia,emc-cfg-2 = <0x000008c5>;
236 nvidia,emc-ctt-term-ctrl = <0x00000802>;
237 nvidia,emc-mode-1 = <0x80100003>;
238 nvidia,emc-mode-2 = <0x80200008>;
[all …]
/linux-5.10/drivers/cpufreq/
Dpowernow-k8.h43 #define CPUID_XFAM 0x0ff00000 /* extended family */
44 #define CPUID_XFAM_K8 0
45 #define CPUID_XMOD 0x000f0000 /* extended model */
46 #define CPUID_XMOD_REV_MASK 0x000c0000
47 #define CPUID_XFAM_10H 0x00100000 /* family 0x10 */
48 #define CPUID_USE_XFAM_XMOD 0x00000f00
49 #define CPUID_GET_MAX_CAPABILITIES 0x80000000
50 #define CPUID_FREQ_VOLT_CAPABILITIES 0x80000007
54 /* writes (wrmsr - opcode 0f 30), the register number is placed in ecx, and */
55 /* the value to write is placed in edx:eax. For reads (rdmsr - opcode 0f 32), */
[all …]
/linux-5.10/include/linux/ssb/
Dssb_driver_extif.h24 #define SSB_EXTIF_PCMCIA_IOBASE(x) ((x) + 0x100000)
25 #define SSB_EXTIF_PCMCIA_CFGBASE(x) ((x) + 0x200000)
26 #define SSB_EXTIF_CFGIF_BASE(x) ((x) + 0x800000)
27 #define SSB_EXTIF_FLASH_BASE(x) ((x) + 0xc00000)
47 #define SSB_EXTIF_CTL 0x0000
48 #define SSB_EXTIF_CTL_UARTEN (1 << 0) /* UART enable */
49 #define SSB_EXTIF_EXTSTAT 0x0004
50 #define SSB_EXTIF_EXTSTAT_EMODE (1 << 0) /* Endian mode (ro) */
53 #define SSB_EXTIF_PCMCIA_CFG 0x0010
54 #define SSB_EXTIF_PCMCIA_MEMWAIT 0x0014
[all …]
/linux-5.10/drivers/media/rc/img-ir/
Dimg-ir.h20 #define IMG_IR_CONTROL 0x00
21 #define IMG_IR_STATUS 0x04
22 #define IMG_IR_DATA_LW 0x08
23 #define IMG_IR_DATA_UP 0x0c
24 #define IMG_IR_LEAD_SYMB_TIMING 0x10
25 #define IMG_IR_S00_SYMB_TIMING 0x14
26 #define IMG_IR_S01_SYMB_TIMING 0x18
27 #define IMG_IR_S10_SYMB_TIMING 0x1c
28 #define IMG_IR_S11_SYMB_TIMING 0x20
29 #define IMG_IR_FREE_SYMB_TIMING 0x24
[all …]
/linux-5.10/arch/powerpc/include/asm/nohash/32/
Dmmu-44x.h10 #define PPC44x_MMUCR_TID 0x000000ff
11 #define PPC44x_MMUCR_STS 0x00010000
13 #define PPC44x_TLB_PAGEID 0
18 #define PPC44x_TLB_EPN_MASK 0xfffffc00 /* Effective Page Number */
19 #define PPC44x_TLB_VALID 0x00000200 /* Valid flag */
20 #define PPC44x_TLB_TS 0x00000100 /* Translation address space */
21 #define PPC44x_TLB_1K 0x00000000 /* Page sizes */
22 #define PPC44x_TLB_4K 0x00000010
23 #define PPC44x_TLB_16K 0x00000020
24 #define PPC44x_TLB_64K 0x00000030
[all …]
/linux-5.10/include/linux/bcma/
Dbcma_driver_mips.h5 #define BCMA_MIPS_IPSFLAG 0x0F08
7 #define BCMA_MIPS_IPSFLAG_IRQ1 0x0000003F
8 #define BCMA_MIPS_IPSFLAG_IRQ1_SHIFT 0
10 #define BCMA_MIPS_IPSFLAG_IRQ2 0x00003F00
13 #define BCMA_MIPS_IPSFLAG_IRQ3 0x003F0000
16 #define BCMA_MIPS_IPSFLAG_IRQ4 0x3F000000
20 #define BCMA_MIPS_MIPS74K_CORECTL 0x0000
21 #define BCMA_MIPS_MIPS74K_EXCEPTBASE 0x0004
22 #define BCMA_MIPS_MIPS74K_BIST 0x000C
23 #define BCMA_MIPS_MIPS74K_INTMASK_INT0 0x0014
[all …]
/linux-5.10/include/linux/
Dserial_pnx8xxx.h20 #define PNX8XXX_LCR 0
21 #define PNX8XXX_MCR 0x004
22 #define PNX8XXX_BAUD 0x008
23 #define PNX8XXX_CFG 0x00c
24 #define PNX8XXX_FIFO 0x028
25 #define PNX8XXX_ISTAT 0xfe0
26 #define PNX8XXX_IEN 0xfe4
27 #define PNX8XXX_ICLR 0xfe8
28 #define PNX8XXX_ISET 0xfec
29 #define PNX8XXX_PD 0xff4
[all …]
/linux-5.10/drivers/net/ethernet/renesas/
Dravb.h38 #define RAVB_TXTSTAMP_VALID 0x00000001 /* TX timestamp valid */
39 #define RAVB_TXTSTAMP_ENABLED 0x00000010 /* Enable TX timestamping */
41 #define RAVB_RXTSTAMP_VALID 0x00000001 /* RX timestamp valid */
42 #define RAVB_RXTSTAMP_TYPE 0x00000006 /* RX type mask */
43 #define RAVB_RXTSTAMP_TYPE_V2_L2_EVENT 0x00000002
44 #define RAVB_RXTSTAMP_TYPE_ALL 0x00000006
45 #define RAVB_RXTSTAMP_ENABLED 0x00000010 /* Enable RX timestamping */
49 CCC = 0x0000,
50 DBAT = 0x0004,
51 DLR = 0x0008,
[all …]
/linux-5.10/drivers/video/fbdev/
Di740_reg.h37 #define XRX 0x3D6
38 #define MRX 0x3D2
41 #define DACMASK 0x3C6
42 #define DACSTATE 0x3C7
43 #define DACRX 0x3C7
44 #define DACWX 0x3C8
45 #define DACDATA 0x3C9
48 #define START_ADDR_HI 0x0C
49 #define START_ADDR_LO 0x0D
50 #define VERT_SYNC_END 0x11
[all …]
/linux-5.10/tools/power/cpupower/debug/i386/
Dpowernow-k8-decode.c22 #define MSR_FIDVID_STATUS 0xc0010042
24 #define MSR_S_HI_CURRENT_VID 0x0000001f
25 #define MSR_S_LO_CURRENT_FID 0x0000003f
30 uint64_t msr = 0; in get_fidvid()
40 if (fd < 0) in get_fidvid()
46 *fid = ((uint32_t )(msr & 0xffffffffull)) & MSR_S_LO_CURRENT_FID; in get_fidvid()
47 *vid = ((uint32_t )(msr>>32 & 0xffffffffull)) & MSR_S_HI_CURRENT_VID; in get_fidvid()
48 err = 0; in get_fidvid()
75 cpu = 0; in main()
77 cpu = strtoul(argv[1], NULL, 0); in main()
[all …]
/linux-5.10/drivers/media/pci/cx88/
Dcx88-tvaudio.c52 "Radio deemphasis time constant, 0=None, 1=50us (elsewhere), 2=75us (USA)");
58 } while (0)
96 for (i = 0; l[i].reg; i++) { in set_audio_registers()
120 cx_write(AUD_INIT_LD, 0x0001); in set_audio_start()
121 cx_write(AUD_SOFT_RESET, 0x0001); in set_audio_start()
130 cx_write(AUD_RATE_THRES_DMD, 0x000000C0); in set_audio_finish()
142 cx_write(AUD_I2SCNTL, 0); in set_audio_finish()
143 /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */ in set_audio_finish()
151 cx_write(AUD_SOFT_RESET, 0x0000); in set_audio_finish()
166 {AUD_AFE_12DB_EN, 0x00000001}, in set_audio_standard_BTSC()
[all …]
/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dgk104.c54 if (!(ssrc & 0x00000100)) in read_vco()
55 return read_pll(clk, 0x00e800); in read_vco()
56 return read_pll(clk, 0x00e820); in read_vco()
63 u32 ctrl = nvkm_rd32(device, pll + 0x00); in read_pll()
64 u32 coef = nvkm_rd32(device, pll + 0x04); in read_pll()
65 u32 P = (coef & 0x003f0000) >> 16; in read_pll()
66 u32 N = (coef & 0x0000ff00) >> 8; in read_pll()
67 u32 M = (coef & 0x000000ff) >> 0; in read_pll()
69 u16 fN = 0xf000; in read_pll()
71 if (!(ctrl & 0x00000001)) in read_pll()
[all …]
/linux-5.10/drivers/input/keyboard/
Dep93xx_keypad.c12 * Row 0, Columns 2, 4, and 7 at the same time. This action can
33 #define KEY_INIT 0x00 /* Key Scan Initialization register */
34 #define KEY_DIAG 0x04 /* Key Scan Diagnostic register */
35 #define KEY_REG 0x08 /* Key Value Capture register */
38 #define KEY_INIT_DBNC_MASK (0x00ff0000)
44 #define KEY_INIT_PRSCL_MASK (0x000003ff)
45 #define KEY_INIT_PRSCL_SHIFT (0)
48 #define KEY_DIAG_MASK (0x0000003f)
49 #define KEY_DIAG_SHIFT (0)
56 #define KEY_REG_KEY2_MASK (0x00000fc0)
[all …]
/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/
Dgk20a.c29 nvkm_mask(device, 0x137250, 0x3f, 0); in gk20a_ibus_init_ibus_ring()
31 nvkm_mask(device, 0x000200, 0x20, 0); in gk20a_ibus_init_ibus_ring()
33 nvkm_mask(device, 0x000200, 0x20, 0x20); in gk20a_ibus_init_ibus_ring()
35 nvkm_wr32(device, 0x12004c, 0x4); in gk20a_ibus_init_ibus_ring()
36 nvkm_wr32(device, 0x122204, 0x2); in gk20a_ibus_init_ibus_ring()
37 nvkm_rd32(device, 0x122204); in gk20a_ibus_init_ibus_ring()
43 nvkm_wr32(device, 0x122354, 0x800); in gk20a_ibus_init_ibus_ring()
44 nvkm_wr32(device, 0x128328, 0x800); in gk20a_ibus_init_ibus_ring()
45 nvkm_wr32(device, 0x124320, 0x800); in gk20a_ibus_init_ibus_ring()
52 u32 status0 = nvkm_rd32(device, 0x120058); in gk20a_ibus_intr()
[all …]
/linux-5.10/drivers/gpu/drm/mcde/
Dmcde_drm.h13 #define MCDE_CR 0x00000000
14 #define MCDE_CR_IFIFOEMPTYLINECOUNT_V422_SHIFT 0
15 #define MCDE_CR_IFIFOEMPTYLINECOUNT_V422_MASK 0x0000003F
22 #define MCDE_CONF0 0x00000004
23 #define MCDE_CONF0_SYNCMUX0 BIT(0)
32 #define MCDE_CONF0_IFIFOCTRLWTRMRKLVL_MASK 0x00007000
34 #define MCDE_CONF0_OUTMUX0_MASK 0x00070000
36 #define MCDE_CONF0_OUTMUX1_MASK 0x00380000
38 #define MCDE_CONF0_OUTMUX2_MASK 0x01C00000
40 #define MCDE_CONF0_OUTMUX3_MASK 0x0E000000
[all …]
/linux-5.10/drivers/gpu/drm/msm/dsi/
Ddsi.xml.h50 NON_BURST_SYNCH_PULSE = 0,
56 VID_DST_FORMAT_RGB565 = 0,
63 SWAP_RGB = 0,
72 TRIGGER_NONE = 0,
81 CMD_DST_FORMAT_RGB111 = 0,
90 LANE_SWAP_0123 = 0,
100 #define DSI_IRQ_CMD_DMA_DONE 0x00000001
101 #define DSI_IRQ_MASK_CMD_DMA_DONE 0x00000002
102 #define DSI_IRQ_CMD_MDP_DONE 0x00000100
103 #define DSI_IRQ_MASK_CMD_MDP_DONE 0x00000200
[all …]
/linux-5.10/drivers/net/ethernet/aquantia/atlantic/hw_atl2/
Dhw_atl2_internal.h21 #define HW_ATL2_MAC_UC 0U
27 #define HW_ATL2_INT_MASK (0xFFFFFFFFU)
37 #define HW_ATL2_INTR_MODER_MAX 0x1FF
38 #define HW_ATL2_INTR_MODER_MIN 0xFF
48 #define HW_ATL2_FW_SM_ACT_RSLVR 0x3U
50 #define HW_ATL2_RPF_TAG_UC_OFFSET 0x0
51 #define HW_ATL2_RPF_TAG_ALLMC_OFFSET 0x6
52 #define HW_ATL2_RPF_TAG_ET_OFFSET 0x7
53 #define HW_ATL2_RPF_TAG_VLAN_OFFSET 0xA
54 #define HW_ATL2_RPF_TAG_UNTAG_OFFSET 0xE
[all …]
/linux-5.10/arch/mips/include/asm/
Dinst.h25 #define I_JTARGET_SFT 0
26 #define MIPSInst_JTARGET(x) (MIPSInst(x) & 0x03ffffff)
29 #define MIPSInst_RS(x) ((MIPSInst(x) & 0x03e00000) >> I_RS_SFT)
32 #define MIPSInst_RT(x) ((MIPSInst(x) & 0x001f0000) >> I_RT_SFT)
34 #define I_IMM_SFT 0
35 #define MIPSInst_SIMM(x) ((int)((short)(MIPSInst(x) & 0xffff)))
36 #define MIPSInst_UIMM(x) (MIPSInst(x) & 0xffff)
39 #define MIPSInst_CACHEOP(x) ((MIPSInst(x) & 0x001c0000) >> I_CACHEOP_SFT)
42 #define MIPSInst_CACHESEL(x) ((MIPSInst(x) & 0x00030000) >> I_CACHESEL_SFT)
45 #define MIPSInst_RD(x) ((MIPSInst(x) & 0x0000f800) >> I_RD_SFT)
[all …]
/linux-5.10/arch/xtensa/include/asm/
Dregs.h43 #define EXCCAUSE_EXCCAUSE_SHIFT 0
44 #define EXCCAUSE_EXCCAUSE_MASK 0x3F
46 #define EXCCAUSE_ILLEGAL_INSTRUCTION 0
84 #define PS_WOE_MASK 0x00040000
86 #define PS_CALLINC_MASK 0x00030000
89 #define PS_OWB_MASK 0x00000F00
91 #define PS_RING_MASK 0x000000C0
94 #define PS_INTLEVEL_SHIFT 0
96 #define PS_INTLEVEL_MASK 0x0000000F
100 #define DBREAKC_MASK_BIT 0
[all …]
/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/
Dgf119.c35 while ((entry = dcb_gpio_entry(bios, 0, ++ent, &ver, &len))) { in gf119_gpio_reset()
37 u8 line = (data & 0x0000003f); in gf119_gpio_reset()
38 u8 defs = !!(data & 0x00000080); in gf119_gpio_reset()
39 u8 func = (data & 0x0000ff00) >> 8; in gf119_gpio_reset()
40 u8 unk0 = (data & 0x00ff0000) >> 16; in gf119_gpio_reset()
41 u8 unk1 = (data & 0x1f000000) >> 24; in gf119_gpio_reset()
47 nvkm_gpio_set(gpio, 0, func, line, defs); in gf119_gpio_reset()
49 nvkm_mask(device, 0x00d610 + (line * 4), 0xff, unk0); in gf119_gpio_reset()
51 nvkm_mask(device, 0x00d740 + (unk1 * 4), 0xff, line); in gf119_gpio_reset()
60 nvkm_mask(device, 0x00d610 + (line * 4), 0x00003000, data); in gf119_gpio_drive()
[all …]
/linux-5.10/drivers/net/wireless/ath/ath9k/
Dar9002_phy.h19 #define AR_PHY_TEST 0x9800
20 #define PHY_AGC_CLR 0x10000000
21 #define RFSILENT_BB 0x00002000
23 #define AR_PHY_TURBO 0x9804
24 #define AR_PHY_FC_TURBO_MODE 0x00000001
25 #define AR_PHY_FC_TURBO_SHORT 0x00000002
26 #define AR_PHY_FC_DYN2040_EN 0x00000004
27 #define AR_PHY_FC_DYN2040_PRI_ONLY 0x00000008
28 #define AR_PHY_FC_DYN2040_PRI_CH 0x00000010
30 #define AR_PHY_FC_DYN2040_EXT_CH 0x00000020
[all …]
/linux-5.10/drivers/video/fbdev/mb862xx/
Dmb862xx_reg.h9 #define MB862XX_MMIO_BASE 0x01fc0000
10 #define MB862XX_MMIO_HIGH_BASE 0x03fc0000
11 #define MB862XX_I2C_BASE 0x0000c000
12 #define MB862XX_DISP_BASE 0x00010000
13 #define MB862XX_CAP_BASE 0x00018000
14 #define MB862XX_DRAW_BASE 0x00030000
15 #define MB862XX_GEO_BASE 0x00038000
16 #define MB862XX_PIO_BASE 0x00038000
17 #define MB862XX_MMIO_SIZE 0x40000
20 #define GC_IST 0x00000020
[all …]

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