| /linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | st,stm32-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre TORGUE <alexandre.torgue@st.com>
17 on-chip controllers onto these pads.
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
24 - st,stm32f746-pinctrl
25 - st,stm32f769-pinctrl
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| D | fsl,imx6sll-pinctrl.txt | 3 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
7 - compatible: "fsl,imx6sll-iomuxc"
8 - fsl,pins: each entry consists of 6 integers and represents the mux and config
11 imx6sll-pinfunc.h under device tree source folder. The last integer CONFIG is
12 the pad setting value like pull-up on this pin. Please refer to i.MX6SLL
39 Refer to imx6sll-pinfunc.h in device tree source folder for all available
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| D | fsl,imx7ulp-pinctrl.txt | 10 Please refer to fsl,imx-pinctrl.txt in this directory for common binding
14 - compatible: "fsl,imx7ulp-iomuxc1".
15 - fsl,pins: Each entry consists of 5 integers which represents the mux
19 imx7ulp-pinfunc.h in the device tree source folder.
21 pull-up on this pin.
39 #include "imx7ulp-pinfunc.h"
43 compatible = "fsl,imx7ulp-iomuxc1";
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| D | fsl,mxs-pinctrl.txt | 6 voltage and pull-up.
9 - compatible: "fsl,imx23-pinctrl" or "fsl,imx28-pinctrl"
10 - reg: Should contain the register physical address and length for the
13 Please refer to pinctrl-bindings.txt in this directory for details of the
20 information about pull-up. For this reason, even seemingly boolean values are
34 particular function, like SSP0 functioning as mmc0-8bit. That said, the
37 "pinctrl-*" phandle in client device node should only have one group node
41 Required subnode-properties:
42 - fsl,pinmux-ids: An integer array. Each integer in the array specify a pin
56 - reg: Should be the index of the group nodes for same function. This property
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| D | atmel,at91-pio4-pinctrl.txt | 7 - compatible:
8 "atmel,sama5d2-pinctrl"
9 "microchip,sama7g5-pinctrl"
10 - reg: base address and length of the PIO controller.
11 - interrupts: interrupt outputs from the controller, one for each bank.
12 - interrupt-controller: mark the device node as an interrupt controller.
13 - #interrupt-cells: should be two.
14 - gpio-controller: mark the device node as a gpio controller.
15 - #gpio-cells: should be two.
17 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
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| D | pinctrl-mt8192.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8192.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@mediatek.com>
17 const: mediatek,mt8192-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
28 gpio-ranges:
38 reg-names:
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| D | pinctrl-mt65xx.txt | 6 - compatible: value should be one of the following.
7 "mediatek,mt2701-pinctrl", compatible with mt2701 pinctrl.
8 "mediatek,mt2712-pinctrl", compatible with mt2712 pinctrl.
9 "mediatek,mt6397-pinctrl", compatible with mt6397 pinctrl.
10 "mediatek,mt7623-pinctrl", compatible with mt7623 pinctrl.
11 "mediatek,mt8127-pinctrl", compatible with mt8127 pinctrl.
12 "mediatek,mt8135-pinctrl", compatible with mt8135 pinctrl.
13 "mediatek,mt8167-pinctrl", compatible with mt8167 pinctrl.
14 "mediatek,mt8173-pinctrl", compatible with mt8173 pinctrl.
15 "mediatek,mt8516-pinctrl", compatible with mt8516 pinctrl.
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| D | pinctrl-mt8183.txt | 6 - compatible: value should be one of the following.
7 "mediatek,mt8183-pinctrl", compatible with mt8183 pinctrl.
8 - gpio-controller : Marks the device node as a gpio controller.
9 - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
12 - gpio-ranges : gpio valid number range.
13 - reg: physical address base for gpio base registers. There are 10 GPIO
17 - reg-names: gpio base register names. There are 10 gpio base register
20 - interrupt-controller: Marks the device node as an interrupt controller
21 - #interrupt-cells: Should be two.
22 - interrupts : The interrupt outputs to sysirq.
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| D | mediatek,mt6779-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6779-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Teng <andy.teng@mediatek.com>
15 - compatible: "syscon"
19 const: mediatek,mt6779-pinctrl
25 reg-names:
27 - const: "gpio"
28 - const: "iocfg_rm"
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| D | fsl,imx25-pinctrl.txt | 3 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
22 Refer to imx25-pinfunc.h in device tree source folder for all available
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| D | fsl,imx53-pinctrl.txt | 3 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
7 - compatible: "fsl,imx53-iomuxc"
8 - fsl,pins: two integers array, represents a group of pins mux and config
11 pull-up for this pin. Please refer to imx53 datasheet for the valid pad
31 Refer to imx53-pinfunc.h in device tree source folder for all available
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| D | fsl,imx50-pinctrl.txt | 3 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
7 - compatible: "fsl,imx50-iomuxc"
8 - fsl,pins: two integers array, represents a group of pins mux and config
11 pull-up for this pin. Please refer to imx50 datasheet for the valid pad
31 Refer to imx50-pinfunc.h in device tree source folder for all available
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| D | fsl,imx51-pinctrl.txt | 3 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
7 - compatible: "fsl,imx51-iomuxc"
8 - fsl,pins: two integers array, represents a group of pins mux and config
11 pull-up for this pin. Please refer to imx51 datasheet for the valid pad
31 Refer to imx51-pinfunc.h in device tree source folder for all available
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| D | fsl,imx35-pinctrl.txt | 3 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
7 - compatible: "fsl,imx35-iomuxc"
8 - fsl,pins: two integers array, represents a group of pins mux and config
11 pull-up for this pin. Please refer to imx35 datasheet for the valid pad
32 Refer to imx35-pinfunc.h in device tree source folder for all available
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| D | fsl,imx6q-pinctrl.txt | 3 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
7 - compatible: "fsl,imx6q-iomuxc"
8 - fsl,pins: two integers array, represents a group of pins mux and config
11 pull-up for this pin. Please refer to imx6q datasheet for the valid pad
37 Refer to imx6q-pinfunc.h in device tree source folder for all available
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| D | fsl,imx6sx-pinctrl.txt | 3 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
7 - compatible: "fsl,imx6sx-iomuxc"
8 - fsl,pins: each entry consists of 6 integers and represents the mux and config
11 imx6sx-pinfunc.h under device tree source folder. The last integer CONFIG is
12 the pad setting value like pull-up on this pin. Please refer to i.MX6 SoloX
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| D | fsl,imx6dl-pinctrl.txt | 3 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
7 - compatible: "fsl,imx6dl-iomuxc"
8 - fsl,pins: two integers array, represents a group of pins mux and config
11 pull-up for this pin. Please refer to imx6dl datasheet for the valid pad
37 Refer to imx6dl-pinfunc.h in device tree source folder for all available
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| D | fsl,imx6ul-pinctrl.txt | 3 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
7 - compatible: "fsl,imx6ul-iomuxc" for main IOMUX controller or
8 "fsl,imx6ull-iomuxc-snvs" for i.MX 6ULL's SNVS IOMUX controller.
9 - fsl,pins: each entry consists of 6 integers and represents the mux and config
12 imx6ul-pinfunc.h under device tree source folder. The last integer CONFIG is
13 the pad setting value like pull-up on this pin. Please refer to i.MX6 UltraLite
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| D | fsl,vf610-pinctrl.txt | 3 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
7 - compatible: "fsl,vf610-iomuxc"
8 - fsl,pins: two integers array, represents a group of pins mux and config
11 such as pull-up, speed, ode for this pin. Please refer to Vybrid VF610
40 Please refer to vf610-pinfunc.h in device tree source folder
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| D | fsl,imx6sl-pinctrl.txt | 3 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
7 - compatible: "fsl,imx6sl-iomuxc"
8 - fsl,pins: two integers array, represents a group of pins mux and config
11 pull-up for this pin. Please refer to imx6sl datasheet for the valid pad
38 Refer to imx6sl-pinfunc.h in device tree source folder for all available
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| D | fsl,imx8mp-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx8mp-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anson Huang <Anson.Huang@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
18 const: fsl,imx8mp-iomuxc
37 be found in <arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h>. The last
38 integer CONFIG is the pad setting value like pull-up on this pin. Please
40 $ref: /schemas/types.yaml#/definitions/uint32-matrix
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| D | fsl,imx8mq-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx8mq-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anson Huang <Anson.Huang@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
18 const: fsl,imx8mq-iomuxc
37 be found in <arch/arm64/boot/dts/freescale/imx8mq-pinfunc.h>. The last
38 integer CONFIG is the pad setting value like pull-up on this pin. Please
40 $ref: /schemas/types.yaml#/definitions/uint32-matrix
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| D | fsl,imx8mm-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx8mm-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anson Huang <Anson.Huang@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
18 const: fsl,imx8mm-iomuxc
37 be found in <arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h>. The last
38 integer CONFIG is the pad setting value like pull-up on this pin. Please
40 $ref: /schemas/types.yaml#/definitions/uint32-matrix
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| /linux-5.10/drivers/pinctrl/ |
| D | pinctrl-at91-pio4.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/pinctrl/at91.h>
18 #include <linux/pinctrl/pinconf-generic.h>
24 #include "pinctrl-utils.h"
67 #define ATMEL_GET_PIN_NO(pinfunc) ((pinfunc) & 0xff) argument
68 #define ATMEL_GET_PIN_FUNC(pinfunc) ((pinfunc >> 16) & 0xf) argument
69 #define ATMEL_GET_PIN_IOSET(pinfunc) ((pinfunc >> 20) & 0xf) argument
93 * struct atmel_pioctrl - Atmel PIO controller (pinmux + gpio)
141 {"atmel,drive-strength", ATMEL_PIN_CONFIG_DRIVE_STRENGTH, 0},
144 /* --- GPIO --- */
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| /linux-5.10/arch/arm/boot/dts/ |
| D | imx6ull.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include "imx6ull-pinfunc.h"
7 #include "imx6ull-pinfunc-snvs.h"
9 /* Delete UART8 in AIPS-1 (i.MX6UL specific) */
10 /delete-node/ &uart8;
11 /* Delete CAAM node in AIPS-2 (i.MX6UL specific) */
12 /delete-node/ &crypto;
15 clock-frequency = <900000000>;
16 operating-points = <
24 fsl,soc-operating-points = <
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